Quantum capacitance

About: Quantum capacitance is a research topic. Over the lifetime, 954 publications have been published within this topic receiving 24165 citations.

Analysis of Quantum Capacitance Effect in Ultra-Thin-Body III-V Transistor

Abstract: Quantum capacitance is expected to have strong impact on the gate capacitance in III-V devices. In this paper, we present a comprehensive analysis of the quantum capacitance for III-V ultra-thin body with thin box transistor. The results show the presence of quantum capacitance effect and step like behavior due to individual contribution of sub-bands in the gate capacitance. We discuss the impact of various parameters such as insulator thickness, channel (body) thickness on the capacitance with positive and negative back gate biases.

Quantum Capacitance Modifies Interionic Interactions in Semiconducting Nanopores

Abstract: Nanopores made with low-dimensional semiconducting materials, such as carbon nanotubes and graphene slit pores, are used in supercapacitors. For modelling purposes, it is often assumed that such pores screen ion-ion interactions like metallic pores, i.e. that screening leads to an exponential decay of the interaction potential with ion separation. By introducing a quantum capacitance that accounts for the density of states in the material, we show that ion-ion interactions in carbon nanotubes and graphene slit pores actually decay algebraically with ion separation. This result suggests a new avenue of capacitance optimization based on tuning the electronic structure of a pore: a marked enhancement in capacitance might be achieved by developing nanopores made with metallic materials or bulk semimetallic materials.

Effect of Realistic Inter-CNT Coupling Capacitance in Mixed CNT Bundle

Abstract: The change of potential across a CNT in a bundle necessitates the need to consider the inter-CNT coupling capacitance in the equivalent circuit of CNT interconnects for VLSI circuits. This paper presents a realistic inter-CNT electrostatic coupling capacitance and tunneling conductance model for this bundle and studied its effects in detail. The equivalent transmission line circuit model of a unit bundle containing one SWCNT and one MWCNT has been shown. This new model is then used to calculate the delay induced by the inter-CNT capacitance and tunneling conductance, which predicts the relative positioning of MW/SWCNTs in mixed CNT bundle.

Capacitance–voltage characteristics and switching time of double barrier resonant tunneling diode fabricated with epi-Si and γ-Al2O3

Abstract: Capacitance-voltage and conductance-voltage characteristics of resonant tunneling diodes fabricated with epitaxial Si/ γ -Al 2 O 3 heterostructure have been studied at room temperature. The capacitance-voltage characteristics of this structure show a large capacitance peak near the resonant tunneling bias. This capacitance peak is considered as quantum capacitance originated from the charge storage in the quantum well of the structure during tunneling process. Capacitance-voltage characteristics also were studied at different frequencies to understand the charge storage mechanism in the resonant tunneling diode structure. Resonant tunneling diodes with different barrier thicknesses were studied and tremendous improvement in the NDR characteristics was observed. A maximum peak-to-valley current ratio of 248 was obtained at room temperature. Using this capacitance value switching time and maximum operational frequency of the RTD structure were determined.

Simulating Capacitances to Silicon Quantum Dots: Breakdown of the Parallel Plate Capacitor Model

Abstract: Many electrical applications of quantum dots rely on capacitively coupled gates; therefore, to make reliable devices we need those gate capacitances to be predictable and reproducible. We demonstrate in silicon nanowire quantum dots that gate capacitances are reproducible to within 10% for nominally identical devices. We demonstrate the experimentally that gate capacitances scale with device dimensions. We also demonstrate that a capacitance simulator can be used to predict measured gate capacitances to within 20%. A simple parallel plate capacitor model can be used to predict how the capacitances change with device dimensions; however, the parallel plate capacitor model fails for the smallest devices because the capacitances are dominated by fringing fields. We show how the capacitances due to fringing fields can be quickly estimated.