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Quantum capacitance

About: Quantum capacitance is a research topic. Over the lifetime, 954 publications have been published within this topic receiving 24165 citations.


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Book ChapterDOI
01 Jan 2015
TL;DR: In this paper, a technical review of analytical models for single-walled (SWNT), double-wooled (DWNT), and multiwalled CNT (MWNT) structures is presented.
Abstract: Modeling of a carbon nanotube interconnect is primarily dependent on its diameter, electron transport properties, chiralities, metallic and semiconducting properties. This chapter presents a technical review of analytical models for single-walled (SWNT), double-walled (DWNT), and multi-walled CNT (MWNT) structures. Depending on the geometry, the equivalent electrical models and the associated resistive, inductive, and capacitive parasitics for different SWNT, DWNT, and MWNT bundles are described.

5 citations

Journal ArticleDOI
TL;DR: The impact of gate CQ and the dimensionality of the gate electrode on the performance of nanoscale transistors through analytical electrostatics modeling is demonstrated and room-temperature gate quantization features in the transfer characteristics of single walled carbon nanotube gated ultra-thin silicon-on-insulator channel transistors are observed.
Abstract: As the physical dimensions of a transistor gate continue to shrink to a few atoms, performance can be increasingly determined by the limited electronic density of states (DOS) in the gate and the gate quantum capacitance (CQ). We demonstrate the impact of gate CQ and the dimensionality of the gate electrode on the performance of nanoscale transistors through analytical electrostatics modeling. For low-dimensional gates, the gate charge can limit the channel charge, and the transfer characteristics of the device become dependent on the gate DOS. We experimentally observe for the first time, room-temperature gate quantization features in the transfer characteristics of single-walled carbon nanotube (CNT)-gated ultrathin silicon-on-insulator (SOI) channel transistors; features which can be attributed to the Van Hove singularities in the one-dimensional DOS of the CNT gate. In addition to being an important aspect of future transistor design, potential applications of this phenomenon include multilevel transistors with suitable transfer characteristics obtained via engineered gate DOS.

5 citations

Journal ArticleDOI
TL;DR: In this paper, the charge induction mechanism across gated, narrow, ballistic graphene devices with different degrees of edge disorder was investigated using magnetoconductance measurements as the probing technique, and it was shown that devices with large edge disorder exhibit a nearly homogeneous capacitance profile across the device channel, close to the case of an infinitely large graphene sheet.
Abstract: We experimentally investigate the charge induction mechanism across gated, narrow, ballistic graphene devices with different degrees of edge disorder. By using magnetoconductance measurements as the probing technique, we demonstrate that devices with large edge disorder exhibit a nearly homogeneous capacitance profile across the device channel, close to the case of an infinitely large graphene sheet. In contrast, devices with lower edge disorder ($l1\phantom{\rule{0.16em}{0ex}}\mathrm{nm}$ roughness) are strongly influenced by the fringing electrostatic field at graphene boundaries, in quantitative agreement with theoretical calculations for pristine systems. Specifically, devices with low edge disorder present a large effective capacitance variation across the device channel with a nontrivial, inhomogeneous profile due not only to classical electrostatics but also to quantum mechanical effects. We show that such quantum capacitance contribution, occurring due to the low density of states across the device in the presence of an external magnetic field, is considerably altered as a result of the gate electrostatics in the ballistic graphene device. Our conclusions can be extended to any two-dimensional (2D) electronic system confined by a hard-wall potential and are important for understanding the electronic structure and device applications of conducting 2D materials.

5 citations

Proceedings ArticleDOI
01 Dec 2007
TL;DR: In this paper, a carbon nanotube capacitance (CNCAP) was proposed, which allows for a potential capacitance/area greater than 100 fF/mum2.
Abstract: In this abstract, we present additional details on a new capacitor, CNCAP (carbon nanotube capacitor), compare it to existing integrated circuit capacitor technologies, and address its manufacturability. Properties of metallic, single wall CNTs (large surface area and relatively low resistance) allow for the creation of a very high density capacitor structure. In the CNCAP, each CNT electrode is surrounded by four CNTs connected to the opposing electrode. This structure allows for a potential capacitance/area greater than 100 fF/mum2. The electrical model of two parallel metallic, single wall, CNTs. The principle scattering mechanism in a CNT is due to acoustic phonons (under low bias) and the ideal CNT resistance is based on its length R = (h/4e2)(1+L/lambdaacc) where lambdaacc is the mean free path. The inductance, L, of the CNTs is taken as 4.07 nH/mum, which corresponds to the kinetic inductance. The quantum capacitance per unit length (CQ) of the CNTs is 388 aF/mum.

5 citations

Journal ArticleDOI
TL;DR: HuHu and Stapleton as mentioned in this paper introduced the concept of quantum capacitance, which describes the modulation of charge SQ stored in the quantum well in response to a variation of external voltage 6V applied to the diode, SQ= C&S V.
Abstract: In a recent letter’ Hu and Stapleton (HS) introduced a quantity they call the quantum capacitance of resonance tunneling (RT) diodes. This quantity, which I shall denote by CHs, describes the modulation of charge SQ stored in the quantum well (QW) in response to a variation of external voltage 6V applied to the diode, SQ= C&S V. HS assert that it is CHs rather the geometric barrier capacitances C, =.cS/d, and C2=cY/d2 that determines the time constant of an RT oscillator. Proceeding to calculate Cns in a simple model of a RT diode, HS find that Cns.@Z1,C,, and in this context they criticize my earlier work.2 My problem with the HS letter is not that they had calculated their “quantum capacitance” incorrectly but that this quantity is unrelated to the oscillator time constant. Consequently, the use of Cn, by HS is based on a misunderstanding and their results are devoid of a definite physical significance. Consider the general circuit in Fig. 1, where the resistances R, and R2 are arbitrary functions of the voltages V and V,. For the purpose of calculating either the currentvoltage characteristics or the charge distribution inside the device, this circuit is equivalent to the model used by HS. Indeed, it has been rigorously shown by Payne3 that the following two calculational procedures produce identical results for the RT diode: One method is to first calculate the energy-dependent tunneling probability for a singlestep tunneling process between the emitter and the collector, and then calculate the current by integrating over the energies of the emitter electrons. The other method is to use an effective Hamiltonian for calculating the tunneling probabilities for two sequential steps and then calculate the current by a kinetic equation for the probability density. Even though it has become customary to refer to the former method as “coherent ” and the latter as “sequential,” it should be emphasized that the use of either method has nothing to do with the question of whether the tunneling process itself is coherent or sequential, which is an issue that can be decided upon only by including scattering processes. Within the “sequential ” framework, the equivalent circuit of Fig. 1 is reasonable. In general, the state of the circuit (e.g., the amount of charge Q stored in the central node) is not uniquely determined by the applied voltage V, cf. the well-known intrinsic bistability effect.4 Therefore, let us choose an operating regime away from any singular switching point and discuss the response of the circuit to a shock excitation SV u(t), where u(t) is a step function and 6 V is sufficiently small so as not to force switching into a different regime. Let us further assume that the current-voltage characteristics are sufficiently smooth so that variations in RI and R2 can be neglected within the range SV. Both assumptions are valid in the situation considered by HS. The time-dependent response SQ is easy to evaluate by the standard methods. For an arbitrary t > 0 the result is given by

5 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202331
202238
202162
202062
201965
201858