Showing papers on "RC circuit published in 1983"

Signal Delay in RC Tree Networks

Abstract: In MOS integrated circuits, signals may propagate between stages with fanout. The exact calculation of signal delay through such networks is difficult. However, upper and lower bounds for delay that are computationally simple are presented in this paper. The results can be used 1) to bound the delay, given the signal threshold, or 2) to bound the signal voltage, given a delay time, or 3) certify that a circuit is "fast enough," given both the maximum delay and the voltage threshold.

Fully integrated active RC filters in MOS technology

Abstract: A fully integrated continuous-time low-pass filter has been fabricated with CMOS technology. The device implements an active RC network using integrated capacitors and MOS transistors operated in the nonsaturation region as voltage-controlled resistors. The filter topology is fully balanced for good linearity and for good power supply rejection. The cutoff frequency is voltage adjustable around 3 kHz, allowing compensation for process and temperature variations. For 5-V power supplies a dynamic range of over 94 dB has been achieved.

Inverter with controllable RMS output voltage magnitude

Abstract: An inverter is adapted to be powered from full-wave-rectified unfiltered 60 Hz power line voltage and to provide an amplitude-modulated output of relatively high-frequency voltage. The inverter has to be triggered into oscillation. However, once triggered, it will continue to oscillate--but only for as long as its DC supply voltage is present. Since the DC supply voltage falls to zero magnitude once for each half-cycle of the 60 Hz power line voltage, the inverter stops oscillating after each such half-cycle; and therefore, for as long as output voltage is desired, the inverter has to be re-triggered after each half-cycle. Triggering is accomplished by a Diac in combination with an RC integrating circuit; which means that the inverter is triggered into oscillation some time period after the onset of each half-cycle. The length of this time period is determined by the nature of the RC integrating circuit, in the same way as phase-control is accomplished in an ordinary Triac-type incandescent lamp dimmer. By varying the time-constant of the RC integrating circuit, the inverter can be triggered into oscillation with varying amounts of delay; which means that the net effective RMS magnitude of the output voltage can be adjusted by adjusting the time-constant of the RC integrating circuit.

Pulse-width modulation circuit

Abstract: The invention provides a pulse-width modulation circuit in which an output from a latch circuit (136) for holding a count obtained by counting a reference clock signal in accordance with the period of a signal to be modulated is compared by a comparator (152) with an output from a ramp counter (153) for counting the reference clock signal at a predetermined period so as to perform a pulse-width modulation The number of bits of the comparator (152) and the ramp counter (153) is decreased by n bits with respect to the number N (N > n) of bits of the latch circuit (136)

Equipment for recognizing misfiring

Abstract: An equipment for recognizing misfiring, which is particularly suitable for permanent installation in a motor vehicle. By means of high-pass filters coupled to the plug leads between the spark distributor and the spark plugs, the change to the voltage at the spark plugs associated with the initiation of the ignition spark is sensed. The high-pass filters are so arranged that they only send on a needle-shaped output pulse signal to an analysis circuit if it appears with the change in voltage associated with the spark front. The analysis circuit generates appropriate output signals with reference pulses generated in time with the ignition pulses. The high-pass filters are preferably arranged as simple RC filters whose capacities are coupled to the plug leads by means of peripheral electrodes, which at least partially surround the insulation coatings of the plug leads.

Simple, wide-range, linear temperature-to-frequency converters using standard thermistors

Abstract: The exponential voltage-time relationship of a charging RC circuit is used to linearise the approximately exponential resistance (R) against temperature (T) behaviour of a thermistor. The resulting output signal is a frequency, linear in and directly proportional to absolute temperature. Using standard, inexpensive thermistors a temperature error of less than 0.5K over a 75K range is obtained, the error being due to deviations from the thermistor's nominally exponential R(T) relationship. The circuit can be used to linearise any transducer having an exponential relationship between input and output signals, or to obtain an output signal proportional to the logarithm of any input voltage signal (that is, proportional to the input signal in dB).

Reset signal generating circuit

Abstract: A semiconductor integrated circuit receiving at its input pin the terminal voltage of a capacitor which is connected to a power source through a resistor so as to detect the level of the power voltage. The circuit is provided with a level shift circuit which shifts the incoming power voltage level by a predetermined value so that a reset signal is produced by detecting the output of the level shift circuit falling below the threshold level of a logic circuit.

Signal Delay in General RC Networks with Application to Timing Simulation of Digital Integrated Circuits

Abstract: Modeling digital MOS circuits by RC networks has become a well accepted practice for estimating delays. In 1981, Penfield and Rubinstein proposed a method to bound the delays of the nodes in an RC tree network. In this paper, we address the problem of dynamic timing simulation under RC-based models. Based upon the delay of Elmore, a single value of delay is derived for any node in a general RC network. The effects of parallel connections and stored charges are properly taken into consideration. The algorithm can be used either as a stand-alone simulator, or as a front end for producing initial waveforms for waveform-relaxation based circuit simulators. An experimental simulator called SDS (Signal Delay Simulator) has been developed. For all the examples tested so far, this simulator runs about two to three orders of magnitude faster than SPICE, and detects all transitions and glitches at approximately the correct time.

Variable control circuit having a predetermined timed output

Abstract: A circuit for varying the current to a load and, simultaneously, limiting the output of the load to a predetermined time interval. A timer chip having an RC network receives rectified current from an AC voltage source and responds thereto with a high output, which is used to bias an NPN transistor. The transistor permits the flow of rectified current to a logic triac, thereby triggering the logic triac and enabling current from the AC voltage source to flow to a variable resistor in series connection with a gating/AC timing capacitor, thereby triggering a diac. The diac responds to the controlled current flow from the variable resistor by operating the gate of a power control triac and permitting the desired current flow between the load and the AC voltage source through the power control triac. When the output of the timer chip is low at the end of the predetermined time interval, the logic triac prohibits the flow of current to the diac, thereby prohibiting the flow of current to the load across the power control triac.

Design of parasitic-insensitive bilinear-transformed admittance-scaled (BITAS) SC ladder filters

Abstract: A new method for the design of parasitic-insensitive switched-capacitor (SC) ladder filters is described. The filters are derived from analog LC prototypes utilizing the bilinear z -transform. The method is based on the signal-flowgraph (SFG) concept in the discrete-time domain. The resulting networks preserve the frequency response and low sensitivity properties of the equivalent continuous-time LC filters.

Two new single op-amp RC bridge-T oscillator circuits

Abstract: It is shown that, by applying a recently proposed method to synthesise dual-feedback ideal op-amp oscillator circuits, a set of 12 canonic 2nd-order RC oscillators results. These are members of the Wien-bridge and bridge-T families. Two of the presented RC bridge-T oscillator circuits are believed to be new.

High-efficiency low distortion parallel amplifier

Abstract: A high-efficiency low-distortion parallel amplifier or regulator is driven by an input signal source Vi. An input signal passes to a linear circuit LC, and the output current i1 from the linear circuit passes to the input of a switching circuit SC. Alternatively, the input to the switching circuit may be any other signal that is a function of the linear-circuit output current. The output of the switching circuit passes through a coupling network CN and is applied with the output current of the linear circuit to a load impedance ZL. The output of the switching circuit acts to reduce the output current of the linear circuit so that the power it supplies is low. A low linear-circuit output current is usually sufficient to drive the switching circuit and coupling network to the maximum current required by the load. The system automatically adjusts independently of the load impedence so that with high output current most of the current is supplied by the switching circuit.

Protection circuit for switching power amplifier

Abstract: A protection circuit for a switching power amplifier comprises a first detection circuit which detects a current flowing through an output stage switching circuit, a second detection circuit which detects an output voltage of the output stage switching circuit, and an amplitude limitation circuit which limits the amplitude of an input signal to the output stage switching circuit in accordance with both the first and second detection. Thus the switching circuit is surely protected from destruction.

Circuit arrangement for reconstructing noise-affected signals

Abstract: An analog input signal is applied to a timing circuit (2) for generating a sampling pulse in response to an impulse noise introduced to the signal and also to a first sample-and-hold circuit (7, 8, 9) through a buffer amplifier (6). The first sample-and-hold circuit includes a capacitor (7) and a switch (8) for applying the analog signal to the capacitor to develop a voltage therein which keeps track of the waveform of the analog signal in the absence of the sampling pulse and holding the voltage in response to the sampling pulse. A differentiator (11) is coupled in a feedback loop from the output of the first sample-and-hold circuit for generating a signal representative of the slope ratio of the analog signal. A second sample-and-hold circuit (15) is provided in the feedback loop for sampling and holding the slope ratio signal in response to the sampling pulse. Further included in the feedback loop is a bidirectional constant current source (20) which provides constant current charging and discharging of the capacitor (7) in response to an output signal from the second sample-and-hold circuit (15).

Frequency to current converter circuit.

Abstract: A circuit (10) receives a cyclic input signal having a frequency determined by a source (11), which frequency may vary in accordance with a parameter or condition to be measured, for example. The circuit (10) very precisely provides an output current representative of the frequency of the input signal. In particular, the circuit uses a pair of regulated and different voltages (16) (17), one (16) of which is impressed upon an averaging circuit (30) for a preselected time during each cycle of the input signal, and the other voltage (17) is impressed upon the averaging circuit (30) during the time when the first signal is not connected to the averaging circuit. A control signal (Vo) is developed from the averaging circuit (30) which is a function of the average of the voltage provided to the averaging circuit, and the control signal (Vo) in turn is used for controlling a current control amplifier (60) and transistors (61) (62) which in turn control current flow through a load (40) connected to output terminals (36) (37) and through a feedback resistor (63). The use of regulated voltage sources (16) (17) for deriving the current control signal insures great stability, relatively low cost, and precise operation.

Signal delay generating circuit

Abstract: A signal generating circuit for generating a delayed signal in response to a pulsed timing signal with a delay time which is not substantially affected by variations in supply voltage or temperature. A voltage comparator receives a first input from a voltage division point of a voltage dividing circuit coupled across a voltage source. The other input terminal of the comparator is coupled to a RC circuit and to one terminal of a switch, the other terminal of which is connected to the voltage source. The position of the switch is determined by the output of the timing signal source. If desired, a flip-flop having its set input terminal coupled to a periodic pulse source and its reset input terminal coupled to the output of the comparator may have its complementary output used as the timing signal source to the switch, with the normal output of the flip-flop providing the delayed signal. Alternatively, a pair of comparators may be provided, each comparator comparing the RC circuit voltage to a different voltage from different points on the voltage dividing circuit, with the comparator outputs and the switching signal being combined in a logic circuit to obtain the delayed signal.

High-speed logic circuit with a constant current source arrangement

Abstract: A high-speed logic circuit including a logic part formed of a differential transistor circuit and a feedback part for feeding the in-phase output of the differential transistor circuit back to the out-of-phase input terminal of the differential transistor circuit is disclosed in which a constant current source circuit is provided in the feedback part to keep constant a current flowing through the feedback part

Planar Circuit Equation and its Practical Application to Planar-Type Transmission-Line Circuit

Abstract: This paper presents general circuit equation of planar circuit basing on the field theory and systematic method of analysis basing on the conventional circuit theory. As an example of the application, planar-type transmission-line circuits are analyzed.

Two-amplifier active-RC biquads with minimized dependence on op-amp parameters

Abstract: It is generally recognized that the best two-amplifier active- RC biquads show a better performance with lower sensitivities than single-amplifier biquads (SAB's), and that the performance of an SAB can be improved by use of a composite amplifier. In this paper it is demonstrated that by matching the characteristics of a composite amplifier to the specific filter's requirements a "composite single-amplifier biquad" (CAB) can be obtained with significantly better performance than that of the best two-amplifier biquads reported to date. The resulting circuits are shown by theory and experiment to belong to the best available active- RC filters.

Electrical measurement circuit including a low-pass filter, in particular for weighing

Abstract: A link of controllable resistance comprising an FET (Q16) connected in series with a low-value resistor (R15) is connected in parallel with a time constant determining resistance (R11) in an RC type low-pass filter. A discriminator circuit (40, 50, 60) provides an on/off type signal following variations in the DC component of an input signal present on a terminal (A). A retriggerable monostable (80) defines a "neutral" time interval of predetermined duration running from the beginning of said on/off signal. At the end of said neutral period, a circuit (20) switches the FET on, thereby reducing the time constant of the RC network in the RC low-pass filter. This time constant is subsequently progressively rasied to a high value by progressively switching the FET off. The filter is specially applicable to weighing a body that is subjected to movement or to oscillation, or to performing weighing measurements in a vibrating environment.

Double bootstrapped clock buffer circuit

Abstract: A buffer circuit has first and second boot-strap circuits. The first boot-strap circuit charges the gate of an output MOS transistor to a voltage above a supply voltage when an input signal has a first logic level. The gate of a precharging MOS transistor in the first boot-strap circuit is driven by the second boot-strap circuit so as to precharge a capacitor in the first boot-strap circuit to a voltage above the supply voltage when the input signal has a second logic level.

Multiple copy and transparency detector with illumination control

Abstract: A sheet detector having an emitter (lamp), detector (phototransistor), operational amplifier and an RC network. As contamination is deposited on the emitter or detector, a feedback loop provides more drive to the lamp providing sufficient drive to hold the emitter of the phototransistor at its desired stage. As a first copy paper is passed between the emitter and detector, the RC network of a common mode operational amplifier detects a change and generates an output. As a subsequent sheet enters the system, the transmissibility abruptly changes again causing the common mode operational amplifier to provide a subsequent pulse indicating the presence of a multiple feed.

Solid state control system for oil well bailer pump

Abstract: A solid state switching controller for use with various types of oil well bailer pumps. Individually programmable steps with lockouts provide multiple mutual exclusivity between various circuit operations. A trickle charge battery system powers the control circuits. A tank overflow float protects against oil spillage. An automatic production rate adjustment circuit is provided which increases cycle time in proportion to the rate of production. The circuit includes a low power voltage detector for disabling the control circuits until the line voltage is acceptable. A three-phase power and control system with an isolation transformer for the controls avoids unreliable ground connections. The timers include a dividing circuit with an RC circuit. All power actuated apparatus are actuated by triac switches which are controlled by an opto driver. The bailer brake is pulse actuated for allowing the bailer to sink into crude oil without excess cable looseness.

ECL Logic circuit with a circuit for dynamically switchable low drop current source

Abstract: An ECL circuit with a bias circuit is provided which tracks the gain and operating characteristics of other transistors in an integrated circuit. The bias circuit employs the bandgap reference voltage, V CS , as the power source. By a transistor and resistor network a bias circuit voltage is generated. The bias circuit is useful in providing a bias to the base of a dynamically switchable low drop current source useful in ECL circuits.

AC to DC conversion system with current spreading circuit

Abstract: A power supply circuit having a higher power factor and decreased current crest factor. The circuit preferably comprises an input circuit for receiving an input AC voltage and rectifying this voltage and an output circuit for providing a DC output voltage. A pulse-width-modulation circuit intercouples between the input and output circuits and includes a controlled circuit adapted to pass input AC current in pulse-wide increments with the pulse-width varying in inverse proportion to the AC voltage. In this manner, when the instantaneous AC voltage is low, the pulse widths are wider and conversely when the voltage is high, the pulse widths are narrower. In one version of the invention, the pulse width modulation is carried out by a programmed variable ratio transformer. In one preferred embodiment of the present invention, the current spreading circuit is of a quasi cosecant type while in another preferred embodiment of the invention, there is a combination of pulse-width-modulation with a typical input filter circuit including an OR circuit at the output to provide the necessary combining.

Designing active RC biquads with improved performance

Abstract: It is shown that multiamplifier-active RC biquads of significantly better performance than that of known filters can be obtained by using composite amplifiers whose frequency dependence is tailored to the specific filter requirements rather than being designed for the usual criteria, such as maximum bandwidth or minimum phase shift.

Field-effect amplifier device operating in the microwave range, by transfer of electrons.

Abstract: The invention relates to a device whose function is to amplify a microwave signal. It operates in transmission as a field-effect transistor with Schottky gate, but relies on a different amplification mechanism: the field in the channel being greater than the critical field, the differential mobility in the channel is negative. This device includes a semi-insulating substrate 1 and at least one active layer 3, formed as a mesa 13. The upper face of the mesa 13 supports the source 5, drain 6 and gate metallisations. The gate has a complex structure formed of a network of gate bars 9 joined by resistors 10. The bias voltage of the bars 9 grows from one end of the gate, earthed, towards the other end. An insulating layer 11 and a metallisation 12, covering the gate, form capacitors with the bars 9 and an RC circuit with the resistors 10. Application to the amplification of microwave signals within the 10-40 GHz range.

Inverter arcing control for a parallel-resonant circuit static frequency changer

Abstract: An inverter circuit with a thyristor bridge circuit, a load circuit developed as a parallel oscillating circuit connected to the bridge circuit, an impulse generating circuit for supplying ignition pulses to the bridge circuit and an arcing time regulating circuit for controlling the impulse generating circuit in accordance with the arcing time. A down-and-up integrating circuit is triggered by an ignition impulse to integrate down until a discriminator circuit produces a signal indicating zero crossover of the load current, thereafter to integrate up until a second discriminator produces a second signal indicating zero crossover of the load voltage, at which time the integrator output indicates arcing time, and is applied to the time regulating circuit to control the impulse generating circuit.

Maximum Power Transfer for Full-Wave Rectifier Circuits

Abstract: An analysis is done to determine the maximum power transfer conditions for full-wave rectifier circuits. Potential applications noted are implanted medical instruments, inductive power transfer to weapons, power transfer using space reflectors, and power generation in space. Three types of series impedances are considered: resistive/inductive (RL), resistive/capacitive (RC), and resistive/inductive/capacitive (RLC). The optimum ratio of ac-to-dc voltage output is determined for each type. For the case that involves all three impedance types, the optimum turning condition is also determined. The differential equations describing the circuits are solved in nondimensional form. The solutions involve partial differential equations, closed-form relationships, and simultaneous equations that are solved by numerical methods. The optimum ratio of peak ac-to-dc voltage ranges from 2.0 to 2.8, depending upon the circuit. The optimum turning differs significantly from the usual resonant conditions, especially for low Q.

Comments on "Maximum Frequency Indication: Minima Counting Versus Zero-Crossing Counting"

Abstract: The authors' digital counting of minima is the equivalent of the classical method of frequency measurement by zero crossing of the signal after differentiation by an RC network