Showing papers on "RC circuit published in 1984"

Signal Delay in General RC Networks

Abstract: Based upon the delay of Elmore, a single value of delay is derived for any node in a general RC network. The effects of parallel connections and stored charge are properly taken into consideration. A technique called tree decomposition and load redistribution is introduced that is capable of dealing with general RC networks without sacrificing a number of desirable properties of tree networks. An experimental simulator called SDS (Signal Delay Simulator) has been developed. For all the examples tested so far, this simulator runs two to three orders of magnitude faster than SPICE, and detects all transitions and glitches at approximately the correct time.

Power-on reset pulse generator

Abstract: A circuit for generating a pulse is disclosed for resetting certain multi-state elements of an electronic system after the power supply of the system has been activated and said elements have settled. The circuit is composed of an R-C network and a latch. The latch is activated by the power supply and it sets its output to a preselected state. The latch switches to a second state after a capacitor of the RC network is charged to a preselected level. The output of the latch is used to derive the reset signal. The reset signal may be delayed by a delay circuit and amplified and buffered or conditioned by an amplifying stage. The circuit is comprised of elements which may be produced by IC techniques such as CMOS so that it may be implemented on a single IC chip.

Capacitive coupling type data transmission circuit for portable electronic apparatus

Abstract: A capacitive type coupling data transmission system for portable electronic apparatus is comprised of an input circuit, a capacitance changing circuit, a transmitting circuit capacitively coupled to, a receiving circuit, and a detecting circuit for detecting any change in the capacitance changing circuit. A data signal to be transmitted is inputted into the input circuit. Based on the value of an inputted binary digital data signal, the capacitance of the capacitance changing circuit is changed. The capacitance change is capacitively transmitted from the transmitting circuit to the receiving circuit and detected thereat. The detecting circuit may be an oscillator circuit, a an RC differentiating circuit, or an RC integrating circuit.

A unified approach to the realization of canonic RC-active, single as well as variable, frequency oscillators using operational amplifiers

Abstract: A general, unified and systematic approach is employed to study realization of operational amplifier (OA) based sinusoidal RC-active oscillators. Both single frequency and variable frequency operations are investigated. A set of circuits is found for each case. The sets consist of 12 and 16 circuits respectively. The circuits are canonic, that is, they require the minimum number of active and passive components. For each circuit, the single frequency set requires one OA, two capacitors and four resistors, while the variable frequency set needs one OA, two capacitors and five resistors. Both sets are shown to be complete in that generation of any additional canonic circuit is not possible. Variable frequency oscillators are all single resistor controlled. They are classified into four groups according to the nature of their dependence on the variable resistor. All the circuits are laboratory tested. Experimental results agree closely with the theoretical analysis. Representative test results are included.

Detailed analysis of nonidealities in MOS fully integrated active RC filters based on balanced networks

Abstract: The paper gives a detailed account of the effects produced by practical nonidealities in fully integrated balanced RC filters, which are implemented using MOS transistors as replacements for resistors (MOSFET-capacitor continuous-time filters). It is found that the operation of such filters is insensitive to all typical nonidealities, with the exception of the intrinsic distributed parasitic capacitances of the transistors; there are cases when the latter have to be taken into account in the filter design.

Impedance profiles of peripheral and central neurons.

Abstract: The electrical impedance of trigeminal ganglion cells (in vivo) and hippocampal CA1 neurons (in vitro) of guinea pigs was measured in the frequency range of 5-1250 Hz using intracellular recording techniques with single microelectrodes and computerized methodology. The transfer functions of the electrode and the electrode-neuron system were computed from the ratio of fast Fourier transforms of the output voltage response from the neuron and input current composed of sine waves with rapidly increasing frequency which displaced membrane potential by 2-5 mV. We believe these to be the first measurements of complex impedance and transfer functions in peripheral and central neurons of vertebrates and the first use of such input current functions. The majority of trigeminal ganglion cells did not exhibit electrical behaviour ascribable to a simple resistance-capacitance (RC) circuit but showed a hump at low frequencies (5-250 Hz) in the computed transfer function, probably attributable to resonance. The transfer function in less than 20% of the trigeminal neurons could be fitted approximately to a theoretical transfer function (resistance in series with a parallel RC circuit model) providing values for electrode resistance, effective input resistance, and effective input capacitance. The transfer functions measured in hippocampal CA1 neurons were characterized by a rapid fall-off in the low frequency range (less than 200 Hz). Impedance locus plots approximate the locus corresponding to a series RC circuit in parallel with a parallel RC circuit.

CMOS power-up reset circuit for gate arrays and standard cells

Abstract: A power-up reset circuit has a first circuit for sensing a source voltage potential and generating a reset signal at an output when the source voltage potential rises above a threshold level. An input of the sensing circuit is coupled to the source voltage potential to permit a voltage at the sensing circuit's input to follow the source voltage potential during an initial rise of the source voltage potential. The power-up reset circuit further has a second circuit for sensing the source voltage potential and generating a time delayed signal at an output when the source voltage potential rises above a predetermined level. A termination circuit has an input coupled to the output of the second circuit and generates a termination signal at an output coupled to the input of the first circuit to terminate the reset signal in response to the time delayed signal. A feedback switch has an input coupled to the output of the first circuit and couples the terminating circuit to the source voltage potential in response to the reset signal and decouples the terminating circuit from the source voltage potential in response to the termination of the reset signal.

Single current conveyor tunable sinewave RC oscillator

Abstract: A novel sinewave RC oscillator configuration using a single second generation current conveyor (CC II) is presented. The circuit has all its capacitors grounded and the frequency of oscillation ω0 is tunable by a grounded resistor. The active ω0-sensitivity has been shown to be extremely small.

Polarization behavior during high field poling of poly(vinylidene fluoride)

Abstract: The polarization process which takes place during electric poling of poly(vinylidene fluoride) is investigated by measuring the time dependence of currents in poling circuits with varying RC time constants. For applied voltages between 3 and 8 kV (average field strengths 1.2–3.2 MV/cm) and RC values between 10 and 10−3 s, the current‐time behavior, normalized by the corresponding RC time constants and initial current values, can be described by a single curve (quasi‐steady state). Such a representation indicates that the switching of polarization is simply a voltage‐ or field‐induced effect. A phenomenological description of the poling process is presented which allows one to determine the dependence of polarization with respect to the voltage across the sample. The corresponding density function shows a steep rise in polarization at about 2400 V (average electric field strength 1 MV/cm) followed by an exponentially decaying tail toward higher voltages. Implication of such a distribution is discussed briefly.

Constant-current source circuit and differential amplifier using the same

Abstract: A constant-current source circuit and a differential amplifier using the same. The temperature compensation of the output current of the constant-current source circuit is effected by using the threshold voltage characteristic of a transistor such as a MOS transistor or a bipolar transistor. The constant-current source circuit includes one or more constant-current source circuit units. When the constant-current source circuit includes two constant-current source circuit units, one of the units has a positive temperature coefficient and the other has a negative temperature coefficient. The output currents of these two units are combined by a current synthesizing circuit so as to realize any desired temperature characteristic.

GaAs Monolithic Low-Power Amplifiers with RC Parallel Feedback (Short Paper)

Abstract: GaAs monolithic broad-band low-power-dissipated amplifiers with inductive/resistive load and RC parallel feedback circuits have been developed. An inductive load amplifier provides a gain of 8 dB, a 3-dB bandwidth of 2.5 GHz, and a noise figure of 2.7 dB at 1 GHz with less than + 1-V supply voltage and very low-power dissipation of 20 mW. A resistive load two-stage amplifier provides a gain of 15 dB and a 3-dB bandwidth of 2 GHz. Input and output reflection coefficients at 1 GHz are -13 dB and -21 dB, respectively.

Voltage controlled RC oscillator circuit

Abstract: A voltage controlled oscillator circuit is disclosed. A CMOS circuit version is detailed. A relaxation oscillator has its input coupled by way of a voltage follower buffer to the input terminal where the control voltage is applied. The operating frequency is determined by the circuit resistor and capacitor values along with the control potential. A linear frequency versus voltage response is obtained and the circuit will operate at low supply voltages.

Current stabilizer with starting circuit

Abstract: Two current circuits are between two common terminals (+V B and -V B ). The ratio between the currents in the two current circuits is defined by a first current-dividing circuit, and the absolute values of these currents are defined by means of a second current-dividing circuit, in particular a resistor in this second current-dividing circuit. In order to ensure that the current-stabilizing assumes the proper state upon activation, a first current-supply circuit is coupled to the input of the second current-dividing circuit, which current-supply circuit comprises the series arrangement of a resistor and a transistor arranged as a diode, and a second current-supply circuit is coupled to the output of the current-dividing circuit, which second current-supply circuit includes a transistor whose base is connected in common with that of the transistor of the first current-supply circuit.

High-frequency design of sinusoidal oscillators realised with operational amplifiers

Abstract: The use of slew-rate models for designing RC active oscillators is discussed. It is shown that a precise modelling of the oscillator behaviour is obtained for frequencies beyond the ordinary application range of operational amplifiers. Based on that model, a design procedure is developed, and it is applied in the paper to the design of Wien-bridge oscillators, giving theoretical as well as practical results. Low-distortion oscillations may be obtained up to 100 kHz using standard operational amplifiers.

Variable delay gate circuit

Abstract: A gate circuit device of an integrated circuit tester, for variably setting the signal propagation delay time of various integrated circuits to be tested at a predetermined value, includes a gate circuit having a pair of emitter coupled transistors and a constant current source transistor connected to the emitter side of the pair of transistors, and a terminal to apply a predetermined level of voltage to the base of the constant current source transistor to control the constant current. In addition to this manner of the voltage control of signal propagation delay time, a current adjustment circuit is utilized to generate current in a constant current source transistor in response to the control current. Thus, the gate circuit device controls the signal propagation delay time by regulating either voltage or current in response to the control current.

Wave digital biquads derived from RC-active configurations

Abstract: A general method for deriving digital-filter structures from corresponding RC -active configurations is presented. The method is then used to derive digital-filter structures from various low-sensitivity RC -active configurations such as the three-amplifier state-variable biquad, and the corresponding summing four-amplifier biquad. The new digital structures are found to have the salient features of the reference configurations. For example, the structures based on the summing four-amplifier biquad embody the simultaneous realization of a variety of filter transfer functions, namely, a low-pass, a bandpass, and a general biquadratic transfer function. In addition, it is shown that in these structures, limit cycles can be eliminated by using a known technique based on magnitude truncation.

Wide band constant duty cycle pulse train processing circuit

Abstract: A wide band constant duty cycle pulse train processing circuit where the pulse train frequency varies is proposed. The circuit serves primarily to obtain the basic clock in decoding signals encoded in the bi-phase mark code and includes a pulse-shaping or wave-shaping circuit, which receives the data signals and is followed by a low-pass filter; a differential amplifier circuit, one input of which is connected to the output of the low-pass filter and the other input of which is connected to a variable voltage source; and a current source, controlled by the differential amplifier circuit, at the input of the wave-shaping circuit determining the pulse length. The closed control loop between the output and the input of the wave-shaping circuit that determines the pulse length causes the duty cycle established at the variable voltage source to be maintained over wide ranges of the incident pulse train frequency.

Differential amplifier using a constant-current source circuit

Abstract: A constant-current source circuit and a differential amplifier using the same. The temperature compensation of the output current of the constant-current source circuit is effected by using the threshold voltage characteristic of a transistor such as a MOS transistor or a bipolar transistor. The constant-current source circuit includes one or more constant-current source circuit units (CS1, CS2). When the constant-current source circuit includes two constant-current source circuit units, one of the units (CS1) has a positive temperature coefficient and the other (CS2) has a negative temperature coefficient. The output currents of these two units are combined by a current synthesizing circuit (Q1, Q2) so as to realize any desired temperature characteristic.

Frequency discrimination circuit

Abstract: The frequency discrimination circuit includes a monostable circuit into which an input signal is fed and a D-type flip-flop connected to the output side of the monostable circuit for generating a frequency discriminated signal. The circuit further includes a time constant modifying circuit for modifying a time constant of the monostable circuit according to the frequency discriminated signal from the D-type flip-flop.

Protection of radiation detectors from fast neutron damage

Abstract: A circuit for biasing a solid state crystal used as a radiation detector inhich the passage of the initial gamma ray pulse from the explosion of a nearby tactical nuclear weapon is utilized to temporarily remove the bias from said crystal for a time sufficient to permit the fast neutron pulse from the same explosion to pass by without permanently damaging the counter crystal. The circuit comprises an RC circuit between the bias supply and the crystal with a reverse biased diode across the capacitor.

Clock phase fine adjusting circuit

Abstract: PURPOSE:To finely adjust clock phase by providing an RC circuit and a comparator in a repeater of digital communication and using an emitter follower for resistance of the RC circuit. CONSTITUTION:When a clock signal of a waveform (1) is inputted to the RC circuit and an input of RC, rise and fall parts are made dull as shown by a waveform (2). This is compared with reference voltage Vref by a comparator COMP and a signal of a waveform (3) is outputted. By adjusting current ie of a transistor Q that acts as an emitter follower, the time constant due to internal resistance and capacity C can be changed, and accordingly, its phase difference can be adjusted. Thus, as the phase of the clock can be adjusted finely, clock signals can be adjusted most suitably in a superhigh-speed repeating circuit.

Internal time-out circuit for CMOS dynamic RAM

Abstract: A delay circuit for internal clock generation in a dynamic RAM uses a one-shot multivibrator composed of a pair of cross-coupled CMOS NOR gates with a RC delay circuit in the coupling path between the output of one NOR gate and the input of the other. The RC delay circuit uses an MOS transistor as the resistor, with the gate of this device connected to the supply voltage, so the resistance varies with changes in the supply. A CMOS inverter stage in the delay circuit has its input connected across the capacitor of the RC delay, so the trip point will vary with threshold voltage. In a dynamic RAM, this circuit may be used to establish the critical timing between write and read mode.

N-ary input to n-1 binary outputs level shift circuit for I2 L

Abstract: A circuit for level adaptation between an I 2 L circuit and a preceding combinatory logic circuit. The input current for the I 2 L circuit is supplied by a direct current source which is connected to several switches which are controlled by the level on the output of the combinatory logic circuit, at least one of the outputs thereof being connected to an input of the I 2 L circuit via a current mirror.

New general biquadratic active RC and switched-capacitor filters

Abstract: An active RC filter capable of realising a general biquadratic transfer function, using two operational amplifiers with grounded noninverting inputs, is described. Its application to the realisation of SC filters using 'p-transformation' is also discussed.

State-space noise calculation for single-operational-amplifierRC filters

Abstract: A state-space technique of noise calculation for single-operational-amplifer second-orderRC active filters is developed. The technique makes use of the vector transfer functionG(s) being the dual of the state vector transfer functionF(s) and being identified as the voltage induced at the system output by a unit current per unit capacitance flowing in the integrating capacitors. Examples of the state-space noise calculation technique are given for the well known multiple-feedback and Sallen-Key second-order filters. The results agree very well with the noise expressions derived previously using conventional techniques.

Power steering controller

Abstract: PURPOSE:To prevent the sharp variation of a steering force by detecting the anomaly of the captioned apparatus from the relative relation between a steering assisting force adjusting signal and the signal for the current signal to a steering assisting force generating means and switching the closed-loop control to the opened-loop control. CONSTITUTION:The captioned apparatus is equipped with a standard-voltage characteristic generating circuit 2 which generates the adjusting voltage which varies according to the output of a car-speed sensor 1, and the output is input into an error amplifying circuit 3 and a back-up circuit 13. In the error amplifying circuit 3, the difference between the output of the above-described generating circuit 2 and the output of a measuring means (resistor 8 and amplifying circuit 9) which generates the measuring signal for the current signal to a linear solenoid 7 for generating a steering assisting force is obtained, and the difference is compared, in a comparison circuit 4, with the triangular-wave voltage of a triangular-wave oscillating circuit 5. The output of the comparison circuit 4 is input with the output of an anomaly detecting circuit (standard- voltage generating circuit 10 and comparison circuit 11) and a back-up circuit 12 into a selecting circuit 12, and the linear solenoid 7 is controlled by the output of the selecting circuit 12.

A simple predistortion technique for active filters

Abstract: This article deals with the predistortion of active- RC filters to compensate for the accountable nonideal performance of the operational amplifiers (OA's). In particular, the predistortion attempts to compensate the effect of the finite gain-bandwidth product (GB) of the OA's. This method can be used for circuits consisting of any number of OA's. The method realizes not only the specified pole frequency \omega_{\rho} and pole Q factor Q_{\rho} as some other methods do, but also the exact gain requirement at a specified frequency of importance. In specific examples, it will also be shown how to choose the parameters in the network to attain minimum pole sensitivity due to the GB's of the OA's, while predistortion is achieved. This method is simple enough that the design of most second-order active- RC filters can be implemented in a programmable calculator.

A Hierarchical Timing Simulation Model for Digital Integrated Circuits and Systems

Abstract: A hierarchical timing simulation model for digital MOS circuits and systems is presented. This model supports the structured design methodology, and can be applied to both "structure" and "behavior" representations of designs in a uniform manner. A simulator based on this model can run several orders of magnitude faster than any other simulators that offer the same amount of information. At the structure (transistor) level, the transient behavior of a digital MOS circuit is approximated by that of an RC network for estimating delays. The Penfield-Rubinstein RC tree model is extended to include the effects of parallel paths and initial charge distributions. As far as delay is concerned, a two-port RC network is characterized by three parameters: R: series resistance, C: loading capacitance and D: internal delay. These parameters can be determined hierarchically as networks are composed in various ways. The composition rules are derived directly from the Kirchoff's current and voltage laws, so that the consistency with physics is established. The (R, C, D) characterization of two-port RC networks is then generalized to describe the behavior of semantic cells at any level of representation. A semantic cell is a functional block which can be abstracted by its steady-state behavior to interface with other cells in the system. As semantic cells are composed, the parameters of the composite cell can be determined from those of the the component cells either analytically or by simulation. A Smalltalk implementation of the hierarchical timing simulation model is also presented.

Tachymetric simulation method processing signals from an inductive position transducer and circuit for carrying out said method

Abstract: A method and relative circuit in which, signals (sin φM, cos φM) detected by an inductive transducer, supplied by a suitable oscillator, are caused to pass through a RC circuit, to obtain an output signal (VA) out of phase by an angle (φM) proportional to the angle between the polar axis of the rotor and the polar axis of the stator of the transducer, in the case of a rotary detector. Two sets of signals are separately processed: the first set comprises the output signal of the oscillator (fr) and the output signal from the circuit RC (VA); the second set comprises the output signal from the circuit RC (VA) and a signal having the same frequency as the output signal from the oscillator, but out of phase by a fixed angle (F2). Each of these sets, are made to pass through a circuit for detecting the equivalence or not equivalence of the polarity of the input signals, then filtered, derived, in case inverted and then selected by a selecting means to output a tachymetric signal of infinite resolution.