Showing papers on "RC circuit published in 1986"

Analog MOS Integrated Circuits for Signal Processing

Abstract: Transformation Methods. MOS Devices as Circuit Elements. MOS Operational Amplifiers. Switched-Capacitor Filters. Nonfiltering Applications of Switched-Capacitor Circuits. Nonideal Effects in Switched-Capacitor Circuits. Systems Considerations and Applications. Index.

Accurate simulation of power dissipation in VLSI circuits

Abstract: It becomes increasingly more important to reduce the power dissipation as the number of devices in VLSI increases. Accurate simulation of power dissipation is desirable while circuits are analyzed with circuit simulators such as SPICE. An accurate method is presented for simulating the power dissipation with use of a dependent current source and a parallel RC circuit. The steady-state voltage across the capacitor reads the average power drawn from the supply voltage source. Simulation results are shown for CMOS circuits.

Novel MOS resistive circuit for synthesis of fully integrated continuous-time filters

Abstract: This paper describes a new MOS resistive circuit containing four matched MOS transistors. It allows to fully integrate known active RC filter structures on a single chip without externals components. Integrator, summer and lossy integrator circuits with a single operational amplifier are shown. The new circuits improve on previously suggested MOS active filters.

Electronic delay detonator

Abstract: An electronic delay detonator for igniting an ignition resistor a predetermined delay time after supply of electric power from a blasting machine comprises two input terminals for receiving the electric power supplied from the blasting machine, a diode-bridge circuit connected to the input terminals, a power supply capacitor connected to the output of the diode bridge circuit, an RC charging circuit connected in parallel with the capacitor and having a predetermined time constant, and a monolithic IC. The monolithic IC includes a reference generation circuit for generating a compare reference voltage by dividing the power supply by dividing resistors, a voltage comparator for comparing the voltage charged in the capacitor of the charging circuit with the compare reference voltage, a signal latch circuit for holding the output of the comparator and a transistor current switching circuit responsive to the output of the signal latch circuit to for supplying the electric energy of the power supply capacitor to the ignition resistor of the detonator. The overall circuit is in a hybrid IC module. A resistor having a constant resistance sufficiently distinguishable from an internal resistance of the detonator is connected across the two input terminals to bypass a stray current and enable checking of connection continuity of series-connected detonators.

Alternator circuit arrangement useful in liquid level control system

Abstract: Alternator circuit arrangement (20) for controlling the electrical energization of multiple load devices such as two pump motors (41,42) on an alternating basis so as to maintain the level of a liquid (86) in a container (84) within a predetermined range The alternator circuit arrangement (20) further including an RC circuit (54) having a capacitor (62) for discharging through a normally closed switch (50b) which is opened during energization of the pump motors (41,42) so as to energize a bi-stable relay (52) which in turn interconnects alternate ones of the pump motors (41,42) to the alternator circuit (20) such that upon detection of the liquid (86) at an intermediate level (96) alternate ones of the pumps (41,42) are energized

Monolithic RC All-Pass Networks with Constant-Phase-Difference Outputs

Abstract: All-pass network techniques have made it possible to realize very small monolithic lumped active phase shifters with decade bandwidths, high yield, and relative phase stability, even when the device parameters vary +-20 percent. We have successfully demonstrated fully monolithic first-order networks (at 250 MHz) and second-order networks (at 4 GHz).

Self-tuned RC-active filters for VLSI

Abstract: A technique is presented for automatically tuning integrated-circuit active RC filters. The control circuit uses a combination of digital and switched-capacitor techniques and is suitable for implementation in MOS technology. Simulated performance for an 80kHz third-order lowpass filter is given and indicates that the degradation of linearity due to the tuning technique is minimal.

Equalizer for digital transmission systems

Abstract: A post-equalizer and pre-equalizer circuit for use in communicating between nodes in a Pulse Amplitude Modulated (PAM) digital or analog communication system is described. The post-equalizer circuit comprises a first variable zero circuit, a second variable zero circuit, and a gain shaper circuit wherein the gain and frequency location of the zeros in the zero circuits combined with the gain of the gain shaping circuit are simultaneously controlled by a control circuit which generates a control voltage which is a monotonically increasing function of cable loss. In the case of a PAM digital communication system, the control voltage generates a signal equal to the difference between the equalized signal and the original transmitted signal which is used to vary the resistance of voltage variable resistors in the form of FET's in each of the zero circuits and gain shaper circuits. In the case of an analog system, the control voltage is derived from the sealing current that is determined by the DC resistance of the cable to be equalized. If the cable loss is above a predetermined value, a pre-equalizer circuit is switched into the transmit path of the communication system and provides a gain, zero and pole at predetermined frequencies which pre-compensates for the extra loss incurred in transmission over length greater than can be equalized by the post-equalizer. Additionally, a bi-quad ACE circuit is described which provides a hyperbolic relationship between the zero frequency location and circuit gain utilizing a cascode amplifier and emitter follower circuit with a feedback loop through a voltage variable resistor.

Semiconductor memory device having test pattern generating circuit

Abstract: A semiconductor memory device comprises an internal circuit including a memory circuit; a test pattern generating circuit (10); an element for receiving external signals supplied from the outside; and an input switching circuit (20) connected between the test pattern generating circuit (10) and the receiving element, for switching the input supplied to the internal circuit between output signals generated from the test pattern generating circuit (10) and the external signals, the output signals generated from the test pattern generating circuit (10) being input to the internal circuit through the input switching circuit (20) in a test mode, the external signals being input to the internal circuit through the input switching circuit (20) in a usal mode; the test pattern generating circuit (10), the input switching circuit (20), and the internal circuit being provided on the same chip

MACDAS: Multi-level AND-OR Circuit Synthesis Using Two-Variable Function Generators

Abstract: MACDAS (Multi-level AND-OR Circuit Design Automation System) designs a multi-level circuit with fan-in limited AND-OR gates. In MACDAS, a given specification is converted into an AND-OR two-level circuit; input variables are paired to produce an AND-OR two-level circuit with two-variable function generators; some of the outputs are complemented to obtain a circuit with fewer AND gates; the circuit is transformed into a multi-level fan-in limited AND-OR circuit; and finally the circuit is optimized by local transformations. MACDAS has been programmed in FORTRAN and C, and runs on a personal computer. Both arithmetic and control circuits are designed to show the performance of MACDAS.

Relaxing Bounds for Linear RC Mesh Circuits

Abstract: A new algorithm that produces a sequence of closed-form upper and lower bounds on the response of a very general class of linear RC networks is presented in this paper. The bounds approach arbitrarily close to the actual response by using a successive relaxation method. Since the accuracy of the final bounds can be improved through additional computation, the algorithm is more flexible than previous bounding algorithms. Furthermore, the class of networks considered is more general. The new bounding algorithm treats leaky, linear RC mesh networks in which all capacitors and voltage sources are grounded. Such networks are often used to model large digital MOS circuits in timing analysis programs. The general theory behind the algorithm is presented along with some experimental results.

Experimental study of the frequency limits of a resonant tunneling oscillator

Abstract: An equivalent circuit obtained from microwave impedance and power data is proposed for a resonant tunneling diode. The four‐element circuit consists of a series R and C in parallel with a nonlinear negative differential conductance −G, the combination in turn in series with a resistor r. The resistive cut‐off frequency predicted by this model depends on both the RC and RG products. Detection at THz frequencies is also explained by the model.

Ballast adaptor for improving operation of fluorescent lamps

Abstract: A ballast adaptor circuit which makes it possible to convert a conventional two lamp rapid start T12 ballast for operation of two T8 fluorescent lamps and by means of a simple modification that does not require cutting wires or extensive rewiring of the T12 ballast device. The adaptor circuit comprises an auxiliary circuit including a tuned series-parallel LC network connected in parallel with either one or both of the lamps. The LC network is tuned to supply an odd harmonic current to the lamps, preferably the seventh harmonic. Improved starting is achieved by adding a series RC circuit and a SIDAC trigger device to the network to produce voltage pulses at the peaks of the AC supply voltage.

Combined pacemaker delta modulator and bandpass filter

Abstract: A combined pacemaker delta modulator and bandpass filter which requires only one active device. The sense signal is applied through a conventional delta modulator capacitor to the minus input of a differential amplifier, and the conventional current sources are connected to the minus input. Instead of simply connecting the plus input to a reference potential, however, it is also coupled, through a resistor, to the input signal, and an RC network is connected across the two inputs.

Low pass filter circuit

Abstract: A low pass filter circuit for filtering out high frequency AC components from an electric signal including a DC component and possibly low frequency AC components is disclosed herein. This circuit includes a first order, low pass RC filter network, free of any active elements, for receiving a signal at an input and passing the entire DC component and any low frequency AC components present in the signal to an output. The circuit also includes circuitry utilizing at least some active components and a predetermined transfer function for filtering out high frequency components in the signal over a predetermined, relatively narrow roll-off frequency band. This latter circuitry cooperates with the RC network so that the operation of its active elements does not act on the DC component of the signal and therefore does not affect the amplitude of the DC component as it appears at the output.

Precise insensitive tunable RC-oscillator realisation using current conveyors

Abstract: Using second generation current conveyor (CCII) active elements, some new RC-oscillator configurations are proposed, which are based on grounded FDNR (D) driving point immittance realisation. Generation of a pole pair located precisely on the imaginary axis, even with nonideal CCII elements, can be achieved with suitable design. The active Sw0 and SD sensitivities are quite low, and with matched CCII characteristics, these sensitivities can be made zero for some realisations. In all the proposed configurations, w0 is single grounded-resistor tunable and both the capacitors are grounded.

Delta modulation encoding/decoding circuitry

Abstract: An adaptive delta modulation circuit having an analog adaptation circuit and an integrator circuit. The adaptation circuit exponentially converts a voltage which is proportional to the average of a time duration of an overload control signal to an adaptation current which is averaged and converted to an adaptation voltage. An integrator circuit includes a sole switch which shorts to ground a circuit point for generating an analog signal formed of line segments; each segment has a slope magnitude controllable by the adaptation voltage.

Jitter correction circuit

Abstract: A jitter correction circuit is a circuit for suppressing a jitter contained in a reproduced digital signal. This jitter correction circuit comprises a phase-locked loop circuit comprising a phase comparing circuit (9), a second low-pass filter (10), a second voltage control oscillator (11) and a second frequency dividing circuit (12). The phase-locked loop circuit provides an oscillation output which causes little influence to a jitter component contained in a reproduced signal digitally converted by an analog-to-digital converting circuit (1). The digitally converted reproduced signal is resampled in a sampling pulse generating circuit (13) and a resampling circuit (7) which operates based on the above stated phase-locked loop circuit. As a result, the resampling circuit (7) provides an output having a considerably decreased amount of jitter.

Telephone off-hook detector circuit

Abstract: A circuit for connection into a telephone line for detecting when a telephone instrument has gone off-hook and which is unaffected by the presence of a ringing signal on the telephone line. The circuit comprises a transistor switch, a first plurality of series connected diodes connected in series with the telephone line for developing a first voltage thereacross when the telephone instrument has gone off-hook, an RC circuit coupled to the first plurality of diodes for charging to the first voltage when the telephone instrument has gone off-hook after a time delay and for activating the switch, a second plurality of series connected diodes, the second plurality being greater than the first plurality, the second plurality of diodes being connected to the switch and to the first plurality of diodes for developing a second voltage thereacross during one half cycle of a ringing signal on the telephone line. The first plurality of diodes develops the first voltage during a second half cycle of the ringing signal on the telephone line. The first and second voltages are of opposite polarity, such that the charging circuit alternately charges toward the first and second voltages during a ringing signal. The charging circuit has a time constant such that it never charges to a voltage during a half cycle of the ringing signal sufficient to activate the switch and on the average, the charging circuit maintains the control input of the switch substantially intermediate the first and second voltages.

A distributed RC network model with dielectric loss

Abstract: A linear time-invariant RC distributed network composed of a series conductive field shunted by a resistive-capacitive layer is considered The circuit is described by a system of partial differential equations together with boundary and initial conditions This initial-boundary-value problem is of the semi-state form in infinite dimensional space and it is shown to be well posed Any discontinuities in initial data persist with an exponential decay rate determined by the dielectric layer

Power supply device for electronic tuner

Abstract: PURPOSE: To simplify the circuit and to expand the degree of design freedom by using a source bias circuit for an FET or the like for a current load circuit of a channel switching diode of an antenna circuit so as to separate and make a switching circuit and a bias circuit independent. CONSTITUTION: Switching diodes 1∼4 are turned on at the reception of a high channel and a load circuit of the consumed current is a source bias resistor circuit of an RF amplification MOSFET 14. Then, a bias is impressed to a local oscillation circuit, a mixer circuit and the RF amplifier to separate and make the switching circuit and the bias circuit independent. Similarly, at the reception of a low channel, the switching circuit and the bias circuit are separated and made independent to simplify the circuit constitution, the bias voltage at the reception of both the channels is used in common to make the current consumption constant, the operating voltage of the switching diodes is expanded and the degree of design freedom of the bias resistor for the switching diodes is increased. COPYRIGHT: (C)1988,JPO&Japio

Basic AC Circuits

Abstract: Introduction to Alternating Current AC and the Sine Wave The Oscilloscope and Its Use The Sine Wave and Phase Resistive Circuits Capacitance RC Circuit Analysis Inductance and Transformers RL Circuit Analysis RC and RL Time Constants RLC Circuit Analysis Phasor Algebra Complex RLC Circuit Analysis Resonance

Active Rc Filter Design

Abstract: 1. Introduction. 2. Characterization of Filters. 3. Approximation of the Transfer Function. 4. Active RC Synthesis. 5. Sensitivity and Tolerances. 6. Active RC Filter Sections. 7. Design Optimization and Manufacture of Active RC Filters. 8. Design Examples. 9. Filter Design Tables. 10. Function Tables. Bibliography. Index.

High speed address transition detector circuit for dynamic read/write memory

Abstract: A transition of an address input of a memory device is detected in a CMOS circuit having a pair of AND gates Or'ed together. One AND gate receives the input bit and a delayed complement of this bit. The other AND gate receives the complement of the input bit and a delayed version of the true bit. The delays are RC circuits with time constants longer than the transition times. The output of the gates uses a pull-up device to restore a zero level after each transition is indicated. A number of these transition detectors may be OR'ed together to monitor all of the address bits of a memory device.

Computer program for nonlinear least square analysis of impedance and admittance data

Abstract: A computer program to estimate the parameter value from the complex impedance data of the equivalent circuit is reported. Non-linear complex least squares fitting is made using a laboratory microcomputer (with real values). Different values are used as the initial guess in the iterative calculation of complex least-square method which fits both real and imaginary components of the actual impedance. The program is tested for simple RC circuits which are generally used to model the electrochemical system by introducing random experimental errors and it is found to converge within a few number of iteration.

Speed control circuit for AC motor

Abstract: The invention discloses a speed variator for an AC motor included preferably in a food processing apparatus. The variator comprises a controllable switching member, such as a triac, and an RC circuit for regulating the motor speed to a predetermined speed. A current compensating circuit is provided, connected across the terminals of capacitors in the regulating circuit and to a terminal of the variator for compensating a current increase to maintain the predetermined motor speed regardless of the fluctuations of the load torque on the motor during motor operation.

Contribution to the linear theory of frequency stability of RC oscillators

Abstract: In this paper, the frequency stability problem in RC oscillators is considered. General expressions describing variations of the real and imaginary parts of the characteristic equation roots, caused by variations in network elements' parameters, are developed. The superiority of our approach over the previously presented ones is that it allows to describe not only slow variations (long-term stability) but also fast variations (short-term stability) of oscillation frequency. It is shown that the so-called frequency stability factor S_F can be a reasonable criterion of frequency stability only for some types of RC oscillators. In this context, oscillators with the selective feedback path being of bandpass or bandreject type and with some additional resistive feedback path of the maintaining amplifier are discussed in detail.

Wideband amplifier with active high-frequency compensation

Abstract: A wideband amplifier with active high-frequency compensation includes an active equivalent RC network connected across the emitters of a differential amplifier. The active RC network exploits inherent junction capacitance and resistance, and is controlled in such a manner that the desired compensation value is provided.

Circuit for generating a reference voltage having a predetermined temperature drift

Abstract: A circuit for generating a reference voltage with a predetermined temperature drift includes a supply circuit; output terminals; a series circuit connected to the supply circuit and between the output terminals including a network and a circuit for generating an electrical variable having a positive temperature coefficient; and a regulator for negative feedback of an operating point setting having an input circuit connected to the circuit for generating an electrical variable having a positive temperature coefficient and an output circuit connected to the output terminals.

Voltage controlled oscillator suited for being formed in an integrated circuit

Abstract: A voltage controlled oscillator comprises a tank circuit for determining an oscillation frequency, a first circuit for delaying the signal having the oscillation frequency, a second circuit for advancing the signal having the oscillation frequency, the first and second circuit being connected in series, a third circuit interposed between the tank circuit and the series connection of the first and second circuits, the third circuit having the same equivalent circuit of the series connection, a first gain controlled amplifier amplifying the output from the first circuit, a second gain controlled amplifier amplifying the output from the second circuit, an adder for adding outputs from the first and second gain controlled amplifiers, a control circuit controlling the gains of the first and second gain controlled amplifiers, and a feed-back circuit for feeding the output of the adder to the tank circuit.