Showing papers on "RC circuit published in 1990"

Generation of OTA-C filter structures from active RC filter structures

Abstract: The nodal voltage simulation method has been employed previously to derive new active RC and MOSFET-C filters from well-known active RC filters. This technique is shown here to also be useful for obtaining new OTA-C filters from well-known active RC filters. Specifically, it is shown how OTA-C biquads can be directly generated from active RC filters while retaining their useful properties. >

Generic linear RC delay modeling for digital CMOS circuits

Abstract: The linear RC delay modeling technique is used to model the timing delays in CMOS circuit empirically. The empirical model, a multidimensional function of various circuit and device parameters, is shown to be simplified to a two-dimensional model which estimates the delay of a CMOS subcircuit in terms of the generic RC delay ad the rise/fall time of the input transition. Accuracy limitations of the linear RC delay model are investigated; namely, (i) the single-time-constant approximation on the multiple-pole network function; (ii) the linear resistance approximation on the nonlinear MOSFET characteristic; and (iii) the step-input waveform assumption. These accuracy problems are handled by: (1) presenting an accuracy measure of the simpler model and an option for using the more accurate two-time-constant model; (2) exploiting the nonlinear body effect in the transmission gate to improve the linear resistance characterization; and (3) using the piecewise-linear characterization on the input rise/fall time effect. The model has been installed in an experimental simulator and tested for various circuits. Comparisons are made with SPICE to validate the model reliability. >

Driver system and distributed transmission line network for driving devices under test

Abstract: A distributed transmission line network for connecting a plurality of DUTs to a low-power driver includes a plurality of distributed transmission lines with distributed capacitors. The distributed capacitors are added to the distributed transmission lines to make the propagation delay on each line equal, thereby eliminating skewed input signals to the DUTs. The capacitors also minimize capacitive cross-talk between the plurality of distributed transmission lines. The distributed transmission line network includes a driver with an internal resistance that is much less than the characteristic impedance of the distributed transmission line to minimize the voltage drop at the driver. The distributed transmission line also includes an input RC network for speeding rise time and a termination RC network for minimizing reflections in the distributed transmission line.

Uninterruptible power supply apparatus and isolating method thereof

Abstract: A commercial alternating current power source is provided to a first frequency converting circuit (PC1) through a filter circuit (F) and a reactor (LAC). A high frequency switching power supply circuit (15) of the first frequency converting circuit is switched in response to the commercial alternating current power source to output high frequency power. The high frequency power is transferred to a second frequency converting circuit (PC2) through dielectric materials in capacitors (C1, C2) using electric field thereof as a transfer medium. In the second frequency converting circuit, a rectifying circuit (70) rectifies the high frequency power, so that a charging circuit 72) charges a back-up battery (BT) in response to a rectified output. An inverter 77 included in the second frequency converting circuit is switched to output alternating current power, in response to the output of the first frequency converting circuit when the power source is normal, and in response to the battery when the power source is interrupted, respectively. An isolation barrier 44 of the capacitors isolates the second frequency converting circuit from the first frequency converting circuit, whereby an isolation circuit can be made lighter and more compact.

Circuitry for processing an analog signal obtained by scanning a bar code

Abstract: A circuit for processing an analog electric signal which is obtained from a photoelectric transformation of a reflected light when scanning a bar code by a light beam. The circuit includes a differentiating circuit for differentiating the analog electric signal, a delay circuit for delaying the output of the differentiating circuit; a first gate signal generating circuit for generating a first gate signal which is active when the level of the output of the differentiating circuit is higher than a positive threshold, a second gate signal generating circuit for generating a second gate signal which is active when the level of the output of the differentiating circuit is lower than a negative threshold, and a comparing circuit for comparing the output of the differentiating circuit with the output of the delay circuit. The output of the comparing circuit being one binary level when the level of the output of the differentiating circuit is higher than the level of the output of the delay circuit, and the output of the comparing circuit is the opposite binary level when the level of the output of the differentiating circuit is lower than the level of the output of the delay circuit. A first gate circuit for detecting transition points in the output of the comparing circuit when the first gate signal is active, and a second gate circuit for detecting transition points in the output of the comparing circuit when the second gate signal is active, are also provided.

CR-type oscillator circuit

Abstract: A CR-type oscillator circuit of the invention includes a reference resistor; a current mirror circuit for taking out the current flowing in the reference resistor; and a reference capacitor whose charging and discharging is repeated by the current taken out by the current mirror circuit within a predetermined potential changing range which is determined by a resistor divider network formed by a plurality of resistors connected in series. The oscillator circuit further includes a control circuit for maintaining at a constant value the ratio between the potential changing range of the charging and discharging of the reference capacitor and the potential difference developed across the reference resistor. The CR-type oscillator circuit of the invention generates stable oscillation frequency which has no dependency on the power supply voltages or the threshold voltages of the transistors concerned.

Push-pull output stage of integrated circuit providing enhanced high-low voltage level signal transition with ground bounce control

Abstract: A push-pull output stage of an integrated circuit for generating a pulse-like output signal in dependence upon a pulse-like input signal. The push-pull output stage includes complementary output field-effect transistors which are formed by respective first and second groups of parallel-connected subtransistors (P1 to P4; N1 to N4), the subtransistors in each group being of the same conductivity type and opposite from that of the subtransistors in the other group. A resistance element (TP0 to TP3; TN0 to TN3) is connected into the lead to each gate electrode of each of the subtransistors (P1 to P4; N1 to N4) of the two groups of subtransistors. A disconnecting field-effect transistor (PD1 to PD4; ND1 to ND4) is associated with each subtransistor (P1 to P4; N1 to N4) of the two groups of subtransistors. Connected in parallel with each group of subtransistors (P1 to P4; N1 to N4) is a control field-effect transistor (MN, MP) of respective opposite conductivity type which is connected as a source follower with respect to the input signal and the output signal. The subtransistors of each group and the resistance elements corresponding thereto form a distributed RC network to facilitate high-low voltage level signal transition of the signal during the operation of the integrated circuit, while the control transistor enhances the edge steepness of the signal in the center region of the signal when undergoing a transition. The push-pull output stage thereby inhibits ground bounce from the overshoot of the pulse-like signal which could cause an inaccurate interpretation of the voltage level of the pulse-like signal.

Bandgap threshold circuit with hysteresis

Abstract: A combined CMOS/linear circuit employs a voltage reference circuit to provide a temperature compensated V REF output. The circuit includes means for switching the reference circuit off and on in response to the signal on an enable terminal. The voltage reference circuit includes a current mirror feedback which is positive in nature to provide a controlled hysteresis action. This provides noise immunity for the enable input. A digital output indicator is included to indicate the state of the reference circuit.

High voltage modified cascode circuit

Abstract: A new type of high voltage FET circuit has been developed which offers a dramatic improvement in performance as compared to a common source amplifier stage. The new circuit offers inherent performance advantages in both MIC and MMIC power amplifiers. To achieve this end, the FET circuit has a common source FET connected to a common gate FET, with the common source FET having a width substantially greater than that of the common gate FET such that the common source FET does not saturate even when the common gate FET is turned fully on. To provide biasing for the circuit such that its breakdown voltage can be substantially increased, a RC circuit including a connected in parallel diode is used.

Slope compensation circuit for stabilizing current mode converters

Abstract: A control circuit having slope compensation includes a current reference circuit for providing a reference current at an output. A resistor is coupled to the current reference circuit for varying the reference current. A current mirror circuit has a plurality of outputs, and an input which is coupled to the output of current reference circuit for receiving the reference current. A capacitor is coupled between a first one of the plurality of outputs of the current mirror circuit and a first supply voltage terminal. A charging/discharging circuit is coupled to the capacitor and to a second one of the plurality of outputs of the current mirror circuit for charging the capacitor to a first predetermined voltage at a first rate and discharging the capacitor to a second predetermined voltage at a second rate wherein the signal appearing across the capacitor is a ramp voltage signal. A level shift circuit is coupled to the first one of the plurality of outputs of the current mirror circuit for voltage shifting the ramp voltage signal across the capacitor by a predetermined amount. A multiplier circuit is coupled to the level shift circuit and responsive to the reference current supplied from a third one of the plurality of the outputs of the current mirror circuit for providing a ramp current signal at an output, the peak voltage of the ramp current signal being a function of the value of the resistor wherein the ramp current signal at the output of the multiplier circuit can be utilized to provide slope compensation to a signal supplied at an input of the control circuit.

Input circuit operable under different source voltages in semiconductor integrated circuit

Abstract: An input circuit provided in a MOS semiconductor IC having a compatible characteristics with an external TTL circuit. The input circuit comprises a circuit for generating a fixed reference voltage without depending on any supplied source voltage level, and a circuit for comparing the input voltage with the reference voltage. Therefore, a fixed margin for detecting the logic value of the input signal can be ensured regardless of whether the source voltage supplied is either 3.0 volts or 5.0 volts.

Switching power source with inrush current limiting circuit

Abstract: A switching power source having a rectifier circuit and smoothing capacitor for obtaining a dc power from an ac input, an oscillator circuit constructed of a serial circuit of a primary winding of a power transformer and a switching element for intermittently turning on and off the dc power, the power transformer having another winding of the power transformer for detecting the oscillation state of the oscillator circuit, and a rush current preventing circuit constructed of a parallel circuit of a resistor and a thyristor for turning on the thyristor upon reception of a signal from another winding, the rush current preventing circuit being connected at the input side of the rectifier circuit or between the output side of the rectifier circuit and the smoothing capacitor, the switching power source comprising a detector circuit for generating a signal when the interception period of the ac input exceeds a first setting time; and an oscillation stopping circuit for stopping the operation of the oscillator circuit for a second setting time in response to the signal from the detector circuit, and when the ac input is supplied at the time other than while the operation of the oscillator circuit is being stopped for the second setting time in response to the signal from the detector circuit, directly starting the operation of the oscillator circuit after a lapse of at least the second setting time after the time when the ac input was supplied

Two-lead igniter for HID lamps

Abstract: A universal two-lead igniter (20) for high intensity discharge lamps (18) includes a first parallel RC network (21, 22) connected in series circuit with a second network (23, 24, 25) between the two terminals sof the igniter. The second network may include a second parallel RC network (24, 25) coupled to the first RC network via a voltage-responsive bidirectional switching device (23), such as a Sidac. Alternatively, the second network may include a second capacitor (25) and an inductor (26) connected in series with the Sidac device. The igniter is adapted to be connected in parallel with the lamp and generates, by means of a resonant type of operation of the first and second networks, a high frequency, high voltage pulsatory open circuit voltage that provides more reliable ignition of a HID lamp.

Detector of the regulated voltage two wire type

Abstract: A detector of the two wire type with regulated voltage is disclosed, comprising a sensor and a switching device. The switching device comprises a series voltage regulation circuit, a parallel voltage regulation circuit and switching circuit. The latter receives the output signal from the sensor for alternately activating the series circuit in a first state of the signal and the parallel circuit in a second state of the signal.

Voltage as a function of temperature stabilization circuit and method of operation

Abstract: There is disclosed a circuit and method for providing bias voltage levels which are precisely controlled as a function of temperature. The circuit is arranged to mix a precise bandgap regulated voltage with a temperature compensated circuit to provide the required output. The temperature compensated circuit is in turn arranged to mimic the temperature sensitive components in the output circuit. A reduced voltage level is created which introduces no temperature related voltage changes.

Phase locked loop (PLL) circuit having enhanced frequency selection range

Abstract: A phase locked loop (PLL) circuit comprises a phase comparator, a low-pass filter, an error amplifier, and a voltage controlled oscillator (VCO) circuit which includes a current mirror circuit section and oscillator circuit section to provide an oscillation frequency based on the output current of the current mirror circuit section. To vary the oscillation over a wide range, a fixed reference voltage circuit is connected to the current mirror circuit, and either a source follower circuit made of a MOSFET or a FET or an emitter follower circuit made of a bipolar transistor is included is also connected to the current mirror circuit to selectively varying the output current of the current mirror circuit section upon application of a control voltage applied to the follower circuit. Thus, the follower circuit is controlled by a control voltage while the output current of the current mirror circuit varies depending on the magnitude of the control voltage, and, in turn, the oscillating frequency of the oscillator circuit section varies over a wide frequency range, e.g., in excess of 100 dB, in accordance with the output current.

The signal delay in interconnection lines considering the effects of small-geometry CMOS inverters

Abstract: Physical timing models for small-geometry CMOS inverters with interconnection lines have been developed. Large-signal equivalent circuits of CMOS inverters and 10-section RC ladder networks for interconnection lines are considered assuming nonstep input waveforms and initial delay times. Due to more realistic and complete considerations, the model accuracy is expected to be higher than that of the conventional delay models. Extensive comparisons between model calculations and SPICE simulations show that the models have a maximum relative error of 16% on the delay times of CMOS inverters with interconnection lines of different R and C values and section numbers N and different gate sizes, device parameters, and even input excitation waveforms. Reasonable accuracy, wide applicable range, and high computational efficiency make the timing models quite attractive in MOS VLSI timing verification and autosizing. >

Analysis and design of self‐limiting single‐OP‐AMPRC oscillators

Abstract: This paper considers the design of self-limiting single-op-amp RC oscillators inside the frequency range where the slew rate is the dominant non-linearity. It is first demonstrated that limitation by the slew rate yields zero first-order frequency sensitivity with respect to changes in the op amp gain-bandwidth product (GB). Design procedures are then outlined for each of the structures comprising the complete set of canonical RC oscillators. Sensitivity figures providing criteria for comparison between the different structures are also included. Finally, experimental results are shown illustrating the validity of the proposed techniques.

Translator circuit and method of operation

Abstract: There is disclosed a circuit and method for converting on/off logic signals from one medium to on/off signals useful in a different medium. The circuit is particularly adapted to translate from negative voltage levels to positive voltage levels. The circuit includes voltage control levels for precisely controlling voltage as a function of temperature, all while only using positive voltage levels on the conversion circuit.

Digital-to-analog conversion circuit

Abstract: A digital-to-analog conversion circuit capable of preventing a noise produced in a digital system from mixing in an analog output has an input circuit receiving a pulse-code modulated digital signal, a conversion circuit such as a noise shaping circuit for converting the pulse-code modulated digital signal to a pulse wave signal containing analog amplitude information in a time axis direction, a buffer circuit including an electrically insulated coupling circuit such as an optical coupling circuit for transmitting output of the conversion circuit, and an analog output circuit including an analog low-pass filter for delivering out output of the buffer circuit therethrough. A noise generated in a digital system is intercepted by the buffer circuit and is not transmitted further so that mixing of the noise in the analog output circuit is prevented.

Synthesis of arbitrary rational transfer functions in s using uniform distributed RC active circuits

Abstract: A synthesis technique is described whereby network functions that are rational in s are realized with uniform distributed RC elements and active elements. In contrast to previous distributed synthesis approaches, the technique works directly in the s plane without complex mathematical transformations, uses only grounded rectangular single-layer uniform distributed RC structures, and can realize many network topologies. Classical approximation functions, such as Butterworth and Chebyshev, and well-known filter topologies can be used. Experimental results for a band-pass biquad are presented, and practical implementation possibilities are discussed. >

Load cell output correction circuitry

Abstract: Correction circuitry connectable in parallel with a conventional load cell output for compensating for various errors resulting from nonlinearity, creep, and temperature effects. Such circuitry includes an operational amplifier circuit employing the nonlinear characteristic of a diode to create a nonlinear correction signal and an operational amplifier circuit employing a long time constant RC circuit to correct creep.

Detecting device of magnetism

Abstract: PURPOSE: To simplify a circuit construction and to make it small in size and low in cost of manufacture with a high precision in measurement maintained, by forming a positive feedback circuit of an oscillation circuit out of a parallel resonance circuit which is formed of a detection coil of a magnetic sensor and a capacitor connected in parallel to the detection coil. CONSTITUTION: A magnetic sensor 11 is constructed by winding a detection coil 13 on a core 12c of a ferromagnetic substance. A parallel resonance circuit 15 is formed by connecting a capacitor 14 in parallel to the coil. On end of the parallel resonance circuit 15 is grounded and the other end thereof is connected to a (+) side input terminal of a differential amplifier 16. A (-) side input terminal of the differential amplifier 16 is grounded and a feedback resistor 17 is connected between an output terminal and the (+) side input terminal. The feedback resistor 17 and the parallel resonance circuit 15 serve as a positive feedback circuit for the differential amplifier 16 and consequently constitute an oscillation circuit 18 in a sort. An output signal is inputted to a waveform change detection circuit LPF 22 from the oscillation circuit 18. The core is excited to a saturation range by the oscillation circuit and an external magnetic field impressed on the magnetic sensor is detected from the amount of a change in the waveform of the output signal of the oscillation circuit. COPYRIGHT: (C)1992,JPO&Japio

Inter-pulse time difference measuring circuit

Abstract: An inter-pulse time difference measuring circuit which expands the time difference between a first pulse and a second pulse by a given multiplication factor and measures the expanded time difference, thereby realizing a higher measuring resolution. The circuit can be constructed by using a capacitor charging and discharging circuit connected to a constant current source and such circuit can always expand the time difference by a given multiplication factor even if the voltages and resistance values of the other circuits than the constant current circuit are varied with temperature changes. The circuit can also be realized by a circuit which charges and discharges a capacitor through a pair of transistors having a given current ratio and such circuit can maintain the current ratio of the transistors constant without suffering the effect of temperature changes, thereby always ensuring expansion of the time difference between pulses by a given multiplication factor.

ECL latch circuit having a noise resistance circuit in only one feedback path

Abstract: A latch circuit including at least three gate circuits, and a noise resistance circuit. A first gate circuit (3, 4, 11, 16) receives a data signal (DT) and a clock signal (CLK). A second gate circuit (1, 7, 13, 17) is connected to an output of the first gate circuit. A third gate circuit (2, 5, 12 18) receives a first inverted clock signal (CLK) at an input terminal. A second input terminal of the third gate circuit is connected to an output of the second gate circuit and is a first output terminal is connected to an input terminal of the second gate circuit, so that a feedback line is formed between the second and third gate circuits. The noise resistance circuit (8, 9, 20, 21) has at least a signal delay element in the feedback line. The noise resistance circuit may include a filter circuit. The noise resistance circuit may also include an amplifier circuit.

RC phase-shifter variable sinusoidal oscillators using initial conditions-restoration amplitude control

Abstract: A low-distortion instrumentation-quality variable sinusoidal oscillator using RC phase-shifters with the initial conditions-restoration amplitude control technique is developed. The variable frequency range is greater than five orders of magnitude. An exact analysis of the oscillation and the distortion characteristics, including the effects of the restoration time, the nonunity loop-gain, and the tuning component mismatchings upon the oscillator amplitude and the distortion is presented. The discrete-time simulation technique has been used to investigate the oscillation dynamics when the frequency is continuously changing. Experimental results confirming the validity of the theory and the high performance obtainable in practice are also presented. The basic idea of the oscillator is applied to a range of very-low-cost commercial signal generators. >

Switching converter with current measurement - has circuit including RC element to suppress high amplitude transients

Abstract: A d.c. voltage converter has the input voltage applied (VE) to the primary circuit of a transformer (5). The output voltage (VA) is taken from the secondary circuit consisting of diodes (61,62), inductance (8) and capacitor (9). The current in the primary circuit is measured by a resistor (22) coupled to a converter (3) connected in the primary circuit. The measured value is applied to a control circuit (4). The frequency and/or pulse width of the control signal (e) applied to an FET (7) can be varied. Large current transients can be suppressed by an RC stage (23,24). ADVANTAGE - Suppresses large current transients during switch on.