Showing papers on "RC circuit published in 1994"

Modeling the "Effective capacitance" for the RC interconnect of CMOS gates

Abstract: With finer line widths and faster switching speeds, the resistance of on-chip metal interconnect is having a dominant impact on the timing behavior of logic gates. Specifically, the gates are switching faster and the interconnect delays are getting longer due to scaling. This results in a trend in which the RC interconnect delay is beginning to comprise a larger portion of the overall logic stage delay. This shift in relative delay dominance from the gate to the RC interconnect is increased by resistance shielding. That is, as the gate "resistance" gets smaller and the metal resistance gets larger, the gate no longer "sees" the total net capacitance and the gate delay may be significantly less than expected. This trend complicates the timing analysis of digital circuits, which relies upon simple, empirical gate delay equations for efficiency. In this paper, we develop an analytical expression for the "effective load capacitance" of a pc interconnect. In addition, when there is significant shielding, the response waveforms at the gate output may have a large exponential tail. We show that this waveform tail can strongly influence the delay of the RC interconnect. Therefore, we propose an extension of the effective capacitance equation that captures the complete waveform response accurately, with a two-piece gate-output-waveform approximation. >

RICE: rapid interconnect circuit evaluation using AWE

Abstract: This paper describes the Rapid Interconnect Circuit Evaluator (RICE) software developed specifically to analyze RC and RLC interconnect circuit models of virtually any size and complexity RICE focuses specifically on the passive interconnect problem by applying the moment-matching technique of Asymptotic Waveform Evaluation (AWE) and application-specific circuit analysis techniques to yield large gains in run-time efficiency over circuit simulation without sacrificing accuracy Moreover, this focus of AWE on passive interconnect problems permits the use of moment-matching techniques that produce stable, pre-characterized, reduced-order models for RC and RLC interconnects RICE is demonstrated to be as accurate as a transient circuit simulation with hundreds or thousands of times the efficiency The use of RICE is demonstrated on several VLSI interconnect and off-chip microstrip models >

Apparatus and methods for measuring and detecting variations in the value of a capacitor

Abstract: A method measures the value of a capacitor and detects small variations in the value of a capacitor around a reference value. The capacitance of the capacitor may be determined by applying a voltage input having a known amplitude and wave form, V, to an RC circuit having a substantially known or constant load impedance, R, and sampling the voltage across the resistor (6 or 16) or capacitor (8 or 14) at a precisely controlled elapsed time interval, T. The method permits detector circuits to be created for measuring small variations in value with precision and accuracy. Solid state keypads (30) incorporating sensor cells (32) and software algorithms provide human interface systems which are not subject to environmentally induced errors or errors due to component aging.

Circuit module with hot-swap control circuitry

Abstract: A circuit board capable of live-insertion or hot-swapping into a live chassis backplane. The circuit board is provided with a power control circuitry for gracefully ramping up board power after insertion, or gracefully removing power just prior to physical removal of a circuit board from the board slot. A pair of ejector levers are provided on each side of the circuit board. A push button switch is provided proximate one ear thereof and is selectively opened or closed depending upon the position of an ejector cover which can be secured thereover in an interlocking relationship. Upon retraction of the extractor cover, the switch is opened, and the converse applies. Power MOSFETs are provided between the card edge and the board power busses which are gracefully turned on and off as a function of the switch position. A high-side gate driver provides an increased bias voltage, which bias voltage is communicated through the closed switch to the gates of the MOSFETs. An RC network is coupled to the MOSFET gate to determine the time constant at which bias voltage will be ramped up or ramped down to correspondingly ramp power up or down to the circuit board power busses. A power supply monitor circuit is also provided for automatically resetting the board upon a power up condition.

Development of a frequency-dependent composite load model using the measurement approach

Abstract: In control and stability studies, load models should realistically represent the aggregate load behavior of all kinds of individual components. In this paper, the development of a composite load model, where the load is represented as a combination of an RC circuit in parallel with an induction motor equivalent circuit, is presented. A procedure is developed for identifying a frequency-dependent composite load model using digital measurements from an on-line transient recording system, taking account of system frequency variation. A nonlinear model parameter estimation technique is described to derive the frequency-dependent load model. A computer program called LMSP has been developed. The program consists of five major phases: user-interface, data manipulation, load model identification; model conversion and system model response evaluation. A case study is presented to illustrate, in particular, the accuracy of the developed model for the representation of dynamic load behaviors of an actual power system. >

Effects of the sampling pulse width on the frequency characteristics of a sample-and-hold circuit

Abstract: Frequency characteristics, especially at high frequency, are important in applications such as sample-and-hold circuits for LCD driver ICs where the required signal bandwidth is much wider than the Nyquist rate. The frequency characteristics of a sample-and-hold circuit using analogue switches have hitherto been estimated from the frequency characteristics of a simple RC circuit comprising a storage capacitor and the on-resistance of the analogue switch. However, the effects of sampling pulse width and storage capacitor resetting are not taken into account. By giving an exact frequency-domain analysis of sample-and-hold circuits, the paper clarifies the limitations of conventional RC estimates. It also reveals the effects of storage capacitor resetting. A narrower pulse causes more ripples in the frequency characteristics. Storage capacitor resetting alleviates these ripples although the DC gain deteriorates for a narrow sampling pulse. This analysis was verified by simple experiments. A design for an LCD driver IC is also described as an application example.

Driving circuit for driving liquid crystal display device

Abstract: In a driving circuit for driving an active matrix type liquid crystal display device, the analog buffer includes a differential circuit constructed by P-channel thin film transistors (TFTs) and a current mirror circuit constructed by N-channel TFTs. When a voltage on a first input terminal of the differential circuit which is connected with a storage capacitor increases, an input current in the current mirror circuit connected with a reverse phase output terminal to the first input terminal decreases and an output current of the current mirror circuit decreases in response to decrease of the input current of the current mirror circuit. On the other hand, since a current through a common phase output terminal to the first input terminal increases, a voltage on the signal line increases and reaches a voltage on the first input terminal of the differential circuit.

Analysis of a quasi-resonant circuit for soft-switched inverters

Abstract: This paper presents an analysis of a quasi-resonant circuit for soft-switched inverters. The quasi-resonant circuit provides zero-voltage instants for zero-voltage inverter switching by pulling down the DC link voltage momentarily to zero without increasing the peak value of the nominal DC link voltage. Switches in the quasi-resonant circuit can also be turned off at zero current/voltage conditions. The proposed circuit allows creation of zero voltage conditions for inverter soft-switching under loaded and no-load conditions. The operating principle of this circuit is explained, and the analysis of each operating mode is described. Design criteria for achieving zero voltage switching are derived from the general mathematical analysis. Operation of the circuit has been verified by PSPICE simulation and experiments.

Current-mode multiple input maximum circuit for fuzzy logic controllers

Abstract: A new current-mode multiple input maximum circuit designed with 2n+1 transistors for n inputs is proposed. The output impedance of this circuit is the same order as that of a Wilson current source. This circuit has been fabricated using 0.8 mu m CMOS technology. The experimental result has verified the function of the circuit and shown the merit of high speed and high accuracy.

On equivalent forms of single op-amp sinusoidal RC oscillators

Abstract: It has been known that a given single op-amp RC sinusoidal oscillator has four distinctly different, equivalent, stable forms, This paper shows that with the op-amp replaced by a four terminal floating nullor, the number of such equivalent realizations of any given single op-amp oscillator are much more than four. Through some examples it is demonstrated that some of such additional realizations of a given op-amp oscillator, are likely to have some interesting properties not available in the usually derived four equivalent forms of the same oscillator, The theory is supplemented with examples and verified by SPICE simulations and experimental results. >

Sinusoidal oscillators with single element control using a current-feedback amplifier

Abstract: New sinusoidal oscillators with single element control using a current-feedback amplifier (CFA) are presented. The oscillation frequency of the proposed sinusoidal oscillators can be controlled by a resistor or capacitor. The oscillation frequency of one of the proposed sinusoidal oscillators is insensitive to the input and output voltage tracking errors of the CFA. Another of the proposed oscillators uses only grounded capacitors. Passive and active sensitivities are all low. Experimental results that confirm the theoretical analysis are obtained.

Interface circuit adaptive to high speed and low voltage operation

Abstract: An interface circuit for interfacing between an integrated circuit (IC) on a transmitting side and an IC on a receiving side over a line on a printed circuit board comprises an output circuit implemented in the IC on the transmitting side and composed of a current source for supplying a given current and a switching circuit for cutting off the given current according to a binary signal and delivering the given current as a current signal to the line, and an input circuit implemented in the IC on the receiving side and composed of a transimpedance circuit whose input impedance is equal to the one of the line and which converts the current signal into a voltage signal, and a comparator for identifying the voltage signal relative to a given threshold voltage and reproducing the binary signal. This circuitry makes it possible to provide an interface circuit that can be implemented in a CMOS IC during CMOS processing and operated at a low voltage. A threshold voltage for use in identifying a signal on the receiving side is stabilized, thus realizing an interface circuit unsusceptible to influence of a change in CMOS processing or the like.

Design of active RLC integrated filters with application in the GHz range

Abstract: In this paper we discuss a method for making possible the active parallel-mode compensation of on-chip inductor and capacitor losses, and for making both the quality factor and the inductance value electronically tunable The application of this technique in filters is emphasized throughout, and is demonstrated in a 2nd-order bandpass filter The paper provides analytical results, discusses transistor-level circuits and presents experimental results from a linearity test on a breadboard >

A PWL ladder circuit which exhibits hysteresis

Abstract: A circuit model for static hysteresis is presented. the circuit has a ladder structure with linear capacitors and piece wise linear resistors. the model behaviour shows all basic characteristics of static hysteresis phenomena. the model is put into relation with others proposed in the literature. an analysis of the model properties and a detailed comparison with the static Preisach model are made.

Multi-stage digital to analog conversion circuit and method

Abstract: This invention is for a digital-to-analog conversion circuit (DAC) which includes an interpolation filter circuit, a noise shaper circuit and a semi-digital FIR filter circuit. The entire DAC circuit provides noise shaping, analog filtering and oversampling functions.

Comparison of RC op.-amp. and RC current conveyor filters

Abstract: Voltage mode filters implemented using (non-ideal) current conveyors are compared with the corresponding filters implemented using (non-ideal0 op.-amp. and current conveyor niters are found to perform similarly although the parasitic impedances of the non-ideal current conveyor sometimes complicate the design of current conveyor filters.

Genetically derived filter circuits using preferred value components

Abstract: In the realisation of discrete-component analogue electronic circuits it is common practice, because of costs, to specify passive component values from a set preferred of values. For the design of integrated circuits it can also be desirable to use a standard set of passive component values. For example, to obtain accurate ratio matching of integrated resistors and capacitors by stacking identical unit valued components. The usual design approaches produce circuits in which the permitted component values are assumed to be unrestricted. The circuit is then converted to a practical circuit by simple rounding of the exact component values to the nearest value in the permitted set. Of course, in general the circuit performance realised will differ from the ideal. It may then be necessary to repeat the design with a more stringent specification or to use a more closely spaced set of permitted values, both of which can have cost implications. However if other combinations of permitted values are considered, a better circuit performance may potentially be achieved than that obtained by simple rounding. The difficulty is that in all but trivially simple circuits the space of all feasible combinations to be searched is huge. Genetic algorithms (GAs) can be used to search this space. There the application is to a simple second order active filter specified by its transfer function parameters. The aim of the present contribution is to show that GAs can be successfully applied to more complex filter structures. Moreover the optimal search is carried out directly on the frequency-response template specification rather than on a specified approximating ideal transfer function, thereby avoiding this additional source of approximation. The next section outlines the basic GA and its implementation for the present application. Results are then given for practical filter examples. An all-pole low pass response is considered with template specified by a 1 dB pass band ripple with a pass band edge at 10/sup 5/ rad/sec, and stop band attenuation of -150 dB at a stop band edge of 10/sup 6/ rad/sec. The GA is used to generate both LC ladder structures and the more complex FDNR active RC structures. >

Photoelectric converting circuit having an amplification factor

Abstract: A photoelectric converting circuit having a photodiode generating a photoelectric current in accordance with the quantity of light, a first integrating circuit integrating the photoelectric current to convert it into a voltage, and a charge amplifier amplifying the change in the output voltage of the first integrating circuit. The charge amplifier is composed of a second integrating circuit and a coupling capacitance connected between the output of the first integrating circuit and the input of the second integrating circuit. The change in the output of the second integrating circuit is proportional to the ratio of the coupling capacitance to the integration capacitance of the second integrating circuit. This makes it possible to improve the sensitivity of the photoelectric converting circuit without reducing the value of the integration capacitance of the first integrating circuit.

Signal transmission method, signal transmission circuit and information processing system using same

Abstract: One paired wiring traveling in parallel to a transmission path of a signal and a transmission path of reference voltage is used, and a terminal end resistor matched with the characteristic impedance is installed, and in a receiving circuit connected thereto, a differential input circuit with offset set to about 1/2 of the terminal end voltage is used, and an output circuit of open drain is used in a transmitting circuit. A high-speed information processing section using such a bus circuit and a low-speed information processing section using a conventional low-speed bus are mutually connected through an interface circuit to construct the system hierarchically.

Statistical Behaviour of Internal Partial Discharges at DC Voltage

Abstract: In this paper the succession of partial discharges at DC voltage is discussed. For the measurements presented here, the Townsend-like discharge mechanism was found to be dominant. Using a simple RC circuit, the discharge behaviour can be described. Several discharge parameters, such as the average time lag or the voltage drop of a discharge, can be evaluated. The discharge magnitude can also be predicted.

A classification of current-mode single-amplifier biquads based on a voltage-to-current transformation

Abstract: Using a simple and well-known voltage-to-current transformation, current-mode active RC filters that are amenable to IC realization can be derived from their voltage-based counterparts. Using this transformation, a classification of current-based single-amplifier biquads is introduced which is derived from a similar voltage-based classification. This classification is exhaustive in that it includes all possible current-based single-amplifier biquads. >

Method of making a semiconductor device with integrated RC network and schottky diode

Abstract: A semiconductor device which has a resistor, a capacitor, a Schottky diode, and an ESD protection device all formed on a single semiconductor substrate. The resistor and the capacitor are coupled together in series. The Schottky diode and the ESD protection device are coupled in parallel to the series connection of the resistor and capacitor.

Controlled velocity head parking circuit

Abstract: A constant velocity head parking circuit is disclosed. The circuit includes a voice coil motor, a sense resistor, a park voltage source, and a feedback loop. The feedback loop includes a scaling circuit which can be constructed with an op amp and two resistors. The scaling circuit adds a voltage to the park voltage so that any voltage loses in the voice coil motor are compensated for.

Microprocessor-based temperature control circuit

Abstract: A temperature control circuit which is capable of operating a microprocessor on a very low voltage source. The temperature control circuit uses a pair of field effect transistors and a zener diode in an oscillator circuit to amplify the source voltage. A microprocessor is supplied by the amplified source voltage, and is connected through a transistor to a temperature sensing portion of the circuit. The microprocessor uses the transistor to turn the power to the temperature sensing circuit portion off between temperature samples. By turning the temperature sensing circuit power off between samples, the average power drain by the control circuit is an amount that can be met by the amplified voltage from the low voltage source.

BiCMOS power-up circuit with hysteresis

Abstract: A BiCMOS power-up circuit for delaying the operation of an extended circuit until the voltage available to the high-potential power rail of the extended circuit is sufficiently high that all elements of the extended circuit will be powered at a high enough voltage to function correctly. The power-up circuit of the present invention has its most direct application to three-state output buffers connected to a common bus, and in this context this circuit can maintain the output buffers in their high-Z, inactive state until the voltage available from the circuit-energizing power-supply has risen high enough that all of the stages of the buffers will operate correctly, and in particular will not be current-sourcing and current-sinking simultaneously. By the use of a primary control path and a secondary control path, the circuit of the present invention is able to manifest a hysteresis wherein during power-up the circuit of the present invention cedes control of the extended circuit at a power-supply threshold voltage V ThU which is higher than the threshold voltage V ThD at which the circuit re-asserts control during power-down. This avoids unnecessary turn-offs of the extended circuit occasioned by load-, noise-, and temperature-induced fluctuations in the high-potential power rail voltage, while allowing V ThU to be set quite high. By using bipolar and MOS transistors, the circuit of the present invention is able to make use of the specific advantages of each type of device.

BiNMOS driver circuit with integrated voltage supply conversion

Abstract: A circuit for converting an input signal derived from a low voltage power supply to an output signal derived from a high voltage power supply is disclosed. A driver circuit and a conversion circuit simultaneously receive the low voltage input signal. The driver circuit changes states when the input signal transitions and the output signal switches accordingly. The conversion circuit simultaneously generates a high voltage signal that causes a decoupler circuit to eliminate any DC leakage through the driver circuit. The driver circuit utilizes a bipolar transistor to increase drive capability.

Insensitive current mode realization of third-order Butterworth characteristics using current conveyors

Abstract: An active-RC realization scheme of a third-order Butterworth function in the current mode, using the second-generation current conveyor (CC II) active elements and with all equal-valued passive components, is proposed. With nonideal CC II's, some of the coefficients of the function are altered owing to the finite port current and voltage tracking errors of the device. The network parameters are practically insensitive to the device errors. >

Method for detecting an output of a gyroscope with dual synchronized detection circuit and dual smoothing circuit

Abstract: Two piezoelectric elements (16a), (16b) for detecting of a vibratory gyroscope (12) are connected to a first differential amplifier circuit (38) and a summing circuit (46). An output of the first differential amplifier circuit (38) is detected in synchronous with a feedback signal of the vibratory gyroscope (12) by a first synchronized detection circuit (40), and further smoothed by a first smoothing circuit (44). The output signal of the first differential amplifier circuit (38) is detected in synchronous with an output signal of a phase correction circuit (48) by a second synchronized detection circuit (42), and further smoothed by a second smoothing circuit (50). By a level adjusting circuit (52), it is adjusted that a drift component of an output signal of the first smoothing circuit (44) and a drift component of an output signal of the second smoothing circuit (50) are the same level. A difference between the output signal of the first smoothing circuit (44) and an the output signal of the level adjusting circuit (52) is obtained by a second differential amplifier circuit (54). Furthermore, the output signal of the first differential amplifier circuit (38) may be detected in synchronous with an output signal of the summing circuit (46), smoothed and applied to the level adjusting circuit (52).

Overheat detecting circuit

Abstract: An overheat detecting circuit for detecting overheating of an integrated circuit has a band gap voltage source circuit for emitting a substantially constant voltage, which is connected between a positive power source line and a reference power source line. The voltage output from the band gap voltage source circuit is independent of the power source voltages and the ambient temperature. A constant current source circuit is provided for generating a constant current according to the output of the band gap voltage source circuit. At least one circuit element is connected between an output terminal of the constant current source circuit and the reference power source line. The circuit element has a predetermined temperature coefficient. A comparator compares the output voltage of the band gap voltage source circuit with that of the circuit element. Thus, the variation in the detected temperature according to the power source voltage, which is caused by the fluctuation of the element characteristics as the semiconductor integrated circuit is manufactured, is suppressed.