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Showing papers on "Relaxation oscillator published in 2008"


Patent
13 Jun 2008
TL;DR: In this paper, a switching voltage regulator is disclosed operable to regulate a voltage supplied to system circuitry, and a comparator compares an oscillator signal generated by a ring oscillator to a reference signal produced by a frequency generator, and control circuitry adjusts a number of delay elements in the ring oscillators and a divider value of the frequency generator to generate hysteresis in the comparison.
Abstract: A switching voltage regulator is disclosed operable to regulate a voltage supplied to system circuitry. A comparator compares an oscillator signal generated by a ring oscillator to a reference signal generated by a frequency generator. Switching circuitry charges a charging element in response to the comparison, and control circuitry adjusts a number of delay elements in the ring oscillator and a divider value of the frequency generator to generate hysteresis in the comparison. In one embodiment, the charging element is charged while a frequency of the reference signal is above a frequency of the oscillator signal.

117 citations


BookDOI
14 Jul 2008
TL;DR: In this article, a detailed comparative study of quadrature LC and RC oscillators, including cross-coupled LC quasi-sinusoidal oscillators and RC relaxation oscillators is presented, and a thorough investigation of the effect of mismatches on the phase error and the phase noise is performed.
Abstract: The following are some features of Analysis and Design of Quadrature Oscillators make it different from the existing literature on electronic oscillators: (1) focus on quadrature oscillators with accurate quadrature and low phase-noise, required by modern communication systems; (2) a detailed comparative study of quadrature LC and RC oscillators, including cross-coupled LC quasi-sinusoidal oscillators, cross-coupled RC relaxation oscillators, a quadrature RC oscillator-mixer, and two-integrator oscillators; (3) a thorough investigation of the effect of mismatches on the phase-error and the phase-noise; (4) the conclusion that quadrature RC oscillators can be a practical alternative to LC oscillators when area and cost should be minimized (in cross-coupled RC oscillators both the quadrature-error and phase-noise are reduced, whereas in LC oscillators the coupling increases the phase-noise.

85 citations


Journal ArticleDOI
27 Mar 2008-Chaos
TL;DR: A detailed asymptotic study of the effect of small Gaussian white noise on a relaxation oscillator undergoing a supercritical Hopf bifurcation reveals an intricate stochastic bIfurcation leading to several kinds of noise-driven mixed-mode oscillations at different levels of amplitude of the noise.
Abstract: A detailed asymptotic study of the effect of small Gaussian white noise on a relaxation oscillator undergoing a supercritical Hopf bifurcation is presented. The analysis reveals an intricate stochastic bifurcation leading to several kinds of noise-driven mixed-mode oscillations at different levels of amplitude of the noise. In the limit of strong time-scale separation, five different scaling regimes for the noise amplitude are identified. As the noise amplitude is decreased, the dynamics of the system goes from the limit cycle due to self-induced stochastic resonance to the coherence resonance limit cycle, then to bursting relaxation oscillations, followed by rare clusters of several relaxation cycles (spikes), and finally to small-amplitude oscillations (or stable fixed point) with sporadic single spikes. These scenarios are corroborated by numerical simulations.

82 citations


Journal ArticleDOI
TL;DR: In this article, a hybrid optoelectronic integrated circuit based on a resonant tunnelling diode driving an optical communications laser diode is described as a voltage controlled oscillator with optical and electrical outputs.
Abstract: We report on a hybrid optoelectronic integrated circuit based on a resonant tunnelling diode driving an optical communications laser diode. This circuit can act as a voltage controlled oscillator with optical and electrical outputs. We show that the oscillator operation can be described by Lienard's equation, a second order nonlinear differential equation, which is a generalization of the Van der Pol equation. This treatment gives considerable insight into the potential of a monolithic version of the circuit for optical communication functions including clock recovery and chaotic source applications.

60 citations


Journal ArticleDOI
TL;DR: Optimization criteria for an integrated switched-capacitor front-end circuit for capacitive sensors with a wide dynamic range and a novel method of linearity measurement which takes the influence of PCB parasitic capacitances into account are presented.
Abstract: This paper presents optimization criteria for an integrated switched-capacitor front-end circuit for capacitive sensors with a wide dynamic range. The principle of the interface is based on the use of a relaxation oscillator. A negative-feedback circuit controls the charge-transfer speed to prevent the overload of the input amplifier for large input signals which thus enables a wide dynamic range of capacitor values. Moreover, it has been shown that the use of negative feedback can also result in much better noise performance. However, for the interface to function properly, there is a serious limitation for the value of a specific parasitic capacitance. Therefore, a method which extends the acceptable range of this parasitic capacitance is proposed. A novel method of linearity measurement which takes the influence of PCB parasitic capacitances into account, is also presented. The circuit has been designed and implemented in 0.7 mum standard CMOS technology. The supply voltage is 5 V and the measured value for the supply current is about 1.4 mA. Experimental results show that for the capacitor range of 1 pF to 300 pF, application of negative feedback yields a linearity of about 50 x10-6 (14 bits) with a 16-bit resolution for a measurement time of 100 ms. Tests have been performed over the temperature range from to .

57 citations


Proceedings ArticleDOI
06 Feb 2008
TL;DR: Both ring oscillators and relaxation oscillators are subsets of RC oscillators featuring large tuning ranges and small areas and their phase can be read out continuously due to their triangular (or sawtooth) waveform.
Abstract: Both ring oscillators and relaxation oscillators are subsets of RC oscillators featuring large tuning ranges and small areas. Such relaxation oscillators have two advantages with respect to ring oscillators: 1) they have a constant frequency tuning gain; and 2) their phase can be read out continuously due to their triangular (or sawtooth) waveform. A major disadvantage of practical relaxation oscillators is their poor phase-noise compared to ring oscillators.

50 citations


Journal ArticleDOI
22 Sep 2008-Chaos
TL;DR: It is shown that the resonant limit cycle can be generally synchronized on the torus through the resonance destruction followed by the locking of one and then another one of the basic frequencies.
Abstract: We study synchronization of a resonant limit cycle on a two-dimensional torus with an external harmonic signal. The regime of the resonant limit cycle is realized in a system of two coupled Van der Pol oscillators; we consider the resonances 1:1 and 1:3. We analyze the influence of coupling strength between the oscillators. We show that the resonant limit cycle can be generally synchronized on the torus through the resonance destruction followed by the locking of one and then another one of the basic frequencies. We consider the bifurcational mechanism of the synchronization effect.

42 citations


Patent
06 Jun 2008
TL;DR: In this paper, a temperature-compensated relaxation oscillator circuit is described, where positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation.
Abstract: Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

40 citations


Journal ArticleDOI
TL;DR: In this paper, a charge-balanced relaxation oscillator is used for the measurement of grounded capacitive sensors and applies advanced measurement techniques, such as auto-calibration and chopping.
Abstract: This paper proposes and analyses a novel interface circuit for capacitive sensors in which one of the electrodes is grounded. The novel design makes a charge-balanced relaxation oscillator (applied so far to floating capacitive sensors) suited for the measurement of grounded capacitive sensors and applies advanced measurement techniques, such as auto-calibration and chopping. Furthermore, these techniques are combined with feedforward-based active shielding instead of the usual feedback-based one, thus avoiding instability problems. A prototype of the novel interface circuit has been implemented with discrete components and tested for sensor capacitances between 27 pF and 330 pF and for different lengths of the interconnecting cable. The nonlinearity error amounts to less than 0.1% FSS for a 10 m cable.

40 citations


Journal ArticleDOI
TL;DR: An accurate self-adjusting CMOS RC oscillator for capacitive and resistive sensor applications has been designed and manufactured and its design and operation are described and results of measurements performed on the fabricated chips are presented.
Abstract: An accurate self-adjusting CMOS RC oscillator for capacitive and resistive sensor applications has been designed and manufactured. The oscillator operates with supply voltages from 1.2 to 3 V and achieves an internal accuracy of plusmn0.7% with a temperature range from -20degC to 60degC. The RC oscillator was fabricated in a 0.35-mum standard n-well CMOS process with threshold voltages of 0.5 and -0.65 V. Its design and operation are described, and results of measurements performed on the fabricated chips are presented.

32 citations


Journal ArticleDOI
TL;DR: The adaptation of a well-known relaxation oscillator to produce a modulated Gaussian pulse suitable for ultra-wide-band (UWB) impulse radio (IR) and low area and low power consumption makes it suitable for UWB-IR low-cost applications.
Abstract: We propose the adaptation of a well-known relaxation oscillator to produce a modulated Gaussian pulse suitable for ultra-wide-band (UWB) impulse radio (IR). The proposed circuit has low area and low power consumption, can easily be modulated by a digital signal, and requires no special technology options; these features make it suitable for UWB-IR low-cost applications. The circuit behavior is confirmed by simulation and by experimental results on a prototype designed in austriamicrosystems 0.35-mum SiGe-BiCMOS technology.

Patent
09 May 2008
TL;DR: In this article, a method for calibrating a voltage controlled oscillator is described, where a binary search is performed in a digital circuit for a value of a calibration word that is used to enable switched capacitors in a coarse tune capacitor bank in the oscillator.
Abstract: Various systems, methods and apparatus for calibrating a clock generating circuit are discussed herein. As one example, a method for calibrating a voltage controlled oscillator is disclosed. The method includes fixing the control voltage of a fine tune capacitor in the voltage controlled oscillator at a predetermined level. A binary search is performed in a digital circuit for a value of a calibration word that is used to enable switched capacitors in a coarse tune capacitor bank in the voltage controlled oscillator. The calibration word is fixed at the value determined by the binary search, and the control voltage of the fine tune capacitor is released to enable adjustment of the control voltage by a feedback signal to the voltage controlled oscillator.

Journal ArticleDOI
TL;DR: In this paper, the authors derived coupled van der Pol equations from the equivalent circuit for two-element oscillator arrays at first, and the condition in which only the fundamental oscillation mode stably oscillates is shown.
Abstract: Power combining with array configuration is an effective method for high output power in oscillators with resonant tunneling diodes (RTDs) in subterahertz and terahertz range. In this paper, output power and stability are analyzed for coupled oscillator array of RTDs. The coupled van der Pol equations are derived from the equivalent circuit for two-element oscillator arrays at first, and the condition in which only the fundamental oscillation mode stably oscillates is shown. The oscillation frequency of the array is single due to the mutual injection locking even if the individual frequencies of oscillator elements are different. Minimum difference between the individual frequencies to keep the mutual injection locking is analyzed. Experimental results are explained with theory. The analysis is extended to multielement oscillator arrays, and characteristics of oscillation modes, stability, combined output power, and locking range of the frequency difference between the elements are obtained. Theoretical combined output power increases with element number in proportion roughly to square of the element number if the frequency difference between the elements is small, and decreases with frequency difference. Different array configurations for stable and high-power operation are also discussed briefly.

Journal ArticleDOI
TL;DR: In this article, a phase-change memory with a chalcogenide resistor with a parallel capacitance and no inductance is presented, where the oscillation mechanism is explained by repetitive cycles of threshold switching and recovery of the high-resistance (off) state of the amorphous region in the device.
Abstract: A new oscillation behavior in a phase-change memory device is presented and analyzed. The device consists in a chalcogenide resistor with a parallel capacitance and no inductance. Biasing the device immediately after a proper trigger pulse leads to damped relaxation oscillations, which can be controlled in frequency by the bias voltage. The oscillation mechanism is explained by repetitive cycles of threshold switching and recovery of the high-resistance (off) state of the amorphous chalcogenide region in the device. Damping is explained by oscillation-induced phase change in the chalcogenide layer.

Journal ArticleDOI
TL;DR: In this paper, a 0.6 V 720 nW relaxation oscillator fabricated in a standard 0.13 mum CMOS process is proposed as the clock generation circuit for EPC standard UHF RFID transponders.
Abstract: A 0.6 V 720 nW relaxation oscillator fabricated in a standard 0.13 mum CMOS process is proposed as the clock generation circuit for EPC standard UHF RFID transponders. A less than 2% frequency variation is achieved at the frequency of 5.65 MHz when supply voltage varies from 0.6 to 1.0 V.

Proceedings ArticleDOI
18 May 2008
TL;DR: This paper considers two oscillators synchronized using capacitive coupling and a method of quasilinear approximation is used to evaluate the stability of synchronous oscillation.
Abstract: This paper considers two oscillators (van der Pol or Robinson type) synchronized using capacitive coupling. Equations are derived for the oscillation frequency and amplitudes. They show that the frequency of synchronous oscillation is different from the frequencies of individual oscillators. The amplitudes of oscillation are also different: one oscillator becomes a master and the second oscillator becomes a slave. A method of quasilinear approximation is used to evaluate the stability of synchronous oscillation. Simulation results for a 5 GHz oscillator confirm the theoretical analysis.

Patent
13 Oct 2008
TL;DR: In this article, a relaxation circuit with delay compensation is described, where delays present in comparator circuits and latches can cause its frequency to vary beyond desired ranges and can affect both the design and the function of the circuitry.
Abstract: In the many microelectronics applications, delays present in circuitry can affect both the design and the function of the circuitry One example of delays impacting the function of a circuit is a relaxation oscillator, where delays present in comparator circuits and latches can cause its frequency to vary beyond desired ranges Here, a relaxation circuit with delay compensation is described

Patent
10 Oct 2008
TL;DR: In this paper, a voltage controlled oscillator-phase lock loop (VCO-PLL) system is proposed. But the VCO system is not suitable for the use of a generator.
Abstract: A voltage controlled oscillator-phase lock loop (VCO-PLL) system includes a voltage controlled oscillator (VCO) system implementing four-channel architecture, such that two bands support two channels; a phase-locked-loop (PLL) system; and a mixer system. The VCO system further includes a control circuit; a first cross-coupled oscillator system adapted to receive a source voltage; a second cross-coupled oscillator system adapted to receive the source voltage; and a plurality of isolation buffer systems adapted to protect the first and second cross-coupled oscillator systems.

Patent
12 Dec 2008
TL;DR: In this article, an oscillator is configured for ramping up a frequency of the clock signal in accordance with an voltage to be applied to the oscillator and varied during the start-up period.
Abstract: Control circuitry controls a boost regulator during a start-up period. The control circuitry may comprise an oscillator for generating a clock signal. The oscillator may be configured for ramping up a frequency of the clock signal in accordance with an voltage to be applied to the oscillator and varied during the start-up period. The control circuit may further include a switching circuit configured for controlling a power switch of the boost regulator in response to the clock signal from the oscillator. The switching circuit can control the power switch to have an on-time which is largely independent of the operating frequency of the oscillator. The voltage to be applied to the oscillator may have the same initial voltage level upon startup of the control circuit, independent of an output voltage of the boost regulator.

Patent
13 Feb 2008
TL;DR: In this paper, the authors proposed a PLL circuit that achieves low power consumption and covers a wide range of oscillation frequencies, including a voltage controlled oscillator, a charge pump and a filter.
Abstract: A PLL circuit according to the present invention includes: a voltage controlled oscillator 10; a frequency divider 30 that divides an oscillation signal of the voltage controlled oscillator 10 and outputs a divided oscillation signal; a first phase comparator 40 that outputs a phase difference between the divided oscillation signal of the frequency divider 30 and a reference signal; a charge pump 60 that converts the output signal of the first phase comparator 40 into a signal for controlling the voltage controlled oscillator 10; a filter that allows a DC component of the output signal of the charge pump 60 to pass therethrough and outputs a voltage to the voltage controlled oscillator 10; a second phase comparator 90 that averages the phase difference between the divided oscillation signal of the frequency divider 30 and the reference signal with respect to time; and a current control circuit 100 that controls an operating current of the frequency divider 30 based on the phase difference averaged with respect to time by the second phase comparator 90. With this configuration, it is possible to provide a PLL circuit that achieves low power consumption and covers a wide range of oscillation frequencies.

Patent
10 Apr 2008
TL;DR: In this article, an oscillator includes a first oscillator, having a pulse generator and a timing capacitor, and a second oscillator with a generator and timing capacitor that are electrically coupled to one or more first power supplies and/or second power supplies, respectively.
Abstract: An oscillator (10) for synchronizing and controlling a multi-phase, interleaved power supply system (30) that has a plurality of power sources. The oscillator includes a first oscillator, having a pulse generator and a timing capacitor (16), and a second oscillator, having a pulse generator and timing capacitor, that are electrically coupled to one or more first power supplies and one or more second power supplies, respectively (32, 34). The pulse generator of the first oscillator is electrically coupled to the second timing capacitor and the pulse generator of the second oscillator is electrically coupled to the first timing capacitor. Each of the pulse generators is structured and arranged to provide a synchronizing pulse to the other oscillator's timing capacitor when the voltage on its own timing capacitor is midway between a predetermined maximum voltage threshold and a predetermined minimum voltage threshold.

Journal ArticleDOI
TL;DR: An estimation of the switching time between on and off transistor states for the emitter-coupled multivibrator using the root locus of the characteristic equation for the oscillator small-signal equivalent circuit, while changing the device current as a parameter is given.
Abstract: This paper gives an estimation of the switching time between on and off transistor states for the emitter-coupled multivibrator. The calculation uses the root locus of the characteristic equation for the oscillator small-signal equivalent circuit, while changing the device current as a parameter. The switching time is found using a fitting location of the root in the right half of the s-plane. The oscillation frequency is also obtained. The approach provides a further insight into switching behavior of relaxation oscillators, gives an accurate estimation of the oscillation frequency, and allows one to establish a useful connection between sinusoidal and relaxation oscillators. The theoretical results are confirmed by simulations.

Proceedings ArticleDOI
01 Nov 2008
TL;DR: A novel Schmitt trigger circuit, implemented by a RS trigger and two simple distinct inverters, is proposed, which has better performance over wide temperature range, whose temperature coefficient from 0degC to 85degC is 1/5 of traditional.
Abstract: A novel Schmitt trigger circuit, implemented by a RS trigger and two simple distinct inverters, is proposed. Its trigger levels are determined by two CMOS inverters. Contrasted with traditional six transistors Schmitt trigger, its temperature and supply voltage characteristics have been analyzed. Apply these two triggers into relaxation oscillator and the result shows that the proposed one in this paper has better performance over wide temperature range, whose temperature coefficient from 0degC to 85degC is 1/5 of traditional.

Patent
29 Apr 2008
TL;DR: In this paper, a voltage controlled oscillator to which a switching bias technique is applied so as to lower flicker noise of a bias circuit and enhance phase noise characteristics, thereby reducing the overall chip area to make it possible to achieve integration.
Abstract: Provided is a voltage controlled oscillator to which a switching bias technique is applied so as to lower flicker noise of a bias circuit and enhance phase noise characteristics, thereby reducing the overall chip area to make it possible to achieve integration. A common mode voltage applied to the bias circuit is negatively fed back to an oscillation waveform. Therefore, it is possible to stabilize the magnitude of the oscillation waveform of the voltage controlled oscillator with respect to a change in an external condition.

Proceedings ArticleDOI
12 May 2008
TL;DR: This paper presents the analysis and design of an integrated interface for leaky capacitive sensors with emphasize on humidity sensor, and developed a novel type of integrated interface circuit which is possible to measure the capacitance of a humidity sensor at the presence of shunting resistors, with sufficient accuracy.
Abstract: This paper presents the analysis and design of an integrated interface for leaky capacitive sensors with emphasize on humidity sensor. For such an application, we developed a novel type of integrated interface circuit. With this circuit it is possible to measure the capacitance of a humidity sensor, at the presence of shunting resistors, with sufficient accuracy. For the signal processing, a relaxation oscillator is used with a modified front-end which is a novel capacitance to voltage converter, to optimize the interface circuit for immunity to leakage. The circuit has been designed and implemented in 0.7 mum standard CMOS technology. Experimental results show that a 220 kOmega shunt resistance (4.5 muS) causes an error that corresponds to about 1.25% in relative humidity which is also agree with our simulation result. The measured resolution is 14 bit for measurement time of 30 ms and the measured non-linearity is about 2times10-4 . The interface chip consumes about 1 mA and takes a chip area of 2.8 mm2.

Proceedings ArticleDOI
12 May 2008
TL;DR: The effects of noise in the simple dual-slope pulse-width modulator are analyzed and an accurate noise model is provided that can be adopted to any other type of pulse- width modulators.
Abstract: Majority of available integrated and smart sensors are based on quasi-digitalization concept. A pulse modulation of the analog sensor output signal can be accomplished by using a fairly simple relaxation oscillator circuit. Pulse-width modulation (PWM) is commonly used in such applications, due to its ratiometric output that greatly reduces the error caused by the changes in the time constant of the oscillator. However, most of the literature that deal with the pulse-width modulators do not include the analysis of noise effects, which is important factor in optimizing the readout of PWM signal. In this article, we analyze the effects of noise in the simple dual-slope pulse-width modulator and provide an accurate noise model that can easily be adopted to any other type of pulse-width modulators. The model can be used to predict the jitter of the edges of output PWM signal and to analyze the effects of that jitter on the uncertainty of the measured duty-cycle for various PWM readout techniques.

Patent
21 May 2008
TL;DR: In this paper, an integrated circuit consisting of a voltage controlled oscillator and a first compensation capacitor is presented, coupled in parallel to the oscillator, receiving a control voltage to generate a negative temperature coefficient capacitance to compensate for frequency drift of the oscillation signal.
Abstract: An integrated circuit is provided. The integrated circuit comprises a voltage controlled oscillator and a first compensation capacitor. The voltage controlled oscillator generates an oscillation signal. The first compensation capacitor, coupled in parallel to the voltage controlled oscillator, receives a control voltage to generate a negative temperature coefficient capacitance to compensate for frequency drift of the oscillation signal. The control voltage is temperature dependent.

Patent
22 Apr 2008
TL;DR: In this paper, a current-steering digital-to-analog converter (DAC) is tested using a test component having a relaxation oscillator with an oscillation frequency based on the output current of the DAC.
Abstract: A current-steering digital-to-analog converter (DAC) is tested using a test component having a relaxation oscillator with an oscillation frequency based on the output current of the DAC. A series of test values is provided in sequence to the DAC for conversion to an output current with a magnitude that varies with the test values. The test component counts the number of oscillations (“the oscillation count”) of the relaxation oscillator over a fixed duration that is substantially equal for each test value. As the number of oscillations over the fixed duration depends on the oscillation frequency of the relaxation oscillator, which in turn is based on the magnitude of the output current, the oscillation count can be used as a relative measure of the magnitude of the output current for the corresponding test value. Accordingly, the oscillation counts for the test values can be used to determine operational characteristics of the DAC.

Journal ArticleDOI
TL;DR: In this paper, an oscillator circuit based on feedback and controlled by a single organic transistor is presented, assisted by standard operational amplifiers, whose frequency depends on the parameters of the circuit, but also on the transistor's channel length and charge carrier mobility.
Abstract: We design and demonstrate an oscillator circuit based on feedback and controlled by a single organic transistor. Oscillations are assisted by standard operational amplifiers. The oscillator frequency f partly depends on the parameters of the circuit, but also on the transistor’s channel length and charge carrier mobility. Monitoring f provides a fast and simple tool in following the change in semiconductor mobility under changing environmental conditions. We demonstrate the application of the circuit for cheap, portable organic transistor-based odor sensors.

Patent
16 Jul 2008
TL;DR: In this article, a chip-built-in RC time constant correction method was proposed for an integrated circuit tuner, where the image signal filteration function of the multiphase filter and the oscillating period of the relaxation oscillator are controlled by a chip built-in Rc time constant.
Abstract: The invention relates to a chip built-in RC time constant correction method used in an integrated circuit tuner, wherein the integrated circuit tuner comprises a receiving circuit receiving radio frequency signal, an orthogonal frequency mixer coupled in the output end of the receiving circuit, a multiphase filter, a relaxation oscillator and a digital correction module, wherein the image signal filteration function of the multiphase filter and the oscillating period of the relaxation oscillator are controlled by a chip built-in RC time constant. The correction method comprises the following steps: a clock in direct proportion to the chip built-in RC time constant is generated; the clock is input in the counter arranged inside the digital correction module; within a preset time slot, the clock cycle is counted to generate a counting value; moreover, by means of continuous approximation correction method and according to the counting value, the chip built-in RC time constant is updated.