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Relaxation oscillator

About: Relaxation oscillator is a research topic. Over the lifetime, 1952 publications have been published within this topic receiving 22326 citations.


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Patent
01 Apr 1999
TL;DR: In this article, a chain of coupled sawtooth generator stages is used for relaxation oscillator, where each stage has a capacitor which is charged and discharged when the voltage of a previous stage reaches a threshold voltage (VH).
Abstract: Relaxation oscillator comprising a chain of coupled sawtooth generator stages. Each stage has a capacitor which is charged and discharged. The charging of a capacitor begins when the voltage (Cc1) of a previous stage reaches a threshold voltage (VH). To avoid sampling of noise on the threshold voltage (VH) each new voltage ramp is started gradually.

10 citations

Journal ArticleDOI
TL;DR: In this paper, a periodically modulated voltage is added to the bias of the oscillator to perturb the operational state, and the power spectrum of the perturbed oscillator contains additional information for determination of the other VDP parameter.
Abstract: The Van der Pol (VDP) model of a transistor oscillator describes the behaviour of the oscillator with three parameters. When operating in steady state, only two parameters can be determined by spectrum analysis, these being the oscillation frequency and amplitude of oscillation. In this paper, a technique for measuring the other VDP parameter is examined. In this approach, a periodically modulated voltage is added to the bias of the oscillator to perturb the operational state. A theoretical derivation shows that the power spectrum of the perturbed oscillator contains additional information for determination of the other VDP parameter. A simple analytical perturbation formula predicts the oscillator's response to the ramped bias. Our experimental results agree with the analytical perturbation solution and therefore, this allows one to read off the other VDP parameter from the experimental data. The VDP model allows one to predict the behaviour of coupled transistor oscillators more accurately and simply than does the traditional large-signal model of the transistor. This VDP model will simplify oscillator array design since the number of parameters needed to describe each oscillator is reduced from that which would be required using a large-signal circuit model.

10 citations

Patent
Heinz Mader1
17 Aug 1993
TL;DR: A voltage controlled surface acoustic wave oscillator as discussed by the authors includes an integrated circuit and a two-port resonator connected as a feedback element around the integrated circuit, which includes a phase shift network and an amplifier directly connected to the phase shifting network.
Abstract: A voltage controlled surface acoustic wave oscillator includes an integrated circuit and a two port resonator connected as a feedback element around the integrated circuit. The integrated circuit includes a phase shifting network and an amplifier directly connected to the phase shifting network.

10 citations

Patent
Mika Niemiö1
04 Apr 1991
TL;DR: In this paper, a phase-locked loop circuit in the form of an integrated circuit (IC) including in sequential connection a digital phase comparator, to the input of which is supplied a reference frequency (fref); a loop filter; and a voltage-controlled oscillator.
Abstract: The object of the description is a phase-locked loop circuit in the form of an integrated circuit (IC) including in sequential connection a digital phase comparator, to the input of which is supplied a reference frequency (fref); a loop filter; and a voltage-controlled oscillator, from which a feedback branch is fed to the second input of the phase comparator. The voltage (φV; φR) of the pulses obtained from the digital phase comparator is disposed so as to be adjusted by limiting means so as to modify the bandwidth and rate of the loop. The adjustment of the voltage of the pulses can be carried out, e.g., by limiting the supply voltage of the phase comparator or by means of an exterior diode or transistor limiter (Q2, Q3). The circuit is usable e.g. in radiotelephone applications, in which loop rate is increased during channel switching.

10 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202322
202242
202128
202044
201962
201855