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Relaxation oscillator

About: Relaxation oscillator is a research topic. Over the lifetime, 1952 publications have been published within this topic receiving 22326 citations.


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Patent
Johnnie Molina1
06 Jun 2006
TL;DR: In this article, a signal generating circuit includes a relaxation oscillator operating to alternately generate a first ramp signal that is periodic at a frequency of the relaxation oscillators and a second ramp signal, which is out of phase with respect to the first signal.
Abstract: A signal generating circuit includes a relaxation oscillator operating to alternately generate a first ramp signal that is periodic at a frequency of the relaxation oscillator and a second ramp signal that is periodic at the frequency of the relaxation oscillator and is out of phase with respect to the first ramp signal The first ramp signal is compared to a first reference voltage and the state of a first flip-flop is changed if the first ramp signal exceeds the first reference voltage. The second ramp signal is compared to the first reference voltage and the state of a second flip-flop is changed if the second ramp signal exceeds the first reference voltage. The first flip-flop is reset in response to a first level of the first ramp signal and the second flip-flop is reset in response to a second level of the second ramp signal. A logical ORing function is performed on an output of the first flip-flop and an output of the second flip-flop to produce an output signal having a frequency that is a multiple of the relaxation oscillator frequency.

10 citations

Journal ArticleDOI
07 Jun 2013-Chaos
TL;DR: In this paper, the authors investigate how each class of models behaves under the external periodic forcing, taking the well-studied van der Pol equation as an example, and find that when the forcing is additive, the noise-induced oscillator can show only one-to-one entrainment to the external frequency, in contrast to the limit cycle oscillator which is known to entrain to any ratio.
Abstract: Theoretical models that describe oscillations in biological systems are often either a limit cycle oscillator, where the deterministic nonlinear dynamics gives sustained periodic oscillations, or a noise-induced oscillator, where a fixed point is linearly stable with complex eigenvalues, and addition of noise gives oscillations around the fixed point with fluctuating amplitude. We investigate how each class of models behaves under the external periodic forcing, taking the well-studied van der Pol equation as an example. We find that when the forcing is additive, the noise-induced oscillator can show only one-to-one entrainment to the external frequency, in contrast to the limit cycle oscillator which is known to entrain to any ratio. When the external forcing is multiplicative, on the other hand, the noise-induced oscillator can show entrainment to a few ratios other than one-to-one, while the limit cycle oscillator shows entrain to any ratio. The noise blurs the entrainment in general, but clear entrainment regions for limit cycles can be identified as long as the noise is not too strong.

10 citations

Patent
08 Sep 2009
TL;DR: In this paper, a low power relaxation oscillator consisting of a first module (21) having a ramp generator formed by a reference current source (31) and a storage capacitor (32) defining a ramp voltage (V ramp1 ), and a voltage comparator (m 1, m 2 ) for comparing the ramp voltage with a reference voltage, a second module ( 22, 41, 42, V ramp2, m 3, m 4 ) similar to the first module and an asynchronous flip-flop (23) receiving the output signal of the comparator of the first modules
Abstract: The low-power relaxation oscillator comprises a first module ( 21 ) having a ramp generator formed by a reference current source ( 31 ) and a storage capacitor ( 32 ) defining a ramp voltage (V ramp1 ), and a voltage comparator (m 1, m 2 ) for comparing the ramp voltage with a reference voltage, a second module ( 22, 41, 42, V ramp2 , m 3, m 4 ) similar to the first module and an asynchronous flip-flop ( 23 ) receiving the output signal of the comparator of the first module at a first input (s) and the output signal of the comparator of the second module at a second input (r). For each module a generator of said reference voltage is configured by adding a reference resistance ( 33, 43 ) between the reference current source and the storage capacitor. Thus, the generation of the reference voltage and the ramp voltage is conducted on the very same current branch. This enables the electrical power consumption of the oscillator to be reduced.

10 citations

Patent
22 Jun 2001
TL;DR: In this article, a PLL circuit consisting of an LC resonance type voltage-controlled oscillator which oscillates at the oscillation frequency depending on the control voltage applied, a phase comparator PHC for comparing the phase of an oscillation output signal φ b of said voltage controlled oscillator with the phases of the reference clock φ r, and a loop-filter LPF for outputting a voltage depending on a phase difference based on an output of the phase comparators PHC, is presented.
Abstract: In a semiconductor integrated circuit comprising a PLL circuit including an LC resonance type voltage-controlled oscillator which oscillates at the oscillation frequency depending on the control voltage applied, a phase comparator PHC for comparing the phase of an oscillation output signal φ b of said voltage-controlled oscillator with the phase of the reference clock φ r, and a loop-filter LPF for outputting a voltage depending on the phase difference based on an output of the phase comparator PHC, this semiconductor integrated circuit further comprises a plurality of voltage-controlled oscillators VCO1, VCO2, . . . which include different center frequencies of the frequency variable range and the selecting unit for selecting only one oscillator from a plurality of said voltage-controlled oscillators VCO1, VCO2, . . . Accordingly, the semiconductor integrated circuit comprising the PLL circuit using the LC resonance type voltage-controlled oscillator having excellent phase noise characteristic and assuring the desired frequency variable range can be manufactured with higher manufacturing yield.

10 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202322
202242
202128
202044
201962
201855