Relaxation oscillator

About: Relaxation oscillator is a research topic. Over the lifetime, 1952 publications have been published within this topic receiving 22326 citations.

Low power high resolution sensor interface

Abstract: A sensor interface circuit is provided for resolving sensor signals from a plurality of sensors into a digital sensor signal, the sensor interface circuit comprising: a relaxation oscillator for receiving and pre-processing the sensor signals to generate an analog sensor signal, the relaxation oscillator comprising one or more dynamic circuits; and a monitoring module for receiving the analog sensor signal and generating the digital sensor signal in response thereto. There is also provided a sensor system front-end and a relaxation oscillator.

Integrated circuit relaxation oscillator having minimal external pads

Abstract: A LSI oscillator circuit includes a load device and a drive device, the output circuits of which are connected in series between a voltage source and a reference potential. The circuit output node is connected between the output circuits of the load and driver devices. A control node is connected to the control terminal of the driver device. When the voltage at the control node is less than the threshold voltage of the driver device, the driver device is nonconductive and the output node is charged to a given voltage. When the voltage at the control node is above the threshold voltage of the driver device, the driver device is rendered conductive thereby causing the output node to discharge to the reference potential. The control node is connected to a voltage source through a resistor and connected to the reference potential through a capacitor. This arrangement permits the charging of the control node over a period of time from the reference potential through the threshold voltage of the driver device. The control node is discharged by means of a transistor, the output circuit of which is connected between the control node and the reference potential. The control terminal of the discharging transistor is connected to the control node through a plurality of series connected transistors such that the discharging transistor is rendered conductive to discharge the control node when the control node reaches a potential sufficient to render the series connector transistors and discharging transistor conductive. Thereafter, the discharging transistor is rendered nonconductive and the control node permitted to recharge.

Revealing determinants of two-phase dynamics of P53 network under gamma irradiation based on a reduced 2D relaxation oscillator model.

Abstract: This study proposes a two-dimensional (2D) oscillator model of p53 network, which is derived via reducing the multidimensional two-phase dynamics model into a model of ataxia telangiectasia mutated (ATM) and Wip1 variables, and studies the impact of p53-regulators on cell fate decision. First, the authors identify a 6D core oscillator module, then reduce this module into a 2D oscillator model while preserving the qualitative behaviours. The introduced 2D model is shown to be an excitable relaxation oscillator. This oscillator provides a mechanism that leads diverse modes underpinning cell fate, each corresponding to a cell state. To investigate the effects of p53 inhibitors and the intrinsic time delay of Wip1 on the characteristics of oscillations, they introduce also a delay differential equation version of the 2D oscillator. They observe that the suppression of p53 inhibitors decreases the amplitudes of p53 oscillation, though the suppression increases the sustained level of p53. They identify Wip1 and P53DINP1 as possible targets for cancer therapies considering their impact on the oscillator, supported by biological findings. They model some mutations as critical changes of the phase space characteristics. Possible cancer therapeutic strategies are then proposed for preventing these mutations' effects using the phase space approach.

Electronic ballast with boost converter

Abstract: An electronic ballast (10) for gas lamp loads, such as ionized lamps, that includes a boost power factor correction (30) used to correct the power factor and minimize the total harmonic distortion. The boost (30) includes an inductor (31) that periodically stores and discharges its resulting voltage in a charging capacitor (34) through an optional bypass diode (32) connected in parallel with an electronic switch (S1) using the oscillator (40) that is applied to the load. The addition of the bypass diode (32) decreases the total harmonic distortion. The inductor (31) is selected, in combination with the rest of the circuit, so that it never reaches saturation. The inductor (31) periodically charges the charging capacitor (21) above (twice) the peak voltage that is supplied by a rectified continuous source of direct voltage. The high intensity discharge load (80) is connected to a suitable resonant circuit (60). The load inductor (31) as well as the elements of the resonant circuit (60) and biasing elements of the oscillator include devices that permit a user to select different values thus affecting the resonant frequency.

3.5 A 34µW 32MHz RC Oscillator with ±530ppm Inaccuracy from −40°C to 85°C and 80ppm/V Supply Sensitivity Enabled by Pulse-Density Modulated Resistors

Abstract: Monolithic frequency references built using on-chip time constants are gaining popularity as possible replacements to bulky quartz-crystal or MEMS-based oscillators in low-cost applications. Among them, RC time-constant-based references [1]–[4] are most attractive because they occupy a small area, consume little power, and are well suited for integration in any standard CMOS process. But their performance is very susceptible to variations in temperature and supply voltage. Frequency-locked-loop(FLL)-based closed-loop RC oscillators [2]–[4], compared to open-loop relaxation oscillators, have higher immunity to voltage variations. However, their performance is also limited by the temperature dependence of the resistor. This limitation was addressed in the prior art by using a composite resistor made from resistors with opposing temperature coefficients (TCs) [2]. Unfortunately, the TC of the composite resistor is highly dependent on process-sensitive sheet resistance of resistors comprising it. So, it is typically implemented using a vast array of resistors that are trimmed on a sample-by-sample basis. While this approach helps to alleviate process sensitivity, two critical factors limit the achievable frequency inaccuracy to about 5000ppm. First, the accuracy with which the TC is canceled across process corners is fundamentally limited by the finite number of resistor combinations that can be practically implemented on a chip. Second, leakage currents in the switches used to select the resistors along with the mixing of TCs of individual resistors in the array generate large higher-order TCs that are difficult to compensate. Recently reported voltage-ratio adjusting [2] and polynomial-based [3] higher-order compensation schemes lowered frequency inaccuracy to about 500ppm. However, they either rely on precise combinations of analog voltages and are therefore sensitive to circuit-level imperfections or occupy a large area and exhibit poor power efficiency (100µW/MHz) [3].