Relaxation oscillator

About: Relaxation oscillator is a research topic. Over the lifetime, 1952 publications have been published within this topic receiving 22326 citations.

Power supply and dc-dc-conversion

Abstract: In an embodiment of a converter, a first oscillator provides switching signals for switching between charging and discharging of a capacitor, and a second oscillator is configured to add an offset voltage or a feedback-current-dependent voltage to a sawtooth waveform generated by the second oscillator switched in synchronism with the first oscillator.

Singularly perturbed phase response curves for relaxation oscillators

Abstract: We exploit a novel geometric method to construct the global isochrones of relaxation oscillators and the associated phase response curve. This method complements the classical infinitesimal (local) phase response curve approach by constructively predicting the finite phase response curve near the singular limit of infinite timescale separations between the oscillator variables. We illustrate the power of our construction on the FitzHugh-Nagumo model of neuronal spike generation. Because of its global and constructive nature, not requiring extensive numerical simulations, the proposed approach is particularly suited to control design applications.

Reactance-less RM relaxation oscillator using exponential memristor model

Abstract: Recently, the memristor based relaxation oscillators become an important topic in circuit theory where the reactive elements are replaced by memristor which occupies a very small area. In this paper, a design of memristor-based relaxation oscillator is introduced based on exponential memristor model. Unlike previously published oscillators which were built based on a simple memristor model, the exponential model is used, as a generalized model, to verify the concept of memristor based RM oscillator using a model that has electrical characteristic very close to the fabricated device. First, the effect of changing parameters of the memristor is illustrated using graphical analysis. Then, a reasonable range of values for the device parameters are selected to be suitable for the operation of the RM oscillator. The mathematical modeling of the memristor in the oscillator is introduced, in addition to the effect of changing the control voltage on the oscillation frequency. The design and simulations were carried out using Cadence Virtuoso.

A quadrature relaxation oscillator-mixer in CMOS

Abstract: This paper describes the design of a quadrature cross-coupled oscillator circuit integrated which also realizes the mixer function in a phase lock loop (PLL) This should be able to provide a very accurate phase relation (<1/spl deg/) This combined oscillator/mixer is first evaluated using a high-level model, in up and downconverter configurations A circuit implementation is then carried out, in which all the variables are kept independent at circuit level, ensuring a practical implementation close to that of the high-level model The circuit is designed in a standard 035 /spl mu/m CMOS technology with an oscillation frequency of 900 MHz, it has an overall area of 521 /spl times/ 515 /spl mu/m/sup 2/ (157 /spl times/ 119 /spl mu/m/sup 2/ for the IQ oscillator/mixer circuit) and a power consumption of 70 mW with a 3 V power supply The circuit performance is evaluated by simulation

Relationship between transient response and output characteristics of avalanche transistors

Abstract: The output characteristics of avalanche transistors are investigated under high-current conditions and compared with their transient response. A strict connection can be demonstrated between the switching time and that branch of the output characteristics where the transient process ends. There are two different kinds of switching processes, “slow” ones, approximately showing the switching times of the “classical” theory for avalanche transistors (e.g. 10 ns), and “fast” ones with switching times nearly one or two orders of magnitude lower (e.g. 0.2 ns). A fast switching process will always end on a branch of the output characteristics with low series resistance and comparably low collector-emitter voltage (less than VB CEO ). This branch is nearly independent of the circuitry. Slow switching will end on branches close to the I B = 0-characteristic. It will be shown that for the generation of steep pulses transistors with a low product of impurity concentration and effective thickness of the epitaxial layer must be used. Due to the dominating role of the pinch-in effect which leads to the desired high current density, the results are interpreted by a simple two-dimensional transistor model. The quantitatively exact description of the transient response of avalanche transistors is very complicated and therefore it has not yet been dealt with in this paper.