Relaxation oscillator

About: Relaxation oscillator is a research topic. Over the lifetime, 1952 publications have been published within this topic receiving 22326 citations.

A 25.6μW 8.97ps Period Jitter Phase-Locked Relaxation Oscillator with sub-1µS Start-Up for Low-Power IoT

Abstract: On-chip integrated oscillators are highly needed for the next-generation low-cost sensors used in IoT/biomedical applications to realize sub-millimeter-sized packages at ultra-low-power and fast startup. This paper presents a 25.6µW phase-locked relaxation oscillator (PLL-ROSC) with 8.972ps period jitter using an energy-efficient PLL. A self-locking mechanism is proposed that tracks the temperature variation from −20 to 100°C A current-reuse differential ROSC with boosted output swing is employed to improve noise performance and reduce the power consumption. The simulated power consumption is 15x better than state-of-art with −237.2dBc/Hz FoM and < 1µs startup time using 180nm CMOS technology.

4 – Density Oscillators

Abstract: Systems exhibiting spontaneous regular rhythms abound in nature, and several that are characterized by more than two different time scales are known as relaxation oscillators. The density oscillator is an excellent model system for investigating the fundamental mechanisms of relaxation oscillators. It is a system consisting of an inner container, with a thin pipe in its bottom and filled with heavy fluid, inside an outer container filled with light fluid; the fluids alternately exhibit upflow and downflow through the pipe between the two containers. Although the density oscillator is a simple system, its oscillation mechanism is nontrivial and clarifying it is a challenging task. We have recently clarified the mechanism by constructing a simple model on the basis of detailed experiments. In this chapter, we review studies of this topic and introduce relevant work.

A 2MHz, low temperature coefficient relaxation oscillator with hybrid temperature compensation and real-time calibration

Abstract: An RC relaxation oscillator (ROSC) with hybrid temperature compensation as well as the frequency of 2 MHz is proposed in this paper. Frequency stability is enhanced with analog compensation by replicating the path of comparator and level determination logic (LDL), the compensation approach removes the temperature-dependent delay of the comparator and LDL. Since frequency is undesirable at low temperatures (below 0 °C) due to non-zero-temperature-coefficient current and voltage references, as well as weak carrier mobility, digital low temperature compensation is presented to extend the oscillator’s operating temperature range to −40 °C–125 °C. The digital compensation module, after hybrid compensation, is then utilized for real-time oscillator calibration by the same operating principle. The presented oscillator with hybrid compensation and real-time calibration is developed in a standard 0.18-μm CMOS process with the active area of 0.04 mm2, and post-simulation results reveal that after hybrid compensation, the temperature coefficient (TC) of this oscillator is 43.97 ppm/°C in the temperature range of −40 °C–125 °C. The power of this ROSC is 185 μW when the supply voltage is 1.8V.

Relaxation oscillators with reduced errors or no errors in output frequencies caused by changes in temperatures and/or fabrication processes

Abstract: Relaxation oscillator and method for providing an output frequency. For example, the relaxation oscillator includes a reference generator, a capacitor, a first comparator, a second comparator, a latch, and a temperature compensation circuit. The reference generator is configured to generate a first bias current, a first bias voltage and a second bias voltage. The capacitor is configured to be charged by a charging current to generate a charged voltage, and the charging current is generated based on at least the first bias current. The first comparator is configured to compare the charged voltage and the first bias voltage to generate a first comparison result, and the second comparator is configured to compare the charged voltage and the second bias voltage to generate a second comparison result. The latch is configured to generate a clock signal based on at least the first comparison result and the second comparison result.

Test mode method and strategy for RF-based fault injection analysis for on-chip relaxation oscillators under EMC standard tests or RFI susceptibility characterization

Abstract: Nowadays some microcontroller clock circuits have been implemented using relaxation oscillators instead of quartz type approach to attend cost effective designs. The oscillator is compensated over temperature and power supply and trimming during device test phase adjusts the oscillation frequency on target to overcome process variations. In that way, the relaxation oscillator becomes competitive with regard to ceramic resonator options. However, robust applications as industrial, automotive and aero spatial, requires aggressive EMC tests reproducing the behavior in these environments. High levels of RF interference introduce frequency deviation, jitter or clock corruption causing severe faults on the application. This work discusses the impact of RF interference in relaxation oscillators proposing a strategy to implement test mode in microcontrollers and other complex SOCs, allowing yet characterization and fault debug. Theoretical analysis and experimental results with a silicon implementation are presented and discussed.