Topic
Relaxation oscillator
About: Relaxation oscillator is a research topic. Over the lifetime, 1952 publications have been published within this topic receiving 22326 citations.
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03 May 1993TL;DR: The authors analyze a relaxation oscillator which includes a hysteresis element with periodic thresholds that exhibits quasi-periodic oscillation in some parameter region.
Abstract: The authors analyze a relaxation oscillator which includes a hysteresis element with periodic thresholds. The fundamental interests are in recognition and classification of various nonlinear phenomena. As the period of thresholds varies, the system exhibits various interesting periodic responses. Birfurcation diagrams are shown. The response includes hysteresis characteristics and has some universality. In some parameter region, the system exhibits quasi-periodic oscillation. A sufficient condition is derived for this oscillation. Some of the theoretical results were confirmed by laboratory measurements. >
1 citations
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07 Feb 1968
TL;DR: In this article, a relaxation oscillator used in an A.C. converter has its output amplitude stabilized against variations in output impedance by means of a Zener diode 18 connected across the collector-emitter path of the oscillator transistor 4 so as to conduct when the transistor is cut off.
Abstract: 1,102,494. Converting circuits. E. K. COLE Ltd. 21 March, 1966 [20 March, 1965], No. 11939/65. Heading H2F. [Also in Division H3] A relaxation oscillator used in an A.C. to D.C. converter has its output amplitude stabilized against variations in output impedance by means of a Zener diode 18 connected across the collector-emitter path of the oscillator transistor 4 so as to conduct when the transistor is cut off. The circuit provides an increase in output with a decrease in supply voltage 7 and in order to compensate for this part of the supply voltage may be injected in opposition into the output circuit by replacing link 19 with a potentiometer circuit 20. A plurality of outputs may be provided, each taken from a separate secondary winding 3, and each having its own potentiometer circuit.
1 citations
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18 Jan 2005TL;DR: In this article, the authors describe a differential voltage controlled oscillator circuit, which is used in the phase locked loop of a USB hub chip, which can be altered from 36MHz to 96MHz by changing the value of control signals.
Abstract: The paper describes a novel differential voltage controlled oscillator circuit, which is used in the phase locked loop of a USB hub chip. The output clock signals can be altered from 36MHz to 96MHz by changing the value of control signals. The voltage controlled oscillator architecture, module circuits of voltage controlled oscillator design, simulation results, and chip layout are included. Experimental results using CSMC 0.6/spl mu/m process technology show that the anticipatory performance can be obtained and the voltage controlled oscillator circuit consumes only 0.9 mW from a 5V power supply.
1 citations
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23 May 2005
TL;DR: A mismatch-tolerant CMOS oscillator and excitatory synapse for bioinspired image segmentation circuits using a modified LEGION algorithm and transistor-level simulation results for CMOS 0.35 /spl mu/m technology are presented to validate the functionality.
Abstract: In this work, we propose a mismatch-tolerant CMOS oscillator and excitatory synapse for bioinspired image segmentation circuits using a modified LEGION algorithm. As a result of the combination of excitatory synapses (to synchronize coupled oscillators) and global inhibition (to separate unconnected objects) the oscillator array can segment the image objects by phase-encoding. However, the synchronizing mechanism is sensitive to frequency dispersion, and hence a mismatch-tolerant oscillator architecture is a key point for correct operation. With a feedback scheme based on switched capacitors and a large time constant low-pass filter, frequency variations are significantly reduced. The excitatory synapse circuit enables oscillator synchronization and is implemented by a quasi floating-gate MOS transistor. Transistor-level simulation results for CMOS 0.35 /spl mu/m technology are presented to validate the functionality of the mismatch-tolerant oscillator and synapse.
1 citations
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01 Dec 2013
TL;DR: This paper deals with the electromagnetic susceptibility of a fully integrated voltage controlled oscillator and proposes a procedure based on an optimization of the value of some circuit features to improve the immunity of the circuit.
Abstract: This paper deals with the electromagnetic susceptibility of a fully integrated voltage controlled oscillator Injection locking and pulling is observed when a sinusoidal interference signal is injected on the device To improve the immunity of the circuit we propose a procedure based on an optimization of the value of some circuit features This work is done in relation with the optimization of the functional performances
1 citations