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Relaxation oscillator

About: Relaxation oscillator is a research topic. Over the lifetime, 1952 publications have been published within this topic receiving 22326 citations.


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Patent
26 Mar 1970
TL;DR: In this paper, an indirect digital frequency synthesizer consisting of a voltage-controlled oscillator, a feedback loop connected from the oscillator output to its phase control input via a frequency divider, phase detector and low-pass filter, a reference frequency pulse source connected as a second input to the phase detector, and a digital comparator network for comparing the frequency of the feedback and reference pulses and generating output pulses was presented.
Abstract: In an indirect digital frequency synthesizer comprising a voltage-controlled oscillator, a feedback loop connected from the oscillator output to its phase control input via a frequency divider, phase detector and low-pass filter, a reference frequency pulse source connected as a second input to the phase detector, and a digital comparator network for comparing the frequency of the feedback and reference pulses and generating output pulses when the feedback and reference pulses are not interlaced, a search circuit responsive to the frequency comparator output pulses for providing an error correction signal to the oscillator, whereby the oscillator is coarse tuned to within a frequency allowing the phase detector to accomplish phase lock of the feedback pulse train with the reference pulse train. For bidirectional tuning, two outputs are taken from the comparator, pulses at one output indicating the feedback frequency is too low and pulses at the other output indicating the feedback frequency is too high, and the search circuit comprises a capacitor having two pulse-controlled constant current sources, one responsive to pulses at one of the comparator outputs for charging the capacitor in a stepwise manner and the other responsive to pulses at the second comparator output for providing stepwise discharging of the capacitor. For unidirectional tuning, only one pulse output is taken from the comparator, and the search circuit comprises a capacitor having a pulse-controlled constant current source operative in response to comparator output pulses to stepwise charge the capacitor, with a dump circuit being provided to discharge the capacitor upon its charging to a predetermined maximum voltage level.

33 citations

Patent
Nasser A. Kurd1, Ian Young1
23 Jan 2002
TL;DR: In this article, a dual VCO phase lock loop system is provided that includes a first voltage controlled oscillator that provides a first oscillation signal relative to a first frequency and a second voltage control oscillator (VCO) that provides an oscillated signal relative with a second frequency.
Abstract: A dual VCO phase lock loop system is provided that includes a first voltage controlled oscillator that provides a first oscillation signal relative to a first frequency and a second voltage controlled oscillator that provides a second oscillation signal relative to a second frequency. A loop filter capacitor may be associated with both the first voltage controlled oscillator and the second voltage controlled oscillator. A selection device may enable components associated with the either one of the voltage controlled oscillators while disabling components associated with the other one of the voltage controlled oscillators.

33 citations

Patent
30 Dec 2010
TL;DR: In this paper, a power conversion system with a feedback control loop is described, and a timer is used to disable the oscillator after a period following the opening of the feedback control loops.
Abstract: A circuit protects a power conversion system with a feedback control loop from a fault condition. The circuit has an oscillator having an input for generating a signal with a frequency and a timer connected to the oscillator input and to the feedback control loop. The timer disables the oscillator after a period following the opening of the feedback control loop to protect the power conversion system.

33 citations

Journal ArticleDOI
TL;DR: An electronic noise-generator producing high-dimensional narrowband chaotic signals is reported, in the form of a delayed nonlinear feedback circuit that has potential applications in secure communications.
Abstract: An electronic noise-generator producing high-dimensional narrowband chaotic signals is reported. The generator has the form of a delayed nonlinear feedback circuit. It has potential applications in secure communications.

33 citations

Journal ArticleDOI
TL;DR: A novel readout circuit for interfacing single element resistive sensors is presented, based on a new relaxation oscillator (RO), which provides a digital output proportional to the resistance of the sensor.
Abstract: A novel readout circuit for interfacing single element resistive sensors is presented in this paper. The proposed scheme is based on a new relaxation oscillator (RO). The RO, along with a timer counter provides a digital output proportional to the resistance of the sensor. The output characteristic of most of the existing readout circuits for resistive sensors suffers from gain, offset, and nonlinearity errors. The sources of errors include various nonideal circuit parameters and their drift. The output of the proposed readout circuit has a special feature that it is not a function of the circuit parameters such as: 1) offset voltages of the opamps and comparators; 2) bias currents of the opamps and comparators; 3) gain of various units employed; 4) ON-resistance of the switches; 5) value or mismatch in the magnitudes of the reference voltages employed; 6) delay of the switches and comparator; 7) leakage current of the switch; and 8) slew rate of the opamp. Such a scheme will be useful for high accuracy measurements, even when the parameters 1)–8) may vary or drift, due to variation in the measurement environment. A prototype of the proposed readout scheme has been developed in the laboratory and the performance has been evaluated under various conditions. The output was found to be linear with a worst-case nonlinearity of 0.05%. Test results from a prototype developed show that the proposed scheme possesses all the features, described above, as expected.

33 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202322
202242
202128
202044
201962
201855