Relaxation oscillator

About: Relaxation oscillator is a research topic. Over the lifetime, 1952 publications have been published within this topic receiving 22326 citations.

A 13.4-MHz Relaxation Oscillator With Temperature Compensation

Abstract: A low-phase-noise relaxation oscillator uses a digital compensation loop to reduce its temperature coefficient (TC). This relaxation oscillator is fabricated in the 0.18- $\mu \text{m}$ CMOS process. The measured average oscillation frequency is 13.4 MHz. The whole oscillator consumes $157.8~\mu \text{W}$ under a 1.2-V supply. The measured average TCs of the oscillation frequency with and without compensation are 193.15 and 1098.7 ppm/°C, respectively. The TC achieves an improvement of 5.7 times. The measured frequency variation is within ±2% from −20 °C to 100 °C by using the digital compensation loop. The measured phase noise at 100-kHz offset frequency is −104.82 dBc/Hz, and the measured figure of merit (FOM) is −154.4 dBc/Hz.

Amp-hour meter

Abstract: A submersible having a bank of storage batteries for power is provided with a circuit giving crewmen a real-time indication of power used or power remaining in the batteries. A sensor element interposed in series with the load created by the submersible's machinery bleeds off a small sample of the load current which is proportional to the power drain of the machinery. An integrator circuit coupled to a unijunction transistor functions as a relaxation oscillator to generate pulses at a rate proportional to the magnitude of the load current and to pass them to a circuit for producing counter pulses. Counter pulses are coupled to a digital read-out for providing a visual indication of power used or power remaining in the batteries and also are fed-back to the integrator circuit to repeatedly reset it during the integration sequence. Increased reliability is ensured by the provision of a biasing-circuitry arrangement which is "on" only during the period when load current is being drawn from the bank of storage batteries.

A band-switched integrated voltage controlled oscillator

Abstract: The source to drain capacitance of a FET device is used by connecting the source and drain together electrically so as to form a two terminal capacitive device which may be switched into and out of a parallel resonant circuit. Thus, sets of FET devices with their sources and drains connected together are employed in a circuit which produces an output voltage signal at a frequency which is tunable within a plurality of different individual bands. The resultant voltage controlled oscillator is particularly useful in cellular telephone and related wireless systems and/or in any other situation where integrated high frequency voltage control oscillator circuits are desired.

Demand cardiac pacer with interference protection

Abstract: A demand cardiac pacer comprising a relaxation oscillator for applying hart-stimulating pulses to a pair of electrodes at a rate somewhat less than the lowest rate of natural heartbeats, and a timing circuit for measuring the interval between voltage pulses on the electrodes produced either by the oscillator, by natural heart signals, or by noise signals, for disabling the oscillator when natural heart pulses are received at a rate in the normal range, and for enabling the oscillator in the presence of noise signals above a certain frequency range.

Frequency-stabilised RC oscillator for clock generator circuit

Abstract: The oscillator has an ohmic load (R11) and at least one capacitor (C1) determining the oscillation frequency, with a current sink (1) providing a constant current (Ik) in dependence on the ohmic load and a reference voltage (Uref), controlling the charging current circuit (2) for the capacitor. At least one comparator (3, 5) compares the capacitor voltage with the reference voltage, to control a discharge circuit (4) for the capacitor. Pref. the charging current circuit delivers a constant charging current to 2 capacitors (C1, C2) each capacitor voltage compared with the reference voltage by a respective comparator, with corresponding control of the capacitor charging and discharging cycles, one capacitor charged as the other is discharged.