Showing papers on "Resist published in 1970"

Batch-fabricated thin-film magnetic recording heads

Abstract: Fabrication of thin-film recording heads with 30-μm wide gaps in 25-μm thick Permalloy have been reported previously. Formation of narrow gaps by chemical etching was limited by undercutting. This paper describes a process for fabricating thin-film recording heads with gaps 2 μm wide in Permalloy film which is 2.5 μm thick. The process makes use of electroplating, photoetching, and electron beam technologies. The narrow gaps with vertical walls are made possible by the use of electron sensitive resist, electron beam exposure of 2-μm wide strips, and electroplating of 2.5-μm thick films of Permalloy on each side of the narrow strip of the electron sensitive resist.

Additives to positive photoresists which increase the sensitivity thereof

Abstract: The use of a scanning electron beam to generate a pattern in a positive photoresist is known. Electron beam equipment can be made which is capable of scanning very quickly, but standard positive photoresists require such a large flux of electrons for proper exposure that the scanning equipment must be operated at speeds substantially slower that the capability of the equipment. It has been discovered that by adding certain compounds to photoresists of the quinone diazid type, the sensitivity or speed of the photoresist is substantially increased. As a result, the electron beam can scan at a higher rate. The same compounds also increase the sensitivity of the photoresist to light. Compounds which are operable include aromatic compounds soluble in the resist and having two or more nitrogen atoms, at least one of which is bonded to a hydrogen atom. The ring can contain no other heterocyclic atoms and the nitrogens can not be bonded to other than nitrogen, carbon or hydrogen atoms. This definition includes most, but not all, of the compounds which have been determined to be operable.

Methods of manufacturing semiconductor devices

Abstract: A method of manufacturing a semiconductor device in which a process is effected at a semiconductor surface with the aid of an electron beam. A reference marker of a metal or metal based layer is provided at the semiconductor surface, the secondary electron emission pattern of the marker being used for registration purposes. The reference marker remains substantially inert and adheres to the surface during the process. Where two or more processes are effected at the semiconductor surface, each with the aid of an electron beam, the metal or metal based layer reference marker provides for accurate alignment at each process. The electron beam may be used for the selective exposure of an electron sensitive resist layer or for the selective electron bombardment of a layer of an organic silicon compound which yields an adherent oxide layer pattern on the semiconductor surface and may be used as a mask against impurity diffusion.

Photopolymer resist sheet laminator

Abstract: The resist laminator receives a panel between two identical drums and a sheet of photo resist material is placed on opposite sides of the panel simultaneously prior to feeding the laminated assembly to curing rollers. When the panel is received between the drums the resist material is secured only at the leading edge to prevent the formation of wrinkles or other defects during the curing operation. The sheets of photo resist material are pre-cut to the exact size of the panel and held on the surface of the drums by means of a vacuum applied interiorly of the drum.

Micro-circuit device

Abstract: A microcircuit device such as a printed circuit or an integrated circuit is described wherein the thickness of insulation between two crossing conductive bodies can be substantially decreased as compared to the corresponding thickness in known like devices. In the case for example, such as magnetic coupled film memory devices wherein a low temperature insulating material can be employed and wherein such insulating material is subject to surface tension effects, this is achieved by retaining the photoresist layer on the surface of the metal magnetic bodies resting on the substrate and etching the magnetic bodies to the point where the width of the upper surfaces of the conducting bodies are equal to the width of the nonconductive resist used in the etching or where there is a slight undercut under their retained respective photoresist layers, i.e., the layer on each body extends beyond the perimeter of the surface of the bodies. Such photoresist layer protects sharp metal corners or, in the latter case, provides an umbrella effect in that it extends beyond the sharp edges of the magnetic bodies, the latter being potential areas for electrical shorts. In the case where conductive bodies are employed which generate high temperatures or which have to withstand high service temperatures and wherein correspondingly high temperature insulating materials have to be used or in which it is desired to have very thin hard insulations such as are produced in the use of inorganic insulations, glasses and the like, the aforementioned ''''umbrella'''' effect is provided by a layer of high temperature insulating materials of organic or inorganic compositions on the conducting body''s surface rather than the layer of photoresist material. In this latter case, the insulation thickness can be much thinner than the commonly accepted rule of thumb thickness which is twice that of the conducting bodies for conducting bodies of 30000A. or thicker and even greater such as four or five to one for conducting bodies considerably thinner than 3000A. (for example, 200 to 500A. thick).

Electron beam and ion beam fabricated microwave switch

Abstract: A combination of electron beam and ion beam techniques were used in conjunction with conventional planar technology to fabricate a junction field-effect microwave switch. A digital tape-controlled scanning electron beam was used to expose mask patterns in polymethyl methacrylate resist whose line widths (≤1 um) are inaccessible to conventional photolithography; ion beam sputtering was used to remove a thin gold undercoat from within the exposed patterns, thereby maintaining the good edge resolution; and ion implantation was used to dope the closely spaced interdigitated source and drain regions thus exposed by the preceding process steps in the gold contact mask.

Fabrication of integrated circuits using the electron image projection system (ELIPS)

Abstract: ELIPS is based on the use of an electron image tube principle to project large area (5-cm diameter) ultrahigh resolution (1 micron) electron images from a patterned photocathode onto an electron-sensitive resist layer, thereby replacing the conventional photoresist optical procedures in integrated circuit fabrication [1]. Integrated circuits of minimum linewidths of 0.5 mil have been fabricated to show the practicality of the technique through the full set of mask exposures necessary for a DZTL quad dual input NAND gate. The necessary alignments between successive masks were achieved by an optical dead reckoning technique which allowed the electron image to be adjusted in position and orientation from a known "zero" position to the separately determined location of the pre-existing pattern on the sample. Accuracy of such alignments was ± 2 micron. The much more desirable alignment technique, in which simple devices in the form of alignment marks on the target wafer detect separate electron beams emanating from the cathode, allows rapid alignment to submicron registration and the potential for the complete automation of alignment and exposure. The system provides for the rapid registration and exposure of wafers at high resolution over large areas with great depth of focus under vacuum clean, contactless conditions using an electroresist insensitive to ambient light. It makes practical the fabrication of very high-density planar devices allowing extremely complex large area circuits to be formed. Patterned photocathodes were fabricated by conventional photoresist techniques for the DZTL circuit discussed. For high-resolution (1 micron) patterns, cathodes can be defined in the electron micro-plotter (computer-controlled scanning electron microscope).

Chemical milling process

Abstract: IMPROVED CHEMICAL MILLING PROCESS AND RESULITING PRODUCT UTILIZING PHOTOGRAPHICALLY EXPOSED AN DEVELOPED RESIST DESIGNS ON A METAL PLATE WITH UNEXPOSED PORTIONS OF THE RESIST EMULSION DISSOLVED AWAY, CHARACTERIZED BY A BAKING STEP OR STEPS HARDER THAN CONVENTIONAL, A SERIES OF CONTROLLED ETCHING TREATMENT ON ONE SIDE, AND A SERIES OF DIFFERENTLY CONTROLLED HARSHER ETCHING TREATMENT ON THE OTHER SIDE, RESULTING IN A DESIGN OF SUSPENDED METAL AREAS HAVING SUBSTANTIALLY FLAT PLANE OR SLIGHTLY CONCAVE ETCHED EDGES AS DISTINGUISHED FROM SHOULDERS OR RIDGES. A PARTICULAR APPLICATION IS FOR PRODUCING ELECTRICAL CIRCUITRY UTILIZING A METALLIC PLATE CONTAINING IDENTICAL CIRCUIT DESIGNS ON BOTH SIDES FORMED OF THE PHOTOGRAPHIC ETCH RESIST, AND UPON REMOVAL OF THE UNWANTED METAL BY THE DIFFERENTIAL ETCHING STEPS ON OPPPOSITE SIDES OF THE PLATE, OBTAINING AN INTEGRATED CIRCUIT STRUCTURE WITH CONDUCTORS RESPONDING TO THE ETCH RESISTANT PATTERN AN IN CROSS SECTION BEING SUBSTANTIALLY RECTANGULAR WITH PARALLEL TOP AND BOTTOM AND PARALLEL SIDES, OR WITH THE SIDES VERY SLIGHTLY CONCAVED, THUS PROVIDING ADEQUATE SURFACES ON THE SIDES FOR ATTACHMENT OF WIRES WELDING.

Thick walled pressure vessel

Abstract: A thick walled pressure vessel having a tubular wall is prestressed by bending to resist extreme external pressures, the bending being applied by the external pressure being resisted. The tubular or cylindrical wall contains internal axial cuts which divide the wall into axial sectors with faying surfaces therebetween so that the application of external pressure decreases the curvature of the sectors to prestress them.

Electron-optical masking of semiconductor structures

Abstract: Electron-optical techniques were employed to fabricate planar silicon transistors having a 1-micron strip width and a combined dimensional and registration tolerance of 1000 A. A new electron-sensitive positive resist was used to define a conventional oxide diffusion mask. The exposure equipment is described and electrical parameters of the complete device are given.

Methods of using inorganic resists

Abstract: Chemical treatment of surfaces is limited to selected portions of the surface by applying inorganic resists to the surface in a desired pattern. In a specific example, silicon dioxide is deposited at a low temperature on a titanium surface surrounding a platinum interconnection pattern on a silicon semiconductor slice. The silicon dioxide is patterned to expose the platinum but cover the titanium. Gold is then electroplated onto the platinum in a well-defined pattern.

Intergrated circuit capacitors of aluminium - and aluminium oxide

Abstract: The integrated circuits are of planar type. The first aluminium electrode is deposited, using the appropriate masking and photo resist techniques, on a part of of the basic silicon substrate on which the integrated circuit is manufactured and on that part which is partically covered with an oxide film. After further masking and photo resist processes, a part of the surface of the first aluminium layer on oxidized anodically. The remaining resist is removed and a complete layer of aluminium deposited to form the second electrode whose geometry is then determined by a final photo resist and etching cycle.

Device photolithography: Electron-sensitive materials

Abstract: Certain additives increase the electron sensitivity of Kodak's negative photoresists by a factor of five to seven; others increase the sensitivity of AZ-1350 by a factor of two to three. With additives the contrast of the negative resists is increased, leading to sharper edges and higher resolution. Some of these additives also increase the light sensitivity of both positive and negative resists. A recording system based on a silver halide emulsion and containing a conductive underlay is also described.

Preventing speed loss in oxygen sensitive photo-resist layers

Abstract: A METHOD FOR PREVENTING LOSS OF PHOTOGRAPHIC SPEED OF AN OXYGEN SENSITIVE PHOTORESIST BY PROVIDING A LAYER OF INERT GAS PRODUCING MATERIAL OVER THE STANDARD PHOTORESIST. THE GAS PRODUCING MATERIAL LIBERATES GAS DURING THE EXPOSURE STEP THUS PROTECTING THE RESIST.

Plating resist solution

Abstract: A catalyst-free, solvent-free plating resist solution consisting of a diallyl phthalate prepolymer having a molecular weight of about 4900 and a liquid epoxy compound such as 1, 2-epoxy ethylbenzene is disclosed. The plating resist solution contains about 0.1 to 3 parts by weight of the diallyl phthalate prepolymer to one part by weight of the liquid epoxy compound.

Improvements in or relating to the fabrication of semiconductor devices

Abstract: 1294516 Semiconductor devices WESTERN ELECTRIC CO Inc 15 Sept 1970 [15 Sept 1969] 43902/70 Heading H1K In a method of making a semiconductor device a mask, comprising a first layer of material covered with a second layer of material having an aperture therein is formed on the surface of a semiconductor body, ions are implanted into the body through the part of the first layer exposed by the aperture in the second layer, the size of the aperture in the second layer is reduced, and the part of the first layer exposed by the reduced aperture is removed. An N type Si body (11) is provided with a passivation layer (12) of thermally grown or deposited silicon oxide, or of Al 2 O 3 , Si 3 , N 4 or ZrO 2 . A masking layer (13) of a metal such as Au, Pt, or Zr is applied by evaporation or sputtering and an intermediate layer of Cr, Ni, or Tr and Pt may be included to improve adhesion. A layer (14) of photoresist is applied and used to form an aperture in the masking layer (13) for example by etching with KI 3 if the layer is of Au or by back sputtering. The resist layer is removed and ions are implanted into the Si body 11 through the part of the passivation layer 12 exposed by the aperture in masking layer 13 to form a P type region 16, Fig. 3. The size of the aperture in the masking layer is reduced by electroplating the exposed area of the passivation layer (12) is removed by back sputtering or by etching and the masking lyer (13) is removed. The masking layer may also be of a material which expands, so that the size of the aperture is reduced, when oxidized. The method may be applied successively to produce a transistor and a plurality of devices may be formed simultaneously to form an integrated circuit.

Process for the manufacture of a traveller for ring spinning frames or ring twisters

Abstract: 1,200,478 Ring traveller W REINERS and S FURST [trading as REINERS & FURST] 6 Dec, 1967 [21 Dec, 1966], No 55466/67 Heading D1D A ring traveller is produced by taking a shape 1 of plastics material formed in a known manner eg by injection moulding or casting and inserted a rod 1a to form means to resist the thread wear The rod may be inserted in a bore formed in the plastics material or it may be pressed in, nail-like or it may be provided with a screw thread and screwed in As shown the rod may have different diameter positions, which are joined by an intermediate surface arranged to match the associated shape of the plastics material The rod is preferably introduced into a surface of the plastics material at right angles to the surface The rod may made of steel and be chromium plated, polished or delustered; alternatively the rod may be of sintered ceramics

Printed Circuit Manufacture

Abstract: 1,191,215 Printed circuits RCA CORPORATION 31 May, 1968 [2 June, 1967], No 26235/68 Heading H1R In a method of producing a printed circuit by a photo-etch process any imperfections formed during the application, exposure or development of an initial layer of photo-resist which would result in pin-holes being formed in the circuitry during etching is corrected by the application of an additional layer of photoresist which is subsequently exposed and developed A copper-coated dielectric substrate is dip-coated with a positive resist and then exposed through a metallized glass mask having delineated thereon an image of the desired circuitry After exposure the substrate is subjected to a developer and the exposed photo-resist removed To overcome the possibility that pin-holes may have formed in the unexposed photo-resist a second coating of photo-resist is then applied and exposed and developed to form the same photo-resist pattern as the first layer The exposed copper layer is then etched away to leave the required conductor pattern Different photo-resist layers may be used and positive, negative or combinations thereof photo-resists may be used