Showing papers on "Resist published in 1985"

Magnetic recording medium

Abstract: PROBLEM TO BE SOLVED: To improve a writing characteristic and a reading characteristic by making a concentration distribution in a vertical direction of ions to be injected to a magnetic recording layer of a perpendicular magnetic recording medium a suitable concentration distribution corresponding to a layer to which the ions are injected.SOLUTION: A method for manufacturing a perpendicular magnetic recording medium 100 includes: a magnetic recording layer film formation step for film-forming a magnetic recording layer 122 on a disk substrate 110; a resist layer film formation step for film-forming a resist layer 130 on the magnetic recording layer; a patterning step for forming a predetermined pattern having concave and convex parts by changing partially the thickness of the resist layer by processing the resist layer; and an ion injection step for injecting ions into a plurality of layers including the magnetic recording layer with the resist layer placed therebetween. In the ion injection step, a layer to which the ions are injected is determined by adjusting an energy amount for injecting the ions, and the total amount of the ions to be injected to each layer is determined by adjusting time for holding the energy amount.

PROLITH: A Comprehensive Optical Lithography Model

Abstract: The Positive Resist Optical Lithography model (PROLITH) is introduced. The model predicts resist profiles for submicron projection, proximity and contact printing. Included are models for optical projection systems, the standing wave effect for projection printing, a diffraction model for contact printing, a kinetic model for the exposure reaction, and a kinetic model of the development process. Also included in PROLITH are the effects of prebake conditions and polychromatic exposure.

Selective epitaxial growth method

Abstract: PURPOSE:To eliminate generation of crystal defect at the periphery of semiconductor layer and obtain flat grown layer by providing an aperture through anisotropic dry etching and realizing epitaxial growth under a reduced pressure of at least 100Torr or less with the remaining film used as the mask, at the time of boring an aperture to an insulating film deposited on the surface of semiconductor substrate and forming a semiconductor layer by the epitaxial growth on the exposed substrate surface. CONSTITUTION:An SiO2 insulating film 2 is deposited on the surface of a semiconductor substrate 1, the area other than the specified region is covered with a resist film 3 by the photo-engraving method, and an aperture 6 is formed on the film 2 by the parallel flat plate type anisotropic dry etching apparatus with the mixed gas of CF4 and H2 used as the etchant. Then, the film 3 unwanted is removed and a semiconductor layer 7 is formed by the epitaxial growth method on the substrate 1 exposed to the aperture 6 under the reduced pressure condition. In this case, a mixed gas of H2 carrier gas and SiH2Cl2 is used, pressure is set to 100Torr or less and temperature is set to 900-1,100 deg.C for the epitaxial growth.

Radiolysis and resolution limits of inorganic halide resists

Abstract: Patterning at the 1–2 nm size scale has been demonstrated with self‐developing metal halide resists using a subnanometer diameter 100 keV electron beam. Electron energy loss spectroscopy during lithographic exposure indicates removal of the halide ion first, followed by displacement of the metal ions. Under appropriate exposure of AlF3, we have demonstrated that aluminum metal structures can be fabricated in situ. Nanometer scale patterns have been replicated into Si3N4 via reactive ion etching using AlF3 as the resist mask.

Thermally transferable layers of radiation sensitive epoxy resins used to prepare protective coatings and relief images

Abstract: A process for the production of a protective layer or a relief image on a substrate, wherein a radiation-sensitive layer, consisting of a solid film-forming epoxy resin containing a photoinitiator, which can be activated by radiation, for the polyaddition reaction, is transferred from a support to a substrate, then exposed directly or under a photomask and hardened by the action of heat, after which, if appropriate, the unexposed parts are developed with a solvent. The process is suitable, for example, for the production of printed circuits, solder resist masks and offset printing plates.

Magneto-optical memory element

Abstract: A magneto optical memory element includes a guide track groove portion (12) and address signal pit portion (13) for indicating the address of the guide track groove. The address signal pit portion has a pit width (t₁) narrower than the groove width (t₂) of the guide track groove portion. The apparatus reads out address information by detecting the variation of light beam intensity reflected from the address signal pits, and reads out data information by detecting the variation of magnetic polarization angle properties in the magneto optical recording layer. In the manufacturing method a laser beam is employed to form a pattern of track grooves and address signal pits in a resist film deposited on a glass substrate; The resist film is developed, the substrate is etched through the developed resist film, the remaining resist film is removed, and a magneto-optical medium layer is deposited on the etched substrate.

Electron-beam fabrication of GaAs low-noise MESFET's using a new trilayer resist technique

Abstract: A LO/HI/LO resist system has been developed to produce sub-half-micrometer T-shaped cross section metal lines using e-beam lithography. The system provides T-shaped resist cavities with undercut profiles. T-shaped metal lines as narrow as 0.15 µm have been produced. GaAs MESFET's with 0.25-µm T-shaped Ti/Pt/Au gates have also been fabricated on MBE wafers using this resist technique. Measured end-to, end 0.25-µm gate resistance was 80 ω/mm, dc transconductance g m as high as 300 mS/mm was observed. At 18 GHz, a noise figure as low as 1.4 dB with an associated gain of 7.9 dB has also been measured. This is the lowest noise figure ever reported for conventional GaAs MESFET's at this frequency. These superior results are mainly attributed to the high-quality MBE material and the advanced T-gate fabrication technique employing e-beam lithography.

Pattern forming method

Abstract: PURPOSE:To form a precise pattern by forming a thin film of an adhesive insoluble in a developer on a substrate, forming a film of an energy sensitive composition on the thin film, irradiating the latter film with energy rays, developing it, and etching the exposed portion of the adhesive thin film CONSTITUTION:In the manufacture of a semiconductor magnetic bubble element or the like, on a substrate of silicon or the like an adhesive thin film such as an epoxidized 1,2-polybutadiene thin film is formed On this thin film a thin film of an energy sensitive composition is formed using a negative or positive type photosensitive high molecular compound, a radiation sensitive high colecular compound or the like The latter film is irradiated with energy rays and developed The adhesive thin film exposed by the development is then removed by dry etching to obtain a resist image having a minute pattern and made of the above-mentioned high molecular compound Since the adhesive layer is not dissolved in a developer for the resist layer, meandering phenomenon due to the exfoliation of the resist layer does not occur along the pattern edge Accordingly, a pattern of high resolution and high precision is obtd

Self-developing polysilane deep-uv resists - photochemistry, photophysics, and submicron lithography

Abstract: A new class of alkyl silane copolymers with relatively facile self-developing behavior under deep UV exposure has been examined. These materials can reproduce 0.8 μ features by projection lithography with a KrF excimer light source. The mechanism of material removal is primarily photochemical in nature and yields chemically inert volatile siloxanes as the major photoproducts, via a high quantum yield silylene expulsion/oxidation process.

Adherent sandblast photoresist laminate

Abstract: A sandblast photoresist laminate article of manufacture comprising an adhesive layer, a membrane support layer, and a resist layer can be used in etching the surface of articles with a pattern which can be revealed by the resist layer. The resist laminate is usable in a variety of modes of etching such as exposing the resist with a pattern, developing the pattern, applying the developed resist to the object, and etching the pattern into the object. Further, the resist can be used by applying the unexposed sheet-like resist to an object, exposing the resist with a pattern, developing the pattern and etching the pattern into the object. Lastly, the resist laminate can be used by exposing the resist with a pattern, applying the exposed resist to an object, developing the pattern, and etching the pattern into the object. The resist compositions are typically water developable after exposure with actinic radiation.

Method for detecting endpoint of development

Abstract: A method for detecting an endpoint of development including the steps of; forming a resist layer on a conductive layer formed on a substrate; exposing the resist layer by using light, X-rays, or electron beams; forming one electrode by connecting a connector consisting of a first conductive material to the conductive layer through the exposed resist layer on the substrate; forming another electrode by dipping an assembly consisting of a second conductive material into a developing solution; and developing the exposed resist layer while monitoring the current flowing between two electrodes.

Manufacture of semiconductor device

Abstract: PURPOSE:To reduce the number of processes by a method wherein channels with different conduction type are formed by means of implanting different kind of impurities with specified concentration one after another. CONSTITUTION:An insulating film with specified thickness is formed on the surface of an N type semiconductor substrate 20. Firstly a window is opened in the insulating film to implant it with a P type impurity forming a P well region 21. Secondly windows 23 are opened in another insulating film 22 newly formed on the surface of semiconductor substrate 20 to implant them with boron 24 forming guard rings 25 at the junction of P well region 21 further forming a P conduction type source 26a and a drain 26b in the semiconductor substrate 20. Finally resist films 27 are formed and phosphorus 28 is ion-implanted through remaining window 23 to form an N conduction type source 29a, a drain 29b further forming an isolation layer 30. As the next process, arsenic ion is implanted utilizing remaining resist film 27 as a mask to set up the contact resistance of the source 29a and the drain 29b. Later the resist films 27 are removed. Through these procedures, the number of forming and patterning processes of resist films may be reduced.

Manufacture of insulated gate type semiconductor device

Abstract: PURPOSE:To operate the titled semiconductor device at higher frequency by forming a conductor or a semiconductor shaping a gate electrode while being adjoined to an insulator in the side section of a second semiconductor so that the upper end section of the gate electrode is not left on a third semiconductor. CONSTITUTION:A first conductive film 2 is formed on an insulating substrate as a lower side electrode and a lead, and etched selectively (1). A P or N type conduction type first nonsingular crystal semiconductor 3 (S1), a second intrinsic or N or P type semiconductor 4 (S2) and a third semiconductor 5 having the same conduction type as the first semiconductor are laminated and formed on the upper surface of the conductive film 2. When a resist 18 is shaped on the upper surface and anisotropic etching from the vertical direction is executed, these conductors can also be left to sections except a region, in which there is the mask 18, as shown in broken lines 38, 38'. Consequently, a gate electrode can be formed selectively only to the periphery of the S1, S2 and S3 sides. There is no gate electrode in the upper section of the third semiconductor, the section 5 is removed by using a plasma etching method, and only 20, 20' in the side periphery of a projecting section are formed as gate electrodes.

Use of immersion tin coating as etch resist

Abstract: A process is disclosed for manufacturing a circuit board having a metal layer in which a portion of the metal layer is removed by etching. A novel etch resist immersion tin composition is selectively applied to the metal layer to leave areas of coated and uncoated metal followed by etching the metal not coated with the resist. The immersion tin composition is applied as a substantially pore free coating at thicknesses of from about 0.08 to about 0.175 microns. The novel immersion tin composition contains a tin salt and both thiourea compounds and urea compounds.

Process for forming a T-shaped gate structure

Abstract: Using the present invention, a gate for a MESFET may be fabricated having a minimum gate length while having a low resistance gate. In addition, the present invention provides a method for forming a gate and gate recess which are perfectly aligned which is the optimal structure for high frequency power MESFETs. A two layer masking layer is fabricated having a first layer which may be etched uniformly and a second layer of lithographic material which may be photolithographic material such as AZ resist. A gate opening is patterned in the photoresist material and a metal such as gold is deposited by evaporation from acute angles on opposite sides of the gate opening in the resist. The deposited metal serves as a mask which covers all but a very small portion of the opening in the photoresist. The silicon nitride layer is then etched to form a gate opening and gate recess. Gate contact metal is then deposited in the opening thus formed and the nitride, photoresist and gold layers are removed, lifting off a portion of the gate metal layer thus leaving a T-shaped gate which provides a minimum length at the channel gate interface and provides a low gate resistance.

Manufacture of semiconductor device

Abstract: PURPOSE:To form an impurity ion implantation layer selectively to a wafer made of Ge, GeAs, etc., and to eliminate the point at issue regarding the removal of a resist by implanting ions to the whole surface of the semiconductor wafer and removing an unnecessary section through a photoetching method. CONSTITUTION:Arsenic ions are implanted 12 to the whole surface of a Ge single crystal wafer 10, Ge in an opening section 13 is etched while using a photoresist film pattern 11 as a mask, and the resist 11 is removed by a peeling liquid. The resist 11 is removed completely because it is not exposed to ion beams. Boron is implanted 15, a resist 14 is removed, and a CVD SiO2 film 16 and an electrode 17 are formed through heat treatment. Since O2 plasma is not used for removing the resist, there is no contamination in charge shape on the surface of the wafer and no deterioration of the state of a crystal, dark currents are reduced, and the rate of increase of dark currents to the increase of backward voltage is also minimized extremely.

Device fabrication method using spin-on glass resins

Abstract: A new method for fabricating a device, such as a semiconductor device, is disclosed. The method includes the step of patterning a substrate with a trilevel resist containing a spin-deposited substitute for the conventional central, silicon dioxide region. This substitute includes an organosilicon glass resin in combination with metal-and-oxygen containing material. The inventive method prevents the losses of linewidth control, and avoids the pattern degradation due to undesirably many pinholes, of previous such methods.

Wet process for developing styrene polymer resists for submicron lithography

Abstract: The invention is directed to a process for preparation of a negative resist configuration on a siliceous substrate. A negative resist polymer is bonded to the siliceous substrate using an intermediary interlayer of silane between the substrate and the resist polymer. The silane is applied to the siliceous substrate and the silane-coated surface is heated to accomplish bonding; the resist polymer is then applied as an overlay on the silane-coated surface and the resist polymer surface is irradiated to form an image therein and simultaneously to bond the resist polymer image to the silane-coated surface. The resist image is then developed using a developer solvent to remove resist polymer which was not irradiated, and the developer solvent is followed by a rinse solvent which, in one aspect, substantially eliminates any snaky lines or edges on the developed resist image, or in another aspect, by utilizing multiple rinses to accomplish the same and to also remove substantially all of the residual developer solvent trapped within the developed resist image, thus reducing swelling and returning the initial resist to about the same dimensions as the image prior to development.

Method for planarizing the surface of an interlayer insulating film in a semiconductor device

Abstract: A method for planarizing the surface of an insulation layer deposited on a first interconnection layer to allow a second interconnection layer deposited thereon without causing a breakage of the second interconnection layer. This method is characterized in that at least two insulation films, different in etching characteristics each other, are first formed on the first interconnection layer, and then a resist layer is deposited on the second insulating film. Subsequently, a portion of the resist layer is etched to expose the top surface of the second insulating film, and the second insulating film is selectively and anisotropically etched using the remaining resist layer as a mask. After removing the first insulating film and the remaining resist mark, a third insulating film is deposited to a thickness sufficient to make flat the surface thereof.

Changes of Volume and Surface Compositions of Polymethylmethacrylate under Electron Beam Irradiation in Lithography

Abstract: The change of the content of oxygen and carbon in Polymethylmethacrylate (PMMA) under electron beam irradiation is investigated by Auger electron spectroscopy (AES) whereby we estimate the characteristic energy deposition of the decrement of oxygen to be 0.8–1.2×103 eV/nm3. It is also confirmed that cooling of PMMA considerably reduces the elimination rate of oxygen and that the decrement of the thickness of PMMA film under electron beam irradiation is closely related to the change of oxygen content. Moreover, it is shown that the PMMA alters from the positive resist to the negative resist as determined by observing thickness changes.

Low defect etching of patterns using plasma-stencil mask

Abstract: Resist coating on the surface of a semiconductor wafer is removed by a one-step process using anisotropic reactive ion etching through an apertured stencil disposed close to but spaced from the resist-coated surface. The ion bombardment greatly enhances the plasma etch rate in the areas of the coating exposed through stencil apertures so that only the exposed areas are effectively etched during the limited exposure time in spite of the presence of chemically reactive gas between the stencil and other areas of the wafer surface. The technique is limited by low resolution but is ideally suited for clearing resist from atop fiducial marks used to align the wafer with multiple wafers in an integrated circuit chip.

Resist development method

Abstract: In the resist development method disclosed herein, the spin development of a resist coating on the surface of a semiconductor wafer is monitored by measuring light scattered back from the wafer surface from an incandescent source. During development, the sensed light level oscillates due to optical fringing caused by the thinning of the resist layer in the exposed areas and the fringe generated oscillation essentially stops when the development breaks through in the exposed areas. By comparing sample data obtained from the sensed light level with template data representing a known or characteristic behavior, a control point corresonding to the last fringe may be determined. Development is then terminated a calculated time after the control point.

Theoretical studies of the electron scattering effect on developed pattern profiles in x‐ray lithography

Abstract: Monte Carlo calculations of the photo and Auger electron production by a monochromatic x ray of Al Kα have been performed to study the effect of their diffusion in a 1.0‐μm polymethyl methacrylate resist film on replicated patterns both with and without the Si substrate. Based on both the calculated spatial distribution of the absorbed energy density and the solubility rate for mixture developers of methyl isobutyl ketone (MIBK) and isopropyl alcohol (IPA), investigations were carried out on the x‐ray resist sensitivity, the ultimate resolution, and the mask contrast effect on developed profiles. Typically, the ultimate resolution was found to be 1000 A with MIBK and to be 400 A with MIBK : IPA=1 : 3. There was no significant influence of the Si substrate on the developed patterns.

Complementary thin-film transistor

Abstract: PURPOSE:To simply obtain a complementary device having uniform characteristics which is individually excellent by a method wherein a channel is formed using an Si film containing no impurities, the Si thin film of source and drain is formed in P or N type, and a P-channel or N-channel thin film FET is provided CONSTITUTION:Si thin films 302 and 303 containing no impurities are provided on an insulated substrate 301 in an isolated manner, a gate insulating film 304 is coated thereon, and a gate electrode 305 is attached P-thin films 308 and 309 are formed by performing B-ion implantation using the resist 304 as a mask, and N type thin films 312 and 315 are formed by implanting As ions using a resist 305 as a mask Lastly, an insulating film 314 is coated, an aperture is provided, electrodes 315-318 are attached and the titled transistor is formed According to this constitution, as a channel consists of an Si thin film containing no impurities, OFF current is low, and P- and N-channel elements with a conductive type source and drain can be obtained in a simple manner Also, as the thin film is thinner than the maximum width of a depletion layer, Vth is reduced, ON current is increased, a high speed operation can be performed, the characteristics of both FETs are markedly improved, and the difference in characteristics can be reduced

Method of forming electrode pattern of semiconductor device

Abstract: A method of forming an electrode pattern on a surface of a semiconductor substrate which comprises the steps of forming a metal film which is vulnerable to a reactive ion etching on a surface of the semiconductor substrate, forming on the metal film another metal film which is vulnerable to an ion milling but is resistant to the reactive ion etching, forming a resist pattern on the another metal film, selectively etching the another metal film by the ion milling using the resist pattern as a mask, and selectively etching the metal film by the reactive ion etching using the another metal film as a mask. A semiconductor device having an electrode pattern as formed by the above method is also disclosed.

Evaporated thick metal and airbridge interconnects and method of manufacture

Abstract: A first masking layer of a first resist is provided over a semiconductor substrate and is patterned in a selected region to provide a masked region over which an airbridge interconnect will be provided. A second relatively thick layer of a second, different type of resist and a third relatively thin layer of resist are provided, respectively, over the substrate. The second and third layers of resist are patterned to provide an aperture having overhanging portions exposing the previously applied patterned regions of the first layer, and selected adjacent portions of the substrate. The second and third layers may also be patterned to provide a region for a patterned strip conductor. A stream of evaporated metal is directed towards the substrate and deposited within the apertures to provide an airbridge interconnect conductor and patterned strip conductor. The overhanging portions of the apertures provide separation between the metal layer deposited within the aperture and the metal layer deposited over the third masking layer, allowing the second and third masking layers to be lifted-off without disturbing the conductors. The masked regions underlying the bridges are also removed leaving the airbridge interconnect and patterned strip conductor.

Method of patterning resist for printed wiring board

Abstract: A methof for patterning a photoresist or insulating layer on a printed wiring board utilizes two photoreactive coatings comprising a photoprocessable ultraviolet (UV) sensitive layer overlaid with a thin, unexposed, undeveloped strip base silver film. A white light x-y plotter, preferably employing an octogonal aperture, is driven directly from a CAD system to expose the film on the board in the desired pattern without affecting the underlying UV sensitive layer. The film is then developed on the board and employed as an in situ mask for the underlying UV layer during exposure of the board to a UV flood lamp. After UV exposure the film is peeled off to allow conventional processing of the selectively polymerized layer. This technique produces high resolution, inspectable onboard masks in full registration using reliable low energy plotters.

Method of pattern detection

Abstract: An anti-reflective coating film is formed on a resist film formed on a substrate having a target pattern formed on its surface, thereby to reduce multiple reflection of light in said resist film. The distortion of the pattern detection signal due to multiple reflection in said resist film is thereby prevented to improve the mask positioning accuracy.

Ion beam impact and penetration of polymethyl methacrylate

Abstract: Depth distributions of energy dissipation and implantation ranges in the polymer resist polymethyl methacrylate (PMMA) have been calculated by using the TRIM computer code. The relevance of such calculations to experimentally obtained data in connection with ion‐beam lithography is discussed. It is concluded that the result of the computer simulations may be of value in order to explain the responsible mechanism for the modification (solubility, erosion rate) of a resist material due to ion irradiation. Experimental results of PMMA erosion during ion irradiation are also presented, showing a strong relationship between the erosion and electronic stopping.