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Resist

About: Resist is a research topic. Over the lifetime, 40991 publications have been published within this topic receiving 371548 citations.


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Journal ArticleDOI
TL;DR: In this paper, a LO/HI/LO resist system has been developed to produce sub-half-micrometer T-shaped cross section metal lines using e-beam lithography.
Abstract: A LO/HI/LO resist system has been developed to produce sub-half-micrometer T-shaped cross section metal lines using e-beam lithography. The system provides T-shaped resist cavities with undercut profiles. T-shaped metal lines as narrow as 0.15 µm have been produced. GaAs MESFET's with 0.25-µm T-shaped Ti/Pt/Au gates have also been fabricated on MBE wafers using this resist technique. Measured end-to, end 0.25-µm gate resistance was 80 ω/mm, dc transconductance g m as high as 300 mS/mm was observed. At 18 GHz, a noise figure as low as 1.4 dB with an associated gain of 7.9 dB has also been measured. This is the lowest noise figure ever reported for conventional GaAs MESFET's at this frequency. These superior results are mainly attributed to the high-quality MBE material and the advanced T-gate fabrication technique employing e-beam lithography.

79 citations

Journal ArticleDOI
TL;DR: A shape-tunable approach for the fabrication of multi-scale polymer microlenses (μ-lenses) and microlens arrays (MLAs) using an ink-jet printing (IJP) technique is demonstrated in this paper.
Abstract: A shape-tunable approach is demonstrated for the fabrication of multi-scale polymer microlenses (μ-lenses) and microlens arrays (MLAs) using an ink-jet printing (IJP) technique. Also, the influence of the surface wetting conditions on the geometrical and optical characteristics of the printed μ-lenses is investigated. A photo-curable organic–inorganic hybrid polymeric resist (H-resist) is used; it is printed on a hydrophobic-treated glass substrate with different number of drops per μ-lens and cured using an ultraviolet lamp (UV lamp). High quality μ-lenses and MLAs with good uniformity and reproducibility were fabricated. The lens diameters and heights were controllable by changing the number of H-resist drops together with tuning the surface wetting conditions; these shape changes affect the optical properties of the μ-lenses and MLAs such as the numerical aperture (NA) and focal distance (f), as well as the f-number (f#), which indicates the light-gathering power. The optical properties of the tunable μ-lenses and MLAs are very attractive for application in optical systems such as interconnects and pixelated imagine sensors that use CCD or SPAD arrays, offering an efficient, simple and cheap alternative to the conventionally used photolithography technique.

79 citations

Journal ArticleDOI
TL;DR: In this article, a spacer lithography technology using a sacrificial layer and a chemical vapor deposition (CVD) spacer layer has been developed, and is demonstrated to achieve sub-40 nm structures with conventional dry etching.
Abstract: A spacer lithography technology using a sacrificial layer and a chemical vapor deposition (CVD) spacer layer has been developed, and is demonstrated to achieve sub-40 nm structures with conventional dry etching. The minimumsized features are finished not by photolithography but by the CVD film thickness. Therefore the spacer lithography technology yields critical dimension variations of minimum-sized features which are much smaller than achieved by optical or e-beam lithography. It also provides a doubling of device density for a given lithography pitch. This spacer lithography technology is used to pattern silicon-fin structures for double-gate MOSFETs and CMOS FinFET results are reported. 2002 Elsevier Science Ltd. All rights reserved.

79 citations

Journal ArticleDOI
TL;DR: In this article, resist edge profiles of lines produced by electron-beam exposure are explored through the use of numerical simulation, using Monte Carlo simulation of electron scattering and energy dissipation, a simple etch rate versus dose model for the resist, and a string development algorithm.
Abstract: Resist edge profiles of lines produced by electron-beam exposure are explored through the use of numerical simulation. The modeling approach uses Monte Carlo simulation of electron scattering and energy dissipation, a simple etch rate versus dose model for the resist, and a string development algorithm. The simulation was made on an IBM 370/158 and primarily considers a multiple-spot Gaussian beam exposure of PMMA resist. An absolute quantitative evaluation of the simulation accuracy is made based on resist exposure-development measurements and comparisons with SEM micrographs of experimental profiles. The comparisons show good quantitative agreement and indicate that modeling can be used as a quantitative processing aid. Simulation results illustrate the importance of resist, beam, and substrate parameters in the context of optical mask writing (0.5-µm resist on 0.08-µm Cr on SiO 2 ) and direct wafer writing (1.0-µm resist on Si, Gd 3 Ga 5 O 12 , and Au).

79 citations

Journal ArticleDOI
17 Jan 2008-Langmuir
TL;DR: This is the first report of a printing process for electronic devices that combines the concepts of direct and indirect printing in the same printing step and for the same material by employing a transferred pattern both as an etch resist and as a functional material as part of the final device (direct printing).
Abstract: We have developed a manufacturing process for organic thin-film transistors and organic complementary circuits in which a microcontact-printed phosphonic acid self-assembled monolayer is employed first as an etch resist to pattern aluminum gate electrodes by wet etching and then as the gate dielectric of the same device. To our knowledge, this is the first report of a printing process for electronic devices that combines the concepts of direct and indirect printing in the same printing step and for the same material by employing a transferred pattern both as an etch resist (indirect printing) and as a functional material as part of the final device (direct printing). Owing to the small thickness and the high quality of the monolayer gate dielectric, the transistors and circuits operate at a low voltage of 3 V.

79 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023275
2022625
2021225
2020398
2019489
2018501