Topic
Resist
About: Resist is a research topic. Over the lifetime, 40991 publications have been published within this topic receiving 371548 citations.
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Patent•
28 Jun 2010
TL;DR: In this paper, the authors present a method for forming electronic devices that involves alkaline treatment of photoresist patterns and allow for the formation of high density resist patterns, which find particular applicability in semiconductor device manufacture.
Abstract: Methods of forming electronic devices are provided. The methods involve alkaline treatment of photoresist patterns and allow for the formation of high density resist patterns. The methods find particular applicability in semiconductor device manufacture.
176 citations
Patent•
06 Jun 2008
TL;DR: In this article, the problem of the formation of a fine pattern capable of forming a pattern having a width smaller than a resolution limit by a small number of manufacturing processes is addressed.
Abstract: PROBLEM TO BE SOLVED: To provide a formation method of a fine pattern capable of forming a fine pattern having a width smaller than a resolution limit by a small number of manufacturing processes. SOLUTION: In this formation method of a fine pattern, a thin film 102 is formed on a substrate 101; a resist film 103 is formed on the thin film 102; the resist film 103 is processed into patterns 103' having a predetermined interval by using a photolithography technique; and a silicon oxide film 105 different from the thin film 102 and the resist films 103' is formed on the processed resist films 103' and the thin film 102 by alternately supplying a source gas containing organic silicon and activated oxygen species. Sidewall spacers 105' are formed on sidewalls of the processed resist films 103' by retreating the silicon oxide film 105, and the thin film 102 is processed by removing the processed resist films 103' and using the sidewall spacers 105' as a mask. COPYRIGHT: (C)2009,JPO&INPIT
174 citations
IBM1
TL;DR: The IBM SU-8 resist material as mentioned in this paper is an epoxy-based resist designed specifically for ultrathick, high-aspect-ratio MEMS-type applications and it has been shown that with single-layer coatings, thicknesses of more than 500 /spl mu/m can be achieved reproducibly.
Abstract: Detailed investigations of the limits of a new negative-tone near-UV resist (IBM SU-8) have been performed. SU-8 is an epoxy-based resist designed specifically for ultrathick, high-aspect-ratio MEMS-type applications. We have demonstrated that with single-layer coatings, thicknesses of more than 500 /spl mu/m can be achieved reproducibly. Thicker resist layers can be made by multiple coatings, and we have achieved exposures in 1200-/spl mu/m-thick, double coated SU-8 resist layers. We have found that the aspect ratio for near-UV (400 nm) exposed and developed structures can be greater than 18 and remains constant in the thickness range between 80 and 1200 /spl mu/m. Vertical sidewall profiles result in good dimensional control over the entire resist thickness. To our knowledge, this is the highest aspect ratio reported for near-UV exposures and resist thicknesses. These results will open up new possibilities for low-cost LIGA-type processes for MEMS applications. In addition, the SU-8 material has interesting mechanical properties which also makes it attractive for photoplastic device fabrication.
174 citations
Patent•
IBM1
TL;DR: In this article, a multi-level wiring structure wires and vias are formed by an isotropic deposition of a conductive material such as copper, on a dielectric base, such as a polyimide.
Abstract: In a multi-level wiring structure wires and vias are formed by an isotropic deposition of a conductive material, such as copper, on a dielectric base, such as a polyimide. In a preferred embodiment of the invention copper is electroplated to a thin seed conducting layer deposited on the surface of the dielectric base in which via openings have been formed. Openings in a resist formed on the surface of the dielectric base over the seed layer forms a pattern defining the wiring and via conductor features. Electroplated copper fills the via openings and wire pattern openings in the resist isotropically so that the upper surfaces of the wiring and vias are co-planar when the plating step is complete. In adding subsequent wiring levels, the resist is removed and the via conductor and wiring pattern covered with another dielectric layer which both encapsulates the conductors of the previous layer and serves as the base for the next level which is formed in the same manner as the previous level.
174 citations
TL;DR: In this paper, an organic film-based image is produced, which is subsequently transferred by plasma etching techniques into underlying films/substrates to produce nanoscale materials templates.
Abstract: Photolithographic patterning of organic materials and plasma-based transfer of photoresist patterns into other materials have been remarkably successful in enabling the production of nanometer scale devices in various industries. These processes involve exposure of highly sensitive polymeric nanostructures to energetic particle fluxes that can greatly alter surface and near-surface properties of polymers. The extension of lithographic approaches to nanoscale technology also increasingly involves organic mask patterns produced using soft lithography, block copolymer self-assembly, and extreme ultraviolet lithographic techniques. In each case, an organic film-based image is produced, which is subsequently transferred by plasma etching techniques into underlying films/substrates to produce nanoscale materials templates. The demand for nanometer scale resolution of image transfer protocols requires understanding and control of plasma/organic mask interactions to a degree that has not been achieved. For manufa...
174 citations