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Resist

About: Resist is a research topic. Over the lifetime, 40991 publications have been published within this topic receiving 371548 citations.


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Patent
02 Oct 2008
TL;DR: In this paper, a manufacturing method for a semiconductor device capable of inhibiting the falling of a resist pattern is proposed, where the resist patterns are formed in a shape that a plurality of rectilinear patterns 51 are arranged in a row along the extending direction of the rectilINear patterns.
Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device capable of inhibiting the falling of a resist pattern. SOLUTION: The manufacturing method for the semiconductor device has a process forming a photo-resist film on a film to be etched 11, a process forming rectilinear resist patterns 50 placed on the film to be etched 11 by exposing and developing the photo-resist film and a process forming a rectilinear pattern 11a by etching the film to be etched 11 while using the resist patterns 50 as masks. In a process forming the resist patterns 50, the resist patterns 50 are formed in a shape that a plurality of rectilinear patterns 51 are arranged in a row along the extending direction of the rectilinear patterns 51 and the adjacent rectilinear patterns 51 are connected through broad width sections 52 broader than the rectilinear patterns 51. COPYRIGHT: (C)2009,JPO&INPIT

156 citations

Journal ArticleDOI
TL;DR: In this article, the etch resistance of electron-beam lithography resists, poly(methyl methacrylate) (PMMA) and ZEP520A, is increased significantly by sequential infiltration synthesis (SIS).
Abstract: The etch resistance of electron-beam lithography resists, poly(methyl methacrylate) (PMMA) and ZEP520A, is increased significantly by sequential infiltration synthesis (SIS). This process infiltrates the bulk of the resist film with alumina, rendering it resistant to plasma etching. The enhanced etch resistance eliminates the need for an intermediate hard mask and the associated process costs and pattern fidelity losses. Furthermore, the improvement is realized with no degradation to the line-edge roughness of lithographically defined patterns. The enhancement in etch resistance is especially strong at the edges of the printed lines, owing to diffusion of the SIS precursors from the resist sidewalls. These improvements enable the anisotropic transfer of sub-100 nm patterns deeply into silicon without the need for an intermediate hard mask.

156 citations

Journal ArticleDOI
TL;DR: In this article, a self-assembled monolayer of n−octadecanethiol (C18H37SH) was used as a mask for chemical etching of GaAs.
Abstract: We present results on electron beam exposure of a self‐assembled monolayer film as a self‐developing positive resist on GaAs. A 1.5 nm thick monolayer of n‐octadecanethiol (C18H37SH) deposited on a GaAs (100) substrate showed a electron beam sensitivity of about 100 μC/cm2. The monolayer resist was used as a mask for chemical etching of the GaAs. Patterns in GaAs have been created with widths approximately equal to the exposing electron beam width of 50 nm.

156 citations

Journal ArticleDOI
TL;DR: In this paper, an elastomeric phase mask was used in conformal contact with photoresist to generate ∼90nm lines in commercially available photoresists, using broadband, incoherent light with wavelengths between 330 and 460 nm.
Abstract: This article describes a near-field photolithographic method that uses an elastomeric phase mask in conformal contact with photoresist. The method is capable of generating ∼90 nm lines in commercially available photoresist, using broadband, incoherent light with wavelengths between 330 and 460 nm. Transfer of these patterns into silicon dioxide and gold demonstrates the integrity of the patterned resist.

155 citations

Patent
16 Jun 2005
TL;DR: In this paper, a method for patterned amorphous carbon layers in a semiconductor stack is presented. Butts et al. developed a pattern transferred into the resist layer with a photolithographic process and etched through the amorphized carbon layer in at least one region defined by the pattern in the resist layers.
Abstract: A method for forming a patterned amorphous carbon layer in a semiconductor stack, including forming an amorphous carbon layer on a substrate and forming a silicon containing photoresist layer on top of the amorphous carbon layer. Thereafter, the method includes developing a pattern transferred into the resist layer with a photolithographic process and etching through the amorphous carbon layer in at least one region defined by the pattern in the resist layer, wherein a resist layer hard mask is formed in an outer portion of the photoresist layer during etching.

155 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023275
2022625
2021225
2020398
2019489
2018501