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Resist

About: Resist is a research topic. Over the lifetime, 40991 publications have been published within this topic receiving 371548 citations.


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Patent
04 May 2001
TL;DR: In this paper, a method for reducing within wafer variation of a critical metric of a lithography process may include measuring at least one property of a resist disposed upon a wafer during the process.
Abstract: Methods and systems for evaluating and controlling a lithography process are provided. For example, a method for reducing within wafer variation of a critical metric of a lithography process may include measuring at least one property of a resist disposed upon a wafer during the lithography process. A critical metric of a lithography process may include, but may not be limited to, a critical dimension of a feature formed during the lithography process. The method may also include altering at least one parameter of a process module configured to perform a step of the lithography process to reduce within wafer variation of the critical metric. The parameter of the process module may be altered in response to at least the one measured property of the resist.

142 citations

Patent
09 Apr 2008
TL;DR: In this paper, a roller type mold is used to continuously imprint nanostructures onto a flexible web or a rigid substrate, which rotate the web synchronously, and the patterns are set by thermal or UV curing.
Abstract: Apparatus and methods for a nano-patterning process to fabricate nanostructures. A roller type mold is used to continuously imprint nanostructures onto a flexible web or a rigid substrate. The process includes a coating and an imprinting module, which rotate the web synchronously. Liquid resist materials are used for imprinting and the patterns are set by thermal or UV curing. The process is used to produce bilayer metal wire-grid polarizers, organic solar cells, and organic light emitting diodes.

141 citations

Journal ArticleDOI
TL;DR: In this paper, the authors studied the characteristics and limitations of optical projection lithography using high numerical-aperture (NA) optical microscopy lenses and developed a simple, quick-turn-around method of making sub-quarter-micron-linewidth x-ray masks.

141 citations

Journal ArticleDOI
TL;DR: In this paper, a method to fabricate multi-layer, embedded micro fluidic structures by simply employing dosage-controlled UV exposure on thick SU-8 resist and anti-reflection coating on the bottom surface to prevent the reflection UV-light from inducing exposure was proposed.
Abstract: This paper proposes a novel method to fabricate multi-layers, embedded micro fluidic structures by simply employing dosage-controlled UV exposure on thick SU-8 resist and anti-reflection coating on the bottom surface to prevent the reflection UV-light from inducing exposure. Experimental results show the top wall thickness of the embedded micro-channels can be well controlled in a resolution of 2 μm for the UV dosage from 120 to 190 mJ/cm2. Stacked micro-channels have also been successfully realized and showed no interference on the bottom structures when the top structures are being exposed. Numerical simulation of the top wall thickness by UV exposure dosage control has also been conducted, and the comparison between the calculated and experimental results showed similarity in trend. This simple and inexpensive method can be applied to fabricate multi-layers of complex fluidic systems for the applications of μTAS (MicroTotal Analysis System), inkjet printhead, capillary electrophoresis, and micro PCR (Polymerase Chain Reaction).

141 citations

Patent
10 Jul 1991
TL;DR: In this paper, the resist layer is exposed through a mask having a pattern of regular spaced openings in the areas of the planned capacitor to radiant energy in sufficient quantity to under expose, out of focus expose or a combination of under expose and out-of-focus expose the resistor layer.
Abstract: A new method to produce a microminiturized capacitor having a regular microscopic ripple surface electrode is achieved by depositing a first polysilicon layer over a suitable insulating base. A resist layer is formed over the first polysilicon layer. The resist layer is exposed through a mask having a pattern of regular spaced openings in the areas of the planned capacitor to radiant energy in sufficient quantity to under expose, out of focus expose or a combination of under expose and out of focus expose the resist layer. The mask is shifted a fixed and short distance. The resist layer is exposed through the shifted mask to radiant energy in sufficient quantity to under expose or out of focus expose, or a combination of under expose or out of focus expose the resist layer again and in a different location. The shifting of the mask and exposing resist steps are repeated until a pattern of the regular microscopic ripple has been formed in the resist layer. The resist layer is developed to leave the pattern of regular microscopic ripple in the surface of the resist layer. The resist layer and said first polysilicon layer is uniformly and anisotropically etched to create the pattern of regular microscopic ripple in the surface of the first polysilicon layer. The remaining resist layer is removed. An insulating layer is deposited over the ripple surface. The capacitor structure is completed by depositing a second polysilicon layer over the insulating layer.

141 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023275
2022625
2021225
2020398
2019489
2018501