Showing papers on "RF power amplifier published in 2009"

High Efficiency RF and Microwave Solid State Power Amplifiers

Abstract: Preface. About the Authors. Acknowledgments. 1 Power Amplifier Fundamentals. 1.1 Introduction. 1.2 Definition of Power Amplifier Parameters. 1.3 Distortion Parameters. 1.4 Power Match Condition. 1.5 Class of Operation. 1.6 Overview of Semiconductors for PAs. 1.7 Devices for PA. 1.8 Appendix: Demonstration of Useful Relationships. 1.9 References. 2 Power Amplifier Design. 2.1 Introduction. 2.2 Design Flow. 2.3 Simplified Approaches. 2.4 The Tuned Load Amplifier. 2.5 Sample Design of a Tuned Load PA. 2.6 References. 3 Nonlinear Analysis for Power Amplifiers. 3.1 Introduction. 3.2 Linear vs. Nonlinear Circuits. 3.3 Time Domain Integration. 3.4 Example. 3.5 Solution by Series Expansion. 3.6 The Volterra Series. 3.7 The Fourier Series. 3.8 The Harmonic Balance. 3.9 Envelope Analysis. 3.10 Spectral Balance. 3.11 Large Signal Stability Issue. 3.12 References. 4 Load Pull. 4.1 Introduction. 4.2 Passive Source/Load Pull Measurement Systems. 4.3 Active Source/Load Pull Measurement Systems. 4.4 Measurement Test-sets. 4.5 Advanced Load Pull Measurements. 4.6 Source/Load Pull Characterization. 4.7 Determination of Optimum Load Condition. 4.8 Appendix: Construction of Simplified Load Pull Contours through Linear Simulations. 4.9 References. 5 High Efficiency PA Design Theory. 5.1 Introduction. 5.2 Power Balance in a PA. 5.3 Ideal Approaches. 5.4 High Frequency Harmonic Tuning Approaches. 5.5 High Frequency Third Harmonic Tuned (Class F). 5.6 High Frequency Second Harmonic Tuned. 5.7 High Frequency Second and Third Harmonic Tuned. 5.8 Design by Harmonic Tuning. 5.9 Final Remarks. 5.10 References. 6 Switched Amplifiers. 6.1 Introduction. 6.2 The Ideal Class E Amplifier. 6.3 Class E Behavioural Analysis. 6.4 Low Frequency Class E Amplifier Design. 6.5 Class E Amplifier Design with 50# Duty-cycle. 6.6 Examples of High Frequency Class E Amplifiers. 6.7 Class E vs. Harmonic Tuned. 6.8 Class E Final Remarks. 6.9 Appendix: Demonstration of Useful Relationships. 6.10 References. 7 High Frequency Class F Power Amplifiers. 7.1 Introduction. 7.2 Class F Description Based on Voltage Wave-shaping. 7.3 High Frequency Class F Amplifiers. 7.4 Bias Level Selection. 7.5 Class F Output Matching Network Design. 7.6 Class F Design Examples. 7.7 References. 8 High Frequency Harmonic Tuned Power Amplifiers. 8.1 Introduction. 8.2 Theory of Harmonic Tuned PA Design. 8.3 Input Device Nonlinear Phenomena: Theoretical Analysis. 8.4 Input Device Nonlinear Phenomena: Experimental Results. 8.5 Output Device Nonlinear Phenomena. 8.6 Design of a Second HT Power Amplifier. 8.7 Design of a Second and Third HT Power Amplifier. 8.8 Example of 2nd HT GaN PA. 8.9 Final Remarks. 8.10 References. 9 High Linearity in Efficient Power Amplifiers. 9.1 Introduction. 9.2 Systems Classification. 9.3 Linearity Issue. 9.4 Bias Point Influence on IMD. 9.5 Harmonic Loading Effects on IMD. 9.6 Appendix: Volterra Analysis Example. 9.7 References. 10 Power Combining. 10.1 Introduction. 10.2 Device Scaling Properties. 10.3 Power Budget. 10.4 Power Combiner Classification. 10.5 The T-junction Power Divider. 10.6 Wilkinson Combiner. 10.7 The Quadrature (90 ) Hybrid. 10.8 The 180 Hybrid (Ring Coupler or Rat-race). 10.9 Bus-bar Combiner. 10.10 Other Planar Combiners. 10.11 Corporate Combiners. 10.12 Resonating Planar Combiners. 10.13 Graceful Degradation. 10.14 Matching Properties of Combined PAs. 10.15 Unbalance Issue in Hybrid Combiners. 10.16 Appendix: Basic Properties of Three-port Networks. 10.17 References. 11 The Doherty Power Amplifier. 11.1 Introduction. 11.2 Doherty's Idea. 11.3 The Classical Doherty Configuration. 11.4 The 'AB-C' Doherty Amplifier Analysis. 11.5 Power Splitter Sizing. 11.6 Evaluation of the Gain in a Doherty Amplifier. 11.7 Design Example. 11.8 Advanced Solutions. 11.9 References. Index.

A Methodology for Realizing High Efficiency Class-J in a Linear and Broadband PA

Abstract: The design and implementation of a class-J mode RF power amplifier is described. The experimental results indicate the class-J mode's potential in achieving high efficiency across extensive bandwidth, while maintaining predistortable levels of linearity. A commercially available 10 W GaN (gallium nitride) high electron mobility transistor device was used in this investigation, together with a combination of high power waveform measurements, active harmonic load-pull and theoretical analysis of the class-J mode. Targeting a working bandwidth of 1.5-2.5 GHz an initial power amplifier (PA) design was based on basic class-J theory and computer-aided design simulation. This realized a 50% bandwidth with measured drain efficiency of 60%-70%. A second PA design iteration has realized near-rated output power of 39 dBm and improved efficiency beyond the original 2.5 GHz target, hence extending efficient PA operation across a bandwidth of 1.4-2.6 GHz, centered at 2 GHz. This second iteration made extensive use of active harmonic load-pull and waveform measurements, and incorporated a novel design methodology for achieving predistortable linearity. The class-J amplifier has been found to be more realizable than conventional class-AB modes, with a better compromise between power and efficiency tradeoffs over a substantial RF bandwidth.

On the Continuity of High Efficiency Modes in Linear RF Power Amplifiers

Abstract: A novel formulation for the voltage waveforms in high efficiency linear power amplifiers is described. This formulation demonstrates that a constant optimum efficiency and output power can be obtained over a continuum of solutions by utilizing appropriate harmonic reactive impedance terminations. A specific example is confirmed experimentally. This new formulation has some important implications for the possibility of realizing broadband >10% high efficiency linear RF power amplifiers.

Programmable antenna with programmable impedance matching and methods for use therewith

Abstract: A programmable antenna includes a fixed antenna element and a programmable antenna element that is tunable to one of a plurality of resonant frequencies in response to at least one antenna control signal. A programmable impedance matching network is tunable in response to at least one matching network control signal, to provide, for instance, a substantially constant load impedance. A control module generates the antenna control signals and the matching network control signals, in response to a frequency selection signal.

Transmitters for wireless power transmission

Abstract: Exemplary embodiments are directed to wireless power transfer. A wireless power transmitter includes a transmit antenna configured as a resonant tank including a loop inductor and an antenna capacitance. The transmitter further includes an amplifier configured to drive the transmit antenna and a matching circuit operably coupled between the transmit antenna and the amplifier. The transmitter also includes a capacitor integrating the antenna capacitance and a matching circuit capacitance.

Method and apparatus for pulsed plasma processing using a time resolved tuning scheme for rf power delivery

Abstract: Embodiments of the present invention generally provide methods and apparatus for pulsed plasma processing over a wide process window. In some embodiments, an apparatus may include an RF power supply having frequency tuning and a matching network coupled to the RF power supply that share a common sensor for reading reflected RF power reflected back to the RF power supply. In some embodiments, an apparatus may include an RF power supply having frequency tuning and a matching network coupled to the RF power supply that share a common sensor for reading reflected RF power reflected back to the RF power supply and a common controller for tuning each of the RF power supply and the matching network.

A Fully Integrated Dual-Mode Highly Linear 2.4 GHz CMOS Power Amplifier for 4G WiMax Applications

Abstract: In recent years, there has been tremendous interest in trying to implement the power amplifier in CMOS, due to its cost and integration benefits. Most of the high power (watt-level) CMOS PAs reported to date have not exhibited sufficient linearity required for next generation wireless standards. In this paper, we report a single-chip linear CMOS PA with sufficient power and linearity for emerging OFDM-based 4G WiMAX applications. This 90 nm 2.4 GHz CMOS linear power amplifier uses a two-stage transformer-based power combiner and produces a saturated output power of 30.1 dBm with 33% PAE and 28 dB small-signal gain. A novel bypass network is introduced to ensure stability without sacrificing gain. The choice of optimal biasing and capacitive compensation produces very flat AM-AM and AM-PM response up to high power. The PA has been tested with OFDM modulated signal and produces EVM better than -25 dB at 22.7 dBm average power. Graceful power back-off is demonstrated through turning off one of the stages, allowing low-power operation with enhanced efficiency.

A Wireless and Batteryless 10-Bit Implantable Blood Pressure Sensing Microsystem With Adaptive RF Powering for Real-Time Laboratory Mice Monitoring

Abstract: An implantable real-time blood pressure monitoring microsystem for laboratory mice has been demonstrated. The system achieves a 10-bit blood pressure sensing resolution and can wirelessly transmit the pressure information to an external unit. The implantable device is operated in a batteryless manner, powered by an external RF power source. The received RF power level can be sensed and wirelessly transmitted along with blood pressure signal for feedback control of the external RF power. The microsystem employs an instrumented silicone cuff, wrapped around a blood vessel with a diameter of approximately 200 ?m, for blood pressure monitoring. The cuff is filled by low-viscosity silicone oil with an immersed MEMS capacitive pressure sensor and integrated electronic system to detect a down-scaled vessel blood pressure waveform with a scaling factor of approximately 0.1. The integrated electronic system, consisting of a capacitance-to-voltage converter, an 11-bit ADC, an adaptive RF powering system, an oscillator-based 433 MHz FSK transmitter and digital control circuitry, is fabricated in a 1.5 ?m CMOS process and dissipates a power of 300 ?W. The packaged microsystem weighs 130 milligram and achieves a capacitive sensing resolution of 75 aF over 1 kHz bandwidth, equivalent to a pressure sensing resolution of 1 mmHg inside an animal vessel, with a dynamic range of 60 dB. Untethered laboratory animal in vivo evaluation demonstrates that the microsystem can capture real-time blood pressure information with a high fidelity under an adaptive RF powering and wireless data telemetry condition.

A RF to DC Voltage Conversion Model for Multi-Stage Rectifiers in UHF RFID Transponders

Abstract: This paper presents a RF to DC conversion model for multi-stage rectifiers in UHF RFID transponders. An equation relating the RF power available from the antenna to the DC output voltage produced by a multi-stage rectifier is presented. The proposed model includes effects of the nonlinear forward voltage drop in diodes and impedance matching conditions of the antenna to rectifier interface. Fundamental frequency impedance approximation is used to analyze the resistance of rectifying diodes; parasitic resistive loss components are also included in the analysis of rectifier input resistance. The closed form equation shows insights into design parameter tradeoffs, such as power available from the antenna, antenna radiation resistance, the number of diodes, DC load current, parasitic resistive loss components, diode and capacitor sizes, and frequency of operation. Therefore, it enables the optimization of rectifier parameters for impedance matching with a low-cost printed antenna and shunt tuning inductor, in order to improve the RF to DC conversion efficiency and the operational distance of UHF RFID transponders. Three diode doublers and three multistage rectifiers were fabricated in a 130 nm CMOS process with custom no-mask added Schottky diodes. Measurements of the test IC are in good agreement with the proposed model.

A 90-W Peak Power GaN Outphasing Amplifier With Optimum Input Signal Conditioning

Abstract: A 90-W peak-power 2.14-GHz improved GaN outphasing amplifier with 50.5% average efficiency for wideband code division multiple access (W-CDMA) signals is presented. Independent control of the branch amplifiers by two in-phase/quadrature modulators enables optimum outphasing and input power leveling, yielding significant improvements in gain, efficiency, and linearity. In deep-power backoff operation, the outphasing angle of the branch amplifiers is kept constant below a certain power level. This results in class-B operation for the very low output power levels, yielding less reactive loading of the output stages, and therefore, improved efficiency in power backoff operation compared to the classical outphasing amplifiers. Based on these principles, the optimum design parameters and input signal conditioning are discussed. The resulting theoretical maximum achievable average efficiency for W-CDMA signals is presented. Experimental results support the foregoing theory and show high efficiency over a large bandwidth, while meeting the linearity specifications using low-cost low-complexity memoryless pre-distortion. These properties make this amplifier concept an interesting candidate for future multiband base-station implementations.

Multi-mode power amplifiers

Abstract: Multi-mode power amplifiers that can support multiple radio technologies and/or multiple frequency bands are described. In one exemplary design, a first linear power amplifier supporting multiple radio technologies may be used to amplify a first RF input signal (e.g., for low band) and provide a first RF output signal. A second linear power amplifier also supporting the multiple radio technologies may be used to amplify a second RF input signal (e.g., for high band) and provide a second RF output signal. Each linear power amplifier may include multiple (e.g., three) chains coupled in parallel. Each chain may be selectable to amplify an RF input signal and provide an RF output signal for a respective range of output power levels. An RF input signal may be a phase modulated signal or a quadrature modulated signal and may be pre-distorted to account for non-linearity of the power amplifier.

A Fully Integrated 900-MHz Passive RFID Transponder Front End With Novel Zero-Threshold RF–DC Rectifier

Abstract: This paper presents a fully integrated CMOS analog front end for a passive 900-MHz radio-frequency identification (RFID) transponder. The power supply in this front end is generated from the received RF electromagnetic energy by using an RF-dc voltage rectifier. In order to improve the compatibility with standard CMOS technology, Schottky diodes in conventional RF-dc rectifiers are replaced by diode-connected MOS transistors with zero threshold. Meanwhile, theoretical analyses for the proposed rectifier are provided and verified by both simulation and measurement results. The design considerations of the pulsewidth-modulation (PWM) demodulator and the backscatter modulator in the front end are also discussed for low-power applications. The proposed front end is implemented in a 0.35-mum 2P4M CMOS technology. The whole chip occupies a die area of 490 times 780 mum2 and consumes only 2.1 muW in reading mode under a self-generated 1.5-V supply voltage. The measurement results show that the proposed rectifier can properly operate with a -14.7-dBm input RF power at a power conversion efficiency of 13.0%. In the proposed RFID applications, this sensitivity corresponds to 10.88-m communication distance at 4-W equivalent isotropically radiated power from a reader base station.

A Wideband Power Amplifier MMIC Utilizing GaN on SiC HEMT Technology

Abstract: The design and performance of a wideband power amplifier MMIC suitable for electronic warfare (EW) systems and other wide bandwidth applications is presented. The amplifier utilizes dual field plate 0.25- mum GaN on SiC device technology integrated into the three metal interconnect (3 MI) process flow. Experimental results for the MMIC at 30 V power supply operation demonstrate greater than 10 dB of small signal gain, 9 W to 15 W saturated output power and 20% to 38% peak power-added efficiency over a 1.5 GHz to 17 GHz bandwidth.

N-Way Doherty Distributed Power Amplifier with Power Tracking

Abstract: A power amplifier using N-way Doherty structure with adaptive bias supply power tracking for extending the efficiency region over the high peak-to-average power:ratio of the multiplexing modulated signals such as wideband code division multiple access and orthogonal frequency division multiplexing is disclosed. In an embodiment, present invention uses a dual-feed distributed structure to an N-way Doherty amplifier to improve the isolation between at least one main amplifier and at least one peaking amplifier and, and also to improve both gain and efficiency performance at high output back-off power. Hybrid couplers can be used at either or both of the input and output. In at least some implementations, circuit space is also conserved due to the integration of amplification, power splitting and combining.

Method and apparatus for antenna tuning

Abstract: A method for tuning a transmitter in order to improve impedance matching to an antenna or to intermediate radio frequency stages uses an error detector that senses a deviation of the amplitude or phase angle of a load current of a power amplifier driver or of a power amplifier. A controller calculates a correction and dynamically adjusts tunable transmitter parameters, which may include values of components in matching networks or bias voltages in the power amplifier or the power amplifier driver, so as to reduce the deviation and thereby improve the impedance matching. The load current of the power amplifier may alternatively be sensed by measuring the duty cycle of its switching mode power supply. A transmitter having a power amplifier and one or more tunable circuit elements incorporates an error detector that senses the amplitude or phase of a load current and a controller that adjusts one or more tunable parameters to reduce impedance mismatch. An integrated circuit device suitable for use in a transmitter includes a power amplifier driver circuit and a detector circuit capable of sensing a load current, and a controller circuit that can adjust tunable parameters either within or external to the integrated circuit. By eliminating directional couplers and integrating the detectors and power amplifier drivers, the size, complexity, and cost of wireless transceivers can be reduced, while efficiency and power consumption are improved through the dynamic adjustment of operating points and impedance matching.

Multi mode radio frequency transceiver front end circuit

Abstract: A front end circuit for coupling an antenna to a first radio frequency (RF) transceiver and a second RF transceiver is contemplated. The RF transceivers have a signal input, a signal output, a receive enable line and a transmit enable line. In addition to an antenna port, the front end circuit has a first power amplifier and a first low noise amplifier both coupled to first RF transceiver, and a second power amplifier and a second low noise amplifier both coupled to the second RF transceiver. The front end circuit includes a matching network that couples the power amplifiers and the low noise amplifiers, the various outputs and inputs thereof being common.

Optimized Envelope Tracking Operation of Doherty Power Amplifier for High Efficiency Over an Extended Dynamic Range

Abstract: This paper presents an optimized envelope tracking (ET) operation of a Doherty amplifier. Compared to the general ET/envelope elimination and restoration transmitter, it has an advantage of the extended dynamic range of 6 dB for the load modulation of a Doherty amplifier. Moreover, by modulating the supply voltage of the carrier amplifier, while that of the peaking amplifier is fixed, the supply modulator provides just half of the current for the same power amplifier output power. It results in a reduced chip size and the crest factor of the supply modulating signal is reduced by 6 dB, enhancing the efficiency of the supply modulator. The designed ET transmitter consisting of the Doherty amplifier and the supply modulator are fabricated in 2- mum HBT and 0.13-mum CMOS processes, respectively. It presents the efficiency improvement over the broad output power region. Especially at the 16-dB backed-off power level, more than 23% of power-added efficiency (PAE) is achieved. For WiBro application, it shows the PAE of 38.6% at an output power of 24.22 dBm with a gain of 24.62 dB. The error vector magnitude is 3.64%.

Asymmetric multilevel outphasing architecture for RF amplifiers

Abstract: A radio frequency (RF) circuit includes a power supply configured to generate a plurality of voltages, a plurality of power amplifiers, each having an RF output port and a power supply input port, a switch network having a plurality of input ports coupled to the power supply and a plurality of switch network output ports coupled to the power supply input ports of the plurality of power amplifiers, wherein the switch network is configured to output selected ones of the plurality of voltages from the plurality of switch network output ports, at least two of the switch network output port voltages capable of being different ones of the plurality of voltages, and an RF power combiner circuit having a plurality of input ports coupled to RF output ports of the plurality of power amplifiers and an output port at which is provided an output signal of the RF circuit.

An efficient, linear, broadband class-J-mode PA realised using RF waveform engineering

Abstract: Results from a fully implemented class-J RFPA (RF power amplifier) are presented for the first time, which demonstrate this mode's high efficiency potential across a substantial bandwidth. Using a commercially available 10W GaN (gallium nitride) HEMT device, and the high power waveform measurement and active load-pull capability at Cardiff University, class-J operation has demonstrated drain efficiencies between 60–70% across a 1.35–2.25GHz (50%) bandwidth whilst delivering 10 Watts of power at the 2dB compression point. Realisation of the design has confirmed that the optimum harmonic load impedances of the class-J amplifier are more practically realisable than conventional Class-AB modes, with better compromise between power and efficiency tradeoffs over a substantial RF bandwidth.

Power amplifier architectures

Abstract: Implementations and examples of power amplifier devices, systems and techniques for amplifying RF signals, including power amplifier systems based on Composite Right and Left Handed (CRLH) metamaterial (MTM) structures.

Thermally Actuated Latching RF MEMS Switch and Its Characteristics

Abstract: Here, a new thermally actuated latching wideband RF microelectromechanical systems (MEMS) switch is presented. The switch employs two thermal actuators connected to two thin metal arms which serve as signal lines of coplanar waveguide switch. The actuators pull the thin arms sequentially, and latch the switch. The switch can be actuated on and off by using either short voltage or current pulses. Using a dielectric bridge (nitride) as an interface between the actuators and the thin arms, the RF circuitry is separated from DC actuators, allowing wide-band operation. The switch demonstrates an excellent wideband RF performance with an insertion loss of better than 0.3 dB up to 20 GHz and better than 0.8 dB up to 40 GHz. The return loss and isolation of the switch is better than 20 dB for the entire frequency band. The switch also has a very satisfactory repeatability with better than 0.1-dB variation in insertion loss and less than 1-dB variation in return loss and isolation at 30-dB level up to 6000 times switching cycles. The switch has been also successfully tested for RF power handling capability up to 40 dBm. The proposed switch has very simple RF structure which makes it an ideal candidate to be integrated in the form of more complex circuitry. An application of the proposed switch for a band selection network which is used in multiband transceivers has been presented here.

A 2.4 GHz Fully Integrated Linear CMOS Power Amplifier With Discrete Power Control

Abstract: A fully integrated 2.4 GHz CMOS power amplifier (PA) in a standard 0.18 mum CMOS process is presented. Using a parallel-combining transformer (PCT) and gate bias adaptation, a discrete power control of the PA is achieved for enhancing the efficiency at power back-off. With a 3.3 V power supply, the PA has a peak drain efficiency of 33% at 31 dBm peak output power. By applying discrete power control, a reduction of 650 mA in current consumption can be achieved over the low output power range while satisfying the EVM requirements of WLAN 802.11g and WiMAX 802.16e signals.

RF power amplifiers with linearization

Abstract: Designs and techniques associated with power amplifiers for amplifying RF signals to provide variable power amplification and improved linearity in various RF amplification circuits, including power amplifiers operated under the power back-off conditions.

Rf power conversion circuits & methods, both for use in mobile devices

Abstract: This patent application teaches and describes radio frequency (RF) power conversion circuits and methods both for use in mobile devices (such as smart cards). Embodiments of the present invention include wireless personal ID cards or dongle including a fingerprint sensor. A fingerprint matching system can reside on cards. Power provided to the fingerprint sensor and on board processer(s) can be provided by a wireless signal provided to the card. The card can include an RF power conversion circuit configured to receive wireless RF energy and convert the wireless energy for powering electronics on the card. Other aspects, embodiments, and features of the present invention are also claimed and described.

Radio Frequency Power Control System

Abstract: A radio frequency (RF) system includes a control module that allocates M predetermined frequency intervals. The system also includes N RF sources that each applies first RF power to electrodes within a plasma chamber at frequencies within an assigned respective one of the M predetermined frequency intervals. The N RF sources also each respond to second RF power including feedback from the plasma chamber. The N RF sources each include a processing module that adjusts the first RF power based on the second RF power and the respective one of the M predetermined frequency intervals. M and N are integers greater than 1.

Demonstration of a 140-GHz 1-kW Confocal Gyro-Traveling-Wave Amplifier

Abstract: The theory, design, and experimental results of a wideband 140-GHz 1-kW pulsed gyro-traveling-wave amplifier (gyro-TWA) are presented. The gyro-TWA operates in the HE 06 mode of an overmoded quasi-optical waveguide using a gyrating electron beam. The electromagnetic theory, interaction theory, design processes, and experimental procedures are described in detail. At 37.7 kV and a 2.7-A beam current, the experiment has produced over 820 W of peak power with a -3-dB bandwidth of 0.8 GHz and a linear gain of 34 dB at 34.7 kV. In addition, the amplifier produced a -3-dB bandwidth of over 1.5 GHz (1.1%) with a peak power of 570 W from a 38.5-kV 2.5-A electron beam. The electron beam is estimated to have a pitch factor of 0.55-0.6, a radius of 1.9 mm, and a calculated perpendicular momentum spread of approximately 9%. The gyro-amplifier was nominally operated at a pulselength of 2 mus but was tested to amplify pulses as short as 4 ns with no noticeable pulse broadening. Internal reflections in the amplifier were identified using these short pulses by time-domain reflectometry. The demonstrated performance of this amplifier shows that it can be applied to dynamic nuclear polarization and electron paramagnetic resonance spectroscopy.

A 65 nm CMOS 30 dBm Class-E RF Power Amplifier With 60% PAE and 40% PAE at 16 dB Back-Off

Abstract: A 30 dBm single-ended class-E RF power amplifier (PA) is fabricated in a baseline 65 nm CMOS technology The PA is constructed as a cascode stage formed by a standard thin-oxide device and a dedicated novel high voltage extended-drain thick-oxide device Both devices are implemented without using additional masks or processing steps The proposed PA uses an innovative self-biasing technique to ensure high power-added efficiency (PAE) at both high output power (Pout) and power back-off levels At 2 GHz, the PA achieves a PAE of 60% at a Pout of 30 dBm and a PAE of 40% at 16 dB back-off Stress tests indicate the reliability of both the novel high voltage device and the design

Power amplifier with switched output matching for multi-mode operation

Abstract: Exemplary embodiments are directed to a transmitter with a power amplifier and a switched output matching circuit implementing a plurality of output paths for a plurality of operating modes is described. The power amplifier receives an input RF signal and provides an amplified RF signal. An output matching network performs impedance transformation from low impedance at the power amplifier output to higher impedance at the matching network output. The plurality of output paths are coupled to the output matching network. Each output path provides a different target output impedance for the power amplifier and routes the amplified RF signal from the power amplifier to an antenna when that output path is selected. Each output path may include a matching network coupled in series with a switch. The matching network provides the target output impedance for the power amplifier when the output path is selected. The switch couples or decouples the output path to/from the power amplifier.

Single-Chip Frequency Multiplier Chains for Millimeter-Wave Signal Generation

Abstract: Two single-chip frequency multiplier chains targeting 118 and 183 GHz output frequencies are presented. The chips are fabricated in a 0.1 ?m GaAs metamorphic high electron-mobility transistor process. The D-band frequency doubler chain covers 110 to 130 GHz with peak output power of 5 dBm. The chip requires 2 dBm input power and consumes only 65 mW of dc power. The signal at the fundamental frequency is suppressed more than 25 dB compared to the desired output signal over the band of interest. The G-band frequency sextupler (×6) chain covers 155 to 195 GHz with 0 dBm peak output power and requires 6.5 dBm input power and 92.5 mW dc power. The input signal to the multiplier chain can be reduced to 4 dBm while the output power drops only by 0.5 dB. The unwanted harmonics are suppressed more than 30 dB compared to the desired signal. An additional 183 GHz power amplifier is presented to be used after the ×6 frequency multiplier chain if higher output power is required. The amplifier delivers 5 dBm output power with a small-signal gain of 9 dB from 155 to 195 GHz. The impedance matching networks are realized using coupled transmission lines which is shown to be a scalable and straightforward structure to use in amplifier design. Microstrip transmission lines are used in all the designs.

A 2.4-GHz 24-dBm SOI CMOS Power Amplifier With Fully Integrated Reconfigurable Output Matching Network

Abstract: In this paper, the potential of load adaptation for enhanced backoff efficiency in RF power amplifiers (PAs) has been investigated through a 0.13-mum silicon-on-insulator (SOI) CMOS fabrication technology. The RF power performance of the adopted SOI CMOS process has been preliminarily characterized by on-wafer load-pull measurements on a custom unit power transistor. A 2.4-GHz 24-dBm 2-V SOI CMOS PA with fully integrated reconfigurable output matching network has then been designed and experimentally characterized. A significant efficiency improvement of up to 34% has been achieved through load adaptation, peak efficiency being as high as 65%. Linear operation has also been demonstrated under two-tone excitation, as a 16-dBm output power has been attained while complying with a - 40-dBc third-order intermodulation distortion specification.