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Showing papers on "RF power amplifier published in 2011"


Journal ArticleDOI
TL;DR: A simple rectenna design ex ample containing a 2 × 2 planar antenna array will be presented to demonstrate such RF power harvesting technology and the parameter, Rectenna Topology Indicator (RTI), is introduced for performance comparison.
Abstract: RF power harvesting enables controllable and simultaneous wireless power delivery to many RF devices. Devices built with this unique technology can be sealed, embedded within structures, or made mobile, thus eliminating additional service for a battery. A key component of this technology is the "rectenna," which is composed of antennas and rectifying circuitry to convert RF energy into dc power. Typically, multiple rectenna elements are used to generate the dc power for reliable device operation. This letter compares two different rectenna architectures for maximum RF-to-dc power conversion efficiency. A simple rectenna design ex ample containing a 2 × 2 planar antenna array will be presented to demonstrate such RF power harvesting technology. The parameter, Rectenna Topology Indicator (RTI), is introduced for performance comparison.

321 citations


Journal ArticleDOI
TL;DR: A fully integrated switched-capacitor power amplifier that operates on the envelope of a nonconstant envelope modulated signal as an RF-DAC in an EER/Polar architecture to amplify the signal efficiently.
Abstract: A fully integrated switched-capacitor power amplifier (SCPA) utilizes switched-capacitor techniques in an EER/Polar architecture. It operates on the envelope of a nonconstant envelope modulated signal as an RF-DAC in order to amplify the signal efficiently. The measured maximum output power and PAE are 25.2 dBm and 45%, respectively. When amplifying an 802.11g 64-QAM orthogonal frequency-division multiplexing (OFDM) signal, the measured error vector magnitude is 2.6% and the average output power and power-added efficiencies are 17.7 dBm and 27%, respectively.

207 citations


Patent
Yael Maguire1
31 May 2011
TL;DR: In this article, a wireless device consisting of an RF interface, logic circuitry, power circuitry, an impedance matching transformer, and a transducer is configured to produce an audio signal based on the output analog signal.
Abstract: A wireless device includes an RF interface, logic circuitry, power circuitry, an impedance matching transformer, and a transducer. The RF interface is configured to receive an RF signal and provide an output data signal derived from the RF signal. The logic circuitry is configured to receive the output data signal and provide an output analog signal. The power circuitry is coupled to the RF interface and configured to provide DC operating power derived from the RF signal to the RF interface and the logic circuitry. The impedance matching transformer has an input coupled to the logic circuitry and an output. The transducer is coupled to the output of the impedance matching transformer and is configured to produce an audio signal based on the output analog signal.

190 citations


Journal ArticleDOI
TL;DR: A novel two hidden layers artificial neural network (2HLANN) model is proposed to predict the dynamic nonlinear behavior of wideband RF power amplifiers (PAs) and its accuracy in predicting its output spectrum, dynamic AM/AM and AM/PM characteristics, and in minimizing the normalized mean square error is validated.
Abstract: In this paper, a novel two hidden layers artificial neural network (2HLANN) model is proposed to predict the dynamic nonlinear behavior of wideband RF power amplifiers (PAs). Starting with a generic low-pass equivalent circuit of the PA, several circuit transformations are applied in order to build an appropriate artificial neural network structure and improve the modeling accuracy. This approach culminates in the development of a real-valued and feed-forward 2HLANN-based model. The parameters (number of neurons, memory depth, etc.) of the proposed model and the back propagation learning algorithm (learning rate, momentum term, etc.) used for its training were carefully studied and thoughtfully chosen to ensure the generality of the constructed model. The validation of the proposed models in mimicking the behavior of a 250-W Doherty amplifier driven with a 20-MHz bandwidth signal is carried out in terms of its accuracy in predicting its output spectrum, dynamic AM/AM and AM/PM characteristics, and in minimizing the normalized mean square error. In addition, the linearization of the Doherty PA using the 2HLANN enabled attaining an output power of up to 46.5 dBm and an average efficiency of up to 40% coupled with an adjacent channel power ratio higher than 50 dBc.

170 citations


Journal ArticleDOI
TL;DR: In this article, an extended continuous class-F mode RF power amplifier (PA) is presented for the first time and experimental validation of this novel PA mode demonstrates a new design space over a wide band of frequencies.
Abstract: The extended continuous class-F mode RF power amplifier (PA) is presented for the first time. The introduction and experimental validation of this novel PA mode demonstrates a new design space over a wide band of frequencies. This paper will show that high output power and drain efficiency, equivalent to the class-F mode, can be maintained by varying the reactive components of fundamental and second harmonic impedances in accordance with the new formulation of the voltage waveform. Additionally it will be shown that, by varying both phase and magnitude of the fundamental and second harmonic impedances, a yet wider design space can be achieved, where the efficiency is maintained at a level greater than a certain target value. For the validation of this new theory, an experimental investigation was carried out on GaAs pseudomorphic HEMT devices and demonstrates that high output power and drain efficiency between 75%-83% can be achieved over a wide range of fundamental and second harmonic loads.

168 citations


Journal ArticleDOI
TL;DR: In this article, an optimized envelope shaping function for the envelope tracking power amplifier (ET PA) and its implementation is described. And the proposed shaping function, which is sweet spot tracking with crest factor reduction, improves the efficiency and output power of the power amplifier.
Abstract: This paper describes the analysis of an optimized envelope shaping function for the envelope tracking power amplifier (ET PA) and its implementation. The proposed shaping function, which is sweet spot tracking with crest factor reduction, improves the efficiency and output power of the power amplifier (PA), as well as its linearity. For an accurate simulation of the supply modulator, an equivalent model of the PA under the envelope shaping is suggested. To achieve high efficiency and wide bandwidth, the CMOS supply modulator has a hybrid structure of a switching amplifier and a linear amplifier. The fabricated ET PA delivers higher efficiency and better linearity than standalone PA for the wideband code division multiple access and long-term evolution signals.

135 citations


Journal ArticleDOI
TL;DR: In this paper, the influence of various factors on radio frequency (RF) power distribution in dry food materials, placed in a 12 kW, 27.12 MHz parallel plate RF system, using a validated finite element computer model, was investigated.

132 citations


Proceedings ArticleDOI
Andrew K. Brown1, Ken Brown1, James C. Chen1, Kiuchul Hwang1, Nick Kolias1, Rick Scott 
05 Jun 2011
TL;DR: In this paper, a 150 nm T-gate GaN HEMT with an output power exceeding 300mW and a peak PAE (power added efficiency) of 37% is presented.
Abstract: An advanced high power, high frequency GaN semiconductor process has made possible the design and fabrication of W-band power amplifier MMICs with unprecedented performance. The key enabling semiconductor technology is a 150 nm T-gate GaN HEMT with an output power exceeding 300mW and a peak PAE (power added efficiency) of 37%. With this process, W-band power amplifier MMICs have been designed and fabricated that demonstrate output powers of 1.7 watts, power added efficiencies greater than 20%, and small signal gains of 21 dB. In addition, the compactness of these MMIC designs have allowed for MMIC power densities (MMIC output power relative to MMIC area) exceeding 1/2 watt/mm2.

127 citations


Patent
S. M. Reza Sadjadi1, Zhisong Huang1, Jose Tong Sam1, Eric Lenz1, Rajinder Dhindsa1 
22 Jul 2011
TL;DR: In this article, a gas distribution system for providing a first gas and a second gas is connected to the plasma chamber, wherein the gas supply system can substantially replace one gas in the plasma zone with the other gas within a period of less than 1 s.
Abstract: A plasma chamber with a plasma confinement zone with an electrode is provided. A gas distribution system for providing a first gas and a second gas is connected to the plasma chamber, wherein the gas distribution system can substantially replace one gas in the plasma zone with the other gas within a period of less than 1 s. A first frequency tuned RF power source for providing power to the electrode in a first frequency range is electrically connected to the at least one electrode wherein the first frequency tuned RF power source is able to minimize a reflected RF power. A second frequency tuned RF power source for providing power to the plasma chamber in a second frequency range outside of the first frequency range wherein the second frequency tuned RF power source is able to minimize a reflected RF power.

119 citations


Proceedings ArticleDOI
05 Jun 2011
TL;DR: In this article, a novel, highly efficient and broadband RF power amplifier (PA) operating in "continuous class-F" mode has been realized for the first time, achieving an average drain efficiency of 74% and average output power of 10.5W for an octave bandwidth between 0.55GHz and 1.1GHz.
Abstract: A novel, highly efficient and broadband RF power amplifier (PA) operating in “continuous class-F” mode has been realized for first time. The introduction and experimental verification of this new PA mode demonstrates that it is possible to maintain expected output performance, both in terms of efficiency and power, over a very wide bandwidth. Using recently established continuous class-F theory, an output matching network was designed to terminate the first three harmonic impedances. This resulted in a PA delivering an average drain efficiency of 74% and average output power of 10.5W for an octave bandwidth between 0.55GHz and 1.1GHz. A commercially available 10W GaN HEMT transistor has been used for the PA design and realization.

109 citations


Patent
21 Nov 2011
TL;DR: In this paper, the authors present a wafer processing system for semiconductor manufacturing, which consists of a top electrode, a bottom electrode, and a switch, which can be operated in either a first position or a second position.
Abstract: Methods, systems, and computer programs are presented for semiconductor manufacturing are provided. One wafer processing apparatus includes: a top electrode; a bottom electrode; a first radio frequency (RF) power source; a second RF power source; a third RF power source; a fourth RF power source; and a switch. The first, second, and third power sources are coupled to the bottom electrode. Further, the switch is operable to be in one of a first position or a second position, where the first position causes the top electrode to be connected to ground, and the second position causes the top electrode to be connected to the fourth RF power source.

Journal ArticleDOI
TL;DR: In this paper, the authors proposed a S-shaped switching waveform which offers an improved tradeoff between high-frequency EMI generation and switching losses by considering the higher order time derivatives of voltage and current transitions in power semiconductor devices.
Abstract: Consideration of the higher order time derivatives of voltage and current transitions in power semiconductor devices enables the specification of “S-shaped” switching waveforms which offer an improved tradeoff between high-frequency EMI generation and switching losses. In comparison with the widely used first-order derivative trapezoidal switching waveform approximation, Fourier analysis of the proposed “S-shaped” waveform shows that it exhibits a 20 dB/dec steeper spectral gradient at high frequencies, resulting in a 20 dB greater reduction in high-frequency spectral content per decade increase in rise time. Numerical analysis of the proposed waveform shows that both peak and total RF power, employed as indicative EMI metrics, are reduced significantly with no increase in overall switching time. Experimental investigation of the effect of introducing a frequency-selective EMI transmission path shows that the overall trends in the relationships between time-domain waveform parameters and high-frequency spectral content are maintained, while the values of the waveform timing parameters which minimize the two EMI metrics are changed.

Proceedings ArticleDOI
05 Jun 2011
TL;DR: In this paper, a class-E Chireix outphasing power amplifier is presented that enables high efficiency across a wide power back-off range and RF bandwidth, while meeting the ACLR specifications.
Abstract: A class-E Chireix outphasing power amplifier is presented that enables high efficiency across a wide power back-off range and RF bandwidth. In this design the Chireix compensation elements and class-E loading conditions are provided by an asymmetric coupled-line power combiner. The class-E operated GaN HEMT switches are driven by high-speed, high-voltage CMOS drivers, implemented in a standard 65nm process technology. The proposed concept demonstrates 51.6% system average power efficiency and 65.1% average drain efficiency for a 7.5dB PAR WCDMA signal at 1.95GHz, while meeting the ACLR specifications. Moreover, the PA demonstrated more than 60% drain efficiency across a 6dB power back-off range and up to 19W peak power between 1800–2050MHz.

Patent
19 Apr 2011
TL;DR: In this article, a pseudo-envelope follower power management system was used to manage the power delivered to a linear RF power amplifier, which is used to control a linear power amplifier.
Abstract: Embodiments disclosed in the detailed description relate to a pseudo-envelope follower power management system used to manage the power delivered to a linear RF power amplifier.

Journal ArticleDOI
TL;DR: In this paper, the design and characterization of single-chip 220 GHz heterodyne receiver and transmitter (RX) and TX) monolithic microwave integrated circuits with integrated antennas fabricated in 0.1-μm GaAs metamorphic high electron mobility transistor technology is presented.
Abstract: This paper presents the design and characterization of single-chip 220-GHz heterodyne receiver (RX) and transmitter (TX) monolithic microwave integrated circuits (MMICs) with integrated antennas fabricated in 0.1- μm GaAs metamorphic high electron-mobility transistor technology. The MMIC receiver consists of a modified square-slot antenna, a three-stage low-noise amplifier, and a sub-harmonically pumped resistive mixer with on-chip local oscillator frequency multiplication chain. The transmitter chip is the dual of the receiver chip by inverting the direction of the RF amplifier. The chips are mounted on 5-mm silicon lenses in order to interface the antenna to the free space and are packaged into two separate modules.

Patent
16 Dec 2011
TL;DR: In this article, a power amplifier system includes a plurality of power amplifiers for amplifying an input radio frequency (RF) signal to generate an output RF signal. And the power amplifier is configured to be individually switchable between an enabled state and a disabled state.
Abstract: Apparatus and methods for oscillation suppression are disclosed. In one embodiment, a power amplifier system includes a plurality of power amplifiers for amplifying an input radio frequency (RF) signal to generate an output RF signal. The plurality of power amplifiers include a first power amplifier, a second power amplifier, and a third power amplifier, each of which are configured to be individually switchable between an enabled state and a disabled state so as to control a power amplification of the power amplifier system. A first capacitor is electrically connected between the outputs of the first and second power amplifiers, and a second capacitor is electrically connected between the outputs of the second and third power amplifiers. The first and second capacitors are configured to allow signals generated using the first, second, and third power amplifiers to combine constructively to generate the output RF signal.

Patent
26 May 2011
TL;DR: In this article, the output of the driver stage amplifier is supplied to the inputs of the first and second RF amplifiers, and the third external power supply voltage is supplied by the DC voltage converter.
Abstract: An RF power amplifier device includes a driver stage amplifier, a first RF amplifier, a second RF amplifier and a DC voltage converter operated by first, second and third external power supply voltages. The output of the driver stage amplifier is supplied to the inputs of the first and second RF amplifiers. An effective device size of the first RF amplifier is set to a device size larger than that of the second RF amplifier. The third external power supply voltage is supplied to the DC voltage converter, so that the DC voltage converter generates a fourth operating power supply voltage corresponding to a low voltage and supplies it to an output terminal of the second RF amplifier. An output terminal of the first RF amplifier can be supplied with the second external power supply voltage without via the DC voltage converter.

Patent
09 Dec 2011
TL;DR: In this article, a pseudo-envelope follower power management system including a parallel amplifier and a switch mode power supply converter cooperatively coupled to generate a power supply voltage at a power input output coupled to a linear RF power amplifier is described.
Abstract: Embodiments disclosed in the detailed description relate to a pseudo-envelope follower power management system including a parallel amplifier and a switch mode power supply converter cooperatively coupled to generate a power supply voltage at a power supply output coupled to a linear RF power amplifier. The parallel amplifier output is in communication with the power amplifier supply output. The parallel amplifier governs operation of the switch mode power supply converter and regulates the power amplifier supply voltage base on a V RAMP signal. The parallel amplifier circuit includes an open loop high frequency compensation assist circuit that generates a high frequency ripple compensation current based on an estimate of the high frequency ripple currents contained in a ripple current of the power inductor. The high frequency ripple compensation current is injected into the parallel amplifier circuit output to cancel out high frequency ripple currents at the power amplifier supply output.

Journal ArticleDOI
TL;DR: In this article, a dual-switch envelope amplifier for wideband high-efficiency envelope tracking (ET) base-station power amplifiers (PAs) is proposed, which comprises two switching buck converters to provide the high-power ET signal to the RF stage and a wideband linear stage to maintain the envelope signal accuracy.
Abstract: This paper presents a novel digitally assisted dual-switch envelope amplifier used for wideband high-efficiency envelope-tracking (ET) base-station power amplifiers (PAs). The proposed envelope amplifier comprises two switching buck converters to provide the high-power ET signal to the RF stage and a wideband linear stage to maintain the envelope signal accuracy. The control technique utilizes digital signal processing in conjunction with analog hysteretic feedback to separately control two high-efficiency switchers and thus successfully reduces power consumption of the linear stage, especially for applications requiring high peak-to-average ratio (PAPR) signals. The overall ET system was demonstrated using GaAs high-voltage HBT PAs. For a variety of signals ranging from 6.6- to 9.6-dB PAPR and up to 10-MHz RF bandwidth, the overall system power-added efficiency reached 50%-60%, with a normalized root-mean-square error below 1% and the first adjacent channel leakage power ratio of -55 dBc after digital predistortion with memory mitigation, at an average output power above 20 W and 10-dB gain.

Journal ArticleDOI
TL;DR: In this paper, an improved large-signal modeling approach of GaN on Si devices for RF high-power applications is presented, which accounts for the parasitic buffer loading effect under microwave RF operation in addition to the self-heating and trap ping effects associated with high power operation conditions.
Abstract: An improved large-signal modeling approach of GaN on Si devices for RF high-power applications is presented. This approach accounts for the parasitic buffer loading effect under microwave RF operation in addition to the self-heating and trap ping effects associated with high-power operation conditions. A hybrid optimization (genetic and Simplex) technique based procedure is used to determine the optimal values of the model extrinsic elements. These elements are de-embedded from multibias S-parameter measurements to find the intrinsic part of the device, which is then used to construct a nonlinear current-charge (represented by nonlinear charge and current sources) based model for the gate current of the device. Pulsed and static dc IV characteristics are used for modeling of the drain current. The validity of the developed modeling approach is verified by comparing simulated large-signal single- and two-tone simulation with measured data of a 2-mm (10 × 200 μm) GaN HEMT on Si substrate. The model has been employed for designing a class-AB power amplifier. Very good agreement between the amplifier simulation and measurement shows the validity of the model.

Journal ArticleDOI
TL;DR: In this paper, a pseudodifferential distributed power amplifier in a 0.13-μm SiGe BiCMOS process is proposed to mitigate the large loaded transmission line loss due to bipolar base resistance, emitter degeneration, and an optimal small-signal design point is selected for maximum gain-bandwidth product.
Abstract: This paper presents the design, analysis, and measurement of a pseudodifferential distributed power amplifier in a 0.13-μm SiGe BiCMOS process. To mitigate the large loaded transmission line loss due to bipolar base resistance, emitter degeneration is used and an optimal small-signal design point is selected for maximum gain-bandwidth product. To enhance the efficiency of distributed amplifiers (DAs), a stage-scaling technique is proposed to utilize more voltage swing while reducing the total current consumption. The output power and efficiency of the amplifier are evaluated as a function of two scaling coefficients. The fabricated distributed power amplifier achieves a small-signal gain of 10 dB and a 3-dB bandwidth of 110 GHz. The measured midband saturated output power is 17.5 dBm with a peak power-added efficiency (PAE) of 13.2% and the 3-dB output power bandwidth is greater than 77 GHz. The amplifier consumes 119 mA from a 3-V supply and occupies an area of 2.08 mm × 1.05 mm. Compared to a uniform nonscaled DA fabricated in the same process, the stage-scaled amplifier achieves the same output power with higher collector efficiency and PAE over the entire measured frequency range.

Journal ArticleDOI
TL;DR: An energy harvesting system that converts RF power to DC power to supply wireless sensor nodes, active transmitters or related systems with a power consumption up to the mW range is presented.
Abstract: State-of-the-art wireless sensor nodes are mostly supplied by batteries. Such systems have the disadvantage that they are not maintenance free because of the limited lifetime of batteries. Instead, wireless sensor nodes or related devices can be remotely powered. To increase the operating range and applicability of these remotely powered devices an electro-magnetic energy harvester iPs developed in a 0.13 μ m low cost CMOS technology. This paper presents an energy harvesting system that converts RF power to DC power to supply wireless sensor nodes, active transmitters or related systems with a power consumption up to the mW range. This energy harvesting system is used to power a wireless sensor node from the 900 MHz RF field. The wireless sensor node includes an on-chip temperature sensor and a bulk acoustic wave (BAW) based transmitter. The BAW resonator reduces the startup time of the transmitter to about 2 μs which reduces the amount of energy needed in one transmission cycle. The maximum output power of the transmitter is 5.4 dBm. The chip contains an ultra-low-power control unit and consumes only 190 nW in idle mode. The required input power is -19.7 dBm.

Patent
Sabah Khesbak1
12 Dec 2011
TL;DR: In this paper, a power amplifier system includes a plurality of power amplifiers and an envelope tracking module for generating a supply voltage for the power amplifier, and the switch is configured to electrically float an end of the decoupling capacitor when the first power amplifier is disabled so as to reduce capacitive loading of the envelope tracker.
Abstract: Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a power amplifier system includes a plurality of power amplifiers and an envelope tracking module for generating a supply voltage for the power amplifiers. The power amplifier system further includes a switch and a decoupling capacitor operatively associated with a first power amplifier of the system. The switch is configured to electrically float an end of the decoupling capacitor when the first power amplifier is disabled so as to reduce capacitive loading of the envelope tracker and to operate as a dampening resistor when the power amplifier is enabled so as to improve the stability of the system.

Patent
28 Nov 2011
TL;DR: In this paper, a centralized software module (CSWM) collects and analyzes values from one or more wireless devices of the wireless field device mesh network representing received RF power measurements on an assigned RF channel and values representing corresponding times of the received power measurements.
Abstract: A system for measuring and analyzing radio frequency power proximate and within a wireless field device mesh network. A centralized software module (CSWM) collects and analyzes values from one or more wireless devices of the wireless field device mesh network representing received RF power measurements on an assigned RF channel and values representing corresponding times of the received RF power measurements. Each wireless device measures received RF power on the assigned RF channel at times other than during reception of a signal resulting in transmission by the wireless device of either an acknowledgment signal or a non-acknowledgement signal. Values representing the received RF power measurements and the corresponding times of the received RF power measurements are determined from the stored received RF power measurements and corresponding times and then discarded. These values are stored within the wireless device until successfully reported. A network manager coordinates communication between the wireless devices and synchronizes the corresponding times of received RF power measurement throughout the wireless field device mesh network.

Journal ArticleDOI
TL;DR: In this article, a wideband transformer-coupled CMOS power amplifier (PA) is presented, which provides a saturated output power of 21.5 dBm with the power-added efficiency (PAE) of 20.3%, and the output 1-dB gain-compressed power (P1 dB) is 20.2 dBm.
Abstract: This paper presents a wideband transformer-coupled CMOS power amplifier (PA). On-chip transmission-line transformers are used as key components of matching networks at output, input, and interstage. The wideband on-chip transformer is harnessed without any additional inductive devices so that a wideband power characteristic can be achieved. The PA is fabricated using a 0.18-μm CMOS process. It provides a saturated output power of 21.5 dBm with the power-added efficiency (PAE) of 20.3%, and the output 1-dB gain-compressed power (P1 dB) is 20.2 dBm with the PAE of 14.8% at 9.5 GHz, respectively. The small-signal gain is 25.3 dB and the 3-dB bandwidth is 6.5 GHz (6.5-13 GHz). The die area is 1.34 mm × 0.47 mm. Among the reported X/Ku-band CMOS PAs, this amplifier achieves the highest figure of merit, and also shows suitable performances for phased-array systems.

Journal ArticleDOI
Andrei Grebennikov1
TL;DR: In this paper, the theoretical analysis of a single-ended Class E/F n mode with explicit derivation of the idealized optimum voltage and current waveforms and load-network parameters with their verification by time and frequency-domain simulations for a particular case of Class e/F 3 mode with a 50% duty cycle is presented.
Abstract: The theoretical analysis of a single-ended Class E/F n mode with explicit derivation of the idealized optimum voltage and current waveforms and load-network parameters with their verification by time- and frequency-domain simulations for a particular case of Class E/F3 mode with a 50% duty cycle are presented. The ideal collector voltage and current waveforms for driving signals with 50% duty cycles demonstrate a possibility of 100% efficiency without overlapping between each other. Two examples of the Class E/F3 GaN HEMT power amplifiers, one with lumped elements at operating frequency of 430 MHz and the other with transmission-line elements at operating frequency of 2.14 GHz, are described and analyzed based on the simulation results. The test board with implemented transmission-line Class E/F3 GaN HEMT power amplifier has been measured and high-performance results with the output power of 40 dBm, drain efficiency of 76%, power-added efficiency of 73.1%, and power gain of 14.3 dB were achieved at operating frequency of 2.14 GHz.

Patent
23 May 2011
TL;DR: In this paper, a system and a method for the activation of multiple non-linear power amplifiers to amplify a second signal based on the current power level of an input signal is presented.
Abstract: A system and a method are provided. The system may include (A) a measurement circuit arranged to measure at least a current power level of the input signal; (B) multiple non-linear power amplifiers; wherein different non-linear power amplifiers are associated with different power ranges; (C) a control circuit arranged to: (a) select at least one selected non-linear power amplifier to be used to amplify a second signal based on at least: (i) the current power level of an input signal; (ii) an association between the different power ranges and the different non-linear power amplifiers; (iii) an identity of at least one previously selected non-linear power amplifier; and (b) assist in an activation of the at least one selected non-linear power amplifier; and (D) a signal processing module, configured to process the input signal to provide the second signal such as to at least partially compensate for a non-linearity of each of the at least one selected non-linear power amplifier.

Journal ArticleDOI
TL;DR: A low-power transceiver for medical implant communication service is presented, which consists of three subsystems, which perform wake-up signal reception, data-link binary frequency-shift keying (BFSK) reception, and transmission, respectively.
Abstract: A low-power transceiver for medical implant communication service is presented. The device consists of three subsystems, which perform wake-up signal reception, data-link binary frequency-shift keying (BFSK) reception, and transmission, respectively. A common antenna interface is reused in the three subsystems, reducing circuit complexity and number of external components. Super-regenerative architecture is used for wake-up reception, and gm-boosted common-gate stages are used to optimize receiver (RX) performance with low power consumption. The transmitter employs an all-digital frequency-locked loop to directly drive a class AB power amplifier. The transmitter can alternatively use an injection-locked power oscillator for lower bit rates and power consumption. The integrated circuit is designed and fabricated on a 0.18-μm CMOS process. The wake-up RX achieves a -80-dBm sensitivity for a 50-kb/s signal and a 280-μW dissipation. The BFSK RX achieves a -97-dBm sensitivity for a 75-kb/s signal and a 2-mW power consumption. Finally, the transmitter achieves an output power of -5 dBm for a power consumption of 2.9 mW.

Journal ArticleDOI
TL;DR: In this article, a multistage noise-shaping-technique-controlled multilevel power converter is proposed to perform as the envelope amplifier in an ET transmitter, which can reproduce any envelope signals with the maximum spectrum component of 300 kHz and give maximum instantaneous power of 20 W.
Abstract: Envelope tracking (ET) is one of the most promising transmitter architectures proposed to increase the efficiency of modern wireless communication system. An ET transmitter consists of a linear RF power amplifier and a high-efficiency envelope amplifier, which is always a switched-mode power converter. The envelope amplifier provides a varying drain (collector) bias voltage, which tracks the envelope of the RF input signal, for the RF power amplifier. Thus, the RF power amplifier keeps working in high-efficiency region of most of the time. Therefore, the overall efficiency of the transmitter is increased. This paper proposes a multistage noise-shaping-technique-controlled multilevel power converter to perform as the envelope amplifier in an ET transmitter. Experimental results show that the proposed power converter can reproduce any envelope signals with the maximum spectrum component of 300 kHz and give maximum instantaneous power of 20 W. Compared with pulsewidth modulation, the noise-shaping technique can shape the ripple into noise and the noise will be attenuated by the low-pass filter, which results a better performance, while maintaining high efficiency as well.

Proceedings ArticleDOI
Andrei Grebennikov1
05 Jun 2011
TL;DR: In this article, a four-stage Doherty power amplifier architecture was proposed and fabricated for practical implementation in base station applications for modern communication standards, where each power amplifier is based on a 25-W Cree GaN HEMT device with the transmission-line load network corresponding to an inverse Class F mode approximation.
Abstract: In this paper, a novel high-efficiency four-stage Doherty power amplifier architecture convenient for practical implementation in base station applications for modern communication standards has been proposed and fabricated In practical verification, each power amplifier is based on a 25-W Cree GaN HEMT device with the transmission-line load network corresponding to an inverse Class F mode approximation In a CW operation mode with the same bias voltage for each transistor, an output power of 50 dBm with a drain efficiency of 77% was achieved at a supply voltage of 34 V In a single-carrier WCDMA operation mode with PAR of 65 dB, a high drain efficiency of 61% was achieved at an average output power of 43 dBm, with ACLR 1 measured at −31 dBc level