Rise time

About: Rise time is a research topic. Over the lifetime, 4748 publications have been published within this topic receiving 47512 citations.

Design and Performance of a Resistive-Divider System for Measuring Fast HV Impulse

Abstract: A measuring system based on a resistive divider using a copper sulfate (CuSO4 solution) has been developed to measure high-voltage impulses with rise times of several tens of nanoseconds. The response and temperature characteristics of the resistive divider have been studied. The divider has excellent response characteristics (<; 1-ns theoretical rise time) and good immunity from interference from a Marx generator and spark-gap switch. Stray parameters of the resistive divider are theoretically calculated, and their influences on the square-wave response are studied by Alternative Transients Program/ ElectroMagnetic Transient in DC System simulations. The measuring system is shielded using coaxial construction techniques. The experimental results show that it is capable of maintaining the output impulse of the Marx generator with rise time of 13 ns and amplitude of 170 kV.

Modeling and measurement of bistable semiconductor lasers

Abstract: A theoretical model of bistable semiconductor lasers (BSL) under optical triggering is proposed, which takes into account the amplification and absorption processes in the laser structure. It has been found that the main factor limiting the highspeed operation of BSLs is the carrier lifetime in the absorber. A novel solution has been proposed consisting of bombarding the absorber with a proton beam. This paper presents the first experimental and theoretical results on the transition time and the turn-on jitter of such a BSL with optical triggering. Measurements on bulk and multiple quantum well BSLs revealed the dependence law of transition time and turn-on jitter on the injection currents. It has been found that, for a constant current in one active section, the rise time decreases but the fall time increases with injection current in the other section. An optimal current value can then be found to minimize the overall transition time. The measured turn-on jitter and relaxation oscillation period decrease with increasing injection current, in good agreement with theoretical predictions. 2.5 Gb/s optical triggering with a bit-error-rate less than 10/sup -9/ is demonstrated, for the first time, by using such a BSL without electrical reset. >

Reference-Feedforward Power-Synchronization Control

Abstract: In this letter, an enhancement of power-synchronization control is proposed, whereby pole–zero cancellation in the closed-loop system is achieved. An effect thereof is that step-response ringing and overshoot are eliminated. For strong grids, the closed-loop bandwidth increases, allowing a shorter step-response rise time.

Thermo-optic switch having fast rise-time

Abstract: A thermo-optic switch is operated in a novel near-impulse mode in which the drive pulse width is shorter than twice the diffusion time of the switch. The drive pulse width is less than the rise time of the steady-state optical response and also less than the rise time of the deflection efficiency response to the applied drive pulse. The drive pulse can further include a sustaining segment following the initial short pulse segment, if it is desired to maintain the switch in an ON state for a longer period of time. A number of additional techniques are described for further reducing the response time of the switch. An array of thermo-optic switches operated in this manner can form a display which, due to the fast individual switch rise times, can operate at an overall fast refresh rate.

Level conversion circuit for which an operation at power voltage rise time is stabilized

Abstract: A level conversion circuit for converting a first signal at a lower power source side into a second signal at a higher power source side, which is higher than the lower power source, includes first and second transistors provided at a ground side and controlled by the first signal and an inverted signal there of; third and fourth transistors gates and drains of which are cross-connected, provided at the higher power source side and connected to the first and second transistors respectively; and an initialization circuit for, at a higher power voltage rise time, reducing (or raising), along a current path, a level of either a first node located between the first and third transistors, or a second node located between the second and fourth transistors, to a ground voltage (or to a voltage of the higher power source).