Topic
RLC circuit
About: RLC circuit is a research topic. Over the lifetime, 14490 publications have been published within this topic receiving 142697 citations.
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21 May 2003TL;DR: In this article, a half-bridge series-resonant inverter with a cascading Rosen-type piezoelectric transformer (PT) is designed for cold cathode fluorescent lamps (CCFLs).
Abstract: To miniaturise the ballast circuit, a half-bridge series-resonant inverter with a cascading Rosen-type piezoelectric transformer (PT) is designed for cold cathode fluorescent lamps (CCFLs). The PT is interposed between the resonant circuit and the lamp as a stage of the voltage amplifier to increase the lamp voltage and hence to reduce the sizes of the reactive components. The circuit parameters are designed to operate the inverter at a switching frequency that will have the highest boost ratio of PT, and with zero voltage switching (ZVS) for the active power switches to achieve high circuit efficiency. The lamp power is regulated by duty-ratio control with asymmetrical pulse-width modulation (APWM). An electronic ballast designed for a 2.2 W CCFL is built and tested to verify the simulated results.
46 citations
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TL;DR: Conditions for checking the realizability of fractional-order impedance functions by passive networks composed of a fractional element and some RLC components are derived and a procedure for finding the realization in the realizable cases is proposed.
Abstract: In this paper, conditions for checking the realizability of fractional-order impedance functions by passive networks composed of a fractional element (either a fractional capacitor or a fractional inductor) and some RLC components are derived To this end, at first the newly obtained conditions for realizability of fractional-order impedance functions by a passive network composed of a fractional capacitor and some RLC components are extended to include the case that the polynomials involving in the impedance function can have roots on the imaginary axis Then, the necessary and sufficient conditions are found on a fractional-order impedance function to be realized by a passive network composed of a fractional element and some RLC components Furthermore, a procedure for finding the realization in the realizable cases is proposed Finally, the realizability conditions for a special class of fractional-order impedance functions are simplified
46 citations
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29 May 2001
TL;DR: In this paper, a new distributed circuit model for high Q, low ESR capacitors is proposed for discrete ceramic capacitors, which can predict the anti-resonant peak formed by the parallel components.
Abstract: Discrete ceramic capacitors are used to achieve a low power supply impedance in the MHz range. The traditional series RLC circuit model for discrete capacitors is inadequate for low ESR capacitors when mounted on low ESL pads. When combined with other capacitors or power plane models, the simple RLC model does not correctly predict the magnitude or frequency of the anti-resonant peak formed by the parallel components. Discrete capacitors have higher ESR and lower inductance than expected at frequencies above series resonance. A new distributed circuit model is proposed for high Q, low ESR capacitors. The distributed model correlates well with hardware measurements. Both simulated and measured results indicate that anti-resonant peaks are higher in frequency and lower in magnitude than predicted by the traditional series RLC model. Low ESR capacitors do not create the high impedance peak expected from simulation of the traditional series RLC circuit model.
46 citations
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TL;DR: In this paper, the authors proposed an on-chip interconnect model for full-chip simulation, which consists of two components, a quasi-three-dimensional (3-D) capacitance model and an effective loop inductance model.
Abstract: In this paper, we propose a compact on-chip interconnect model for full-chip simulation. The model consists of two components, a quasi-three-dimensional (3-D) capacitance model and an effective loop inductance model. In the capacitance model, we propose a novel concept of effective width (W/sub eff/) for a 3-D wire, which is derived from an analytical two-dimensional (2-D) model combined with a new analytical "wall-to-wall" model. The effective width provides a physics-based approach to decompose any 3-D structure into a series of 2-D segments, resulting in an efficient and accurate capacitance extraction. In the inductance model, we use an effective loop inductance approach for an analytic and hierarchical model construction. In particular, we show empirically that high-frequency signals (above multi-GHz) propagating through random signal lines can be approximated by a quasi-TEM mode relationship, leading to a simple way to extract the high-frequency inductance from the capacitance of the wire. Finally, the capacitance and inductance models are combined into a unified frequency-dependent RLC model, describing successfully the wide-band characteristics of on-chip interconnects up to 100 GHz. Non-orthogonal wire architecture is also investigated and included in the proposed model.
46 citations
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21 Nov 2001TL;DR: In this article, a precision oscillator circuit providing a periodic waveform is provided by the use of an integrating op-amp circuit in conjunction with a switched capacitor frequency control loop and a user input adapted to be coupled with a frequency-setting resistor.
Abstract: A precision oscillator circuit providing a periodic waveform is provided. A periodic waveform is provided by the use of an integrating op-amp circuit in conjunction with a switched capacitor frequency control loop and a user input adapted to be coupled with a frequency-setting resistor. The frequency of the periodic waveform is determined by the values of the switched capacitor and the resistor. The oscillator circuit has an arrangement which minimizes the effect of the op-amp circuit's offset voltage. The user input is kept robust against user-introduced capacitance by the use of controllable current sources and/or controllable voltage sources to bias the op-amp circuit. A linearity correction circuit is also provided to correct for non-ideal op-amp circuits.
46 citations