RLC circuit

About: RLC circuit is a research topic. Over the lifetime, 14490 publications have been published within this topic receiving 142697 citations.

A comparison of half-bridge resonant converter topologies

Abstract: The half-bridge series resonant, parallel resonant and combination series-parallel resonant converters are compared for use in low output voltage power supply applications. It is shown that the combination series-parallel converter, which takes on the desirable characteristics of the pure series and the pure parallel converter, removes the main disadvantages of those two converters. Analyses and breadboard results show that the combination series-parallel converter can run over a large input voltage range and a large load range (no-load to full-load) while while maintaining excellent efficiency. A useful analysis technique based on classical ac complex analysis is also introduced.

The radio-frequency single-electron transistor (RF-SET): A fast and ultrasensitive electrometer

Abstract: A new type of electrometer is described that uses a single-electron transistor (SET) and that allows large operating speeds and extremely high charge sensitivity. The SET readout was accomplished by measuring the damping of a 1.7-gigahertz resonant circuit in which the device is embedded, and in some ways is the electrostatic “dual” of the well-known radio-frequency superconducting quantum interference device. The device is more than two orders of magnitude faster than previous single-electron devices, with a constant gain from dc to greater than 100 megahertz. For a still-unoptimized device, a charge sensitivity of 1.2 × 10 −5 e / hertz was obtained at a frequency of 1.1 megahertz, which is about an order of magnitude better than a typical, 1/ f -noise-limited SET, and corresponds to an energy sensitivity (in joules per hertz) of about 41 ℏ.

Two-dimensional beam steering using an electrically tunable impedance surface

Abstract: By covering a metal ground plane with a periodic surface texture, we can alter its electromagnetic properties. The impedance of this metasurface can be modeled as a parallel resonant circuit, with sheet inductance L, and sheet capacitance C. The reflection phase varies with frequency from +/spl pi/ to -/spl pi/, and crosses through 0 at the LC resonance frequency, where the surface behaves as an artificial magnetic conductor. By incorporating varactor diodes into the texture, we have built a tunable impedance surface, in which an applied bias voltage controls the resonance frequency, and the reflection phase. We can program the surface to create a tunable phase gradient, which can electronically steer a reflected beam over +/- 40/spl deg/ in two dimensions, for both polarizations. We have also found that this type of resonant surface texture can provide greater bandwidth than conventional reflectarray structures. This new electronically steerable reflector offers a low-cost alternative to a conventional phased array.

Deactivateable security tag

Abstract: A security tag used with an electronic article surveillance system for detecting the presence of the tag within a surveilled area utilizing electromagnetic energy at a frequency within a predetermined detection frequency range includes a dielectric substrate having first and second opposing principle surfaces and a resonant circuit capable of resonating at a frequency within the predetermined detection frequency range. The resonant circuit includes an inductor formed at least in part on one of the principal surfaces of the substrate. A first perforation path formed of a series of spaced apart perforations extends along a line across the substrate and through at least a portion of the inductor such that a stress exerted on the tag breaks the tag and the inductor along the first perforation path, causing an open circuit condition which prevents the resonant circuit from resonating. In use, the security tag is affixed to an article and the stress applied to the article is a result of normal or ordinary use of the article.

Electrical Modeling and Characterization of Through Silicon via for Three-Dimensional ICs

Abstract: Three-dimensional ICs provide a promising option to build high-performance compact SoCs by stacking one or more chips vertically. Through silicon vias (TSVs) form an integral component of the 3-D IC technology by enabling vertical interconnections in 3-D ICs. TSV resistance, inductance, and capacitance need to be modeled to determine their impact on the performance of a 3-D circuit. In this paper, the RLC parameters of the TSV are modeled as a function of physical parameters and material characteristics. Models are validated with the numerical simulators like Raphael and Sdevice and with experimental measurements. The TSV RLC model is applied to predict the resistance, inductance, and capacitances of small-geometry TSV architectures. Finally, this paper also proposes a simplified lumped TSV model that can be used to simulate 3-D circuits.