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Showing papers on "Routing (electronic design automation) published in 1970"


Proceedings ArticleDOI
22 Jun 1970
TL;DR: A computer program for the automatic layout of single conductor layer IC masks is described and descriptions are included of element modelling, element placement, grid expansion, cross-over minimization, conductor routing and layout compaction.
Abstract: A computer program for the automatic layout of single conductor layer IC masks is described. Descriptions are included of element modelling, element placement, grid expansion, cross-over minimization, conductor routing and layout compaction.

48 citations


Journal Article
TL;DR: The methodology of the simulation model and the economic gains realized through its use are described and the use of an ARDS storage tube display to produce graphical output from the model is discussed.
Abstract: A SIMULATION MODEL THAT CONTAINS SUCH INPUTS AS NUMBER, CAPACITY, AND VELOCITY OF VEHICLES; TIME DISTRIBUTION OF DEMANDS; SPATIAL DISTRIBUTION OF ORIGINS, DESTINATIONS, AND INTERMEDIATE POINTS; AND OUTPUT OPTIONS HAS BEEN EXERCISED ON AN IBM 360/67 TO EVALUATE THE EFFECTIVENESS OF A REAL-TIME ROUTING ALGORITHM FOR A DEMAND-RESPONSE TAXI SERVICE NAMED CARS (COMPUTER-AIDED ROUTING SYSTEM) DEVELOPED AT M.I.T. THE ALGORITHM IS HERUISTIC BECAUSE OF THE INAPPLICABILITY OF EXISTING OPTIMIZATION TECHNIQUES. THE MODEL, WRITTEN IN FORTRAN AND COMPOSED OF 40 SUBPROGRAMS ABOUT 100,000 BYTES LONG, WAS DESIGNED TO EVALUATE VARIOUS HERUISTICS BASED ON TIME-VERSUS-COST TRADEOFFS. THE OPERATING VARIABLES AND INTERACTIVE CHARACTERISTICS OF THE MODEL ARE DESCRIBED AND ILLUSTRATED. FURTHER INVESTIGATION IS PLANNED TO SIMULATE THE SYSTEM INSTEAD OF MERELY THE ALGORITHM.

47 citations


Patent
08 Jan 1970
TL;DR: In this paper, a data processing machine is used to run a packaging routine, a placement routine, and a routing routine, in addition to check routines, and all logic elements for a particular circuit are coded and identified prior to carrying out any machine run routines.
Abstract: Artwork for a logic circuit to be fabricated by printed circuit board techniques is produced by a data processing machine programmed to run a packaging routine, a placement routine, and a routing routine, in addition to check routines. All logic elements for a particular circuit are coded and identified prior to carrying out any of the machine run routines. This circuit diagram information, along with mechanical criteria of the printed circuit board on which the circuit is to be fabricated, are supplied as input data to the data processing machine. The data processing machine first takes the coded circuit diagram information and checks it for errors. It then packages the individual logic elements into multi-element units (integrated circuits). Upon completion of the packaging routine, the data processor places the multi-element units within the limits of the mechanical criteria supplied as input data. After the packaging and placing routines have been completed, the machine routes interconnections between the terminal pins of the multi-element units using a numbered ordered maze restrained to proceed within pre-established limits.

21 citations


Patent
08 Jan 1970
TL;DR: In this article, a data processing machine is used to run a packaging routine, a placement routine, and a routing routine, in addition to check routines, and all logic elements for a particular circuit are coded and identified prior to carrying out any machine run routines.
Abstract: Artwork for a logic circuit to be fabricated by printed circuit board techniques is produced by a data processing machine programmed to run a packaging routine, a placement routine, and a routing routine, in addition to check routines. All logic elements for a particular circuit are coded and identified prior to carrying out any of the machine run routines. This circuit diagram information, along with mechanical criteria of the printed circuit board on which the circuit is to be fabricated, are supplied as input data to the data processing machine. The data processing machine first takes the coded circuit diagram information and checks it for errors. It then packages the individual logic elements into multi-element units (integrated circuits). Upon completion of the packaging routine, the data processor places the multi-element units within the limits of the mechanical criteria supplied as input data. After the packaging and placing routines have been completed, the machine routes interconnections between the terminal pins of the multi-element units using a numbered ordered maze restrained to proceed within pre-established limits.

19 citations


Patent
08 Jan 1970
TL;DR: In this paper, a data processing machine is used to run a packaging routine, a placement routine, and a routing routine, in addition to check routines, and all logic elements for a particular circuit are coded and identified prior to carrying out any machine run routines.
Abstract: Artwork for a logic circuit to be fabricated by printed circuit board techniques is produced by a data processing machine programmed to run a packaging routine, a placement routine, and a routing routine, in addition to check routines. All logic elements for a particular circuit are coded and identified prior to carrying out any of the machine run routines. This circuit diagram information, along with mechanical criteria of the printed circuit board on which the circuit is to be fabricated, are supplied as input data to the data processing machine. The data processing machine first takes the coded circuit diagram information and checks it for errors. It then packages the individual logic elements into multi-element units (integrated circuits). Upon completion of the packaging routine, the data processor places the multi-element units within the limits of the mechanical criteria supplied as input data. After the packaging and placing routines have been completed, the machine routes interconnections between the terminal pins of the multi-element units using a numbered ordered maze restrained to proceed within pre-established limits.

15 citations


Journal ArticleDOI
TL;DR: A solution procedure based on preprocessing, the addition of valid inequalities, the application of heuristics, and a branch & cut approach is used to solve real-life instances of the routing problem involving the Dutch railway stations Zwolle and Utrecht CS.
Abstract: This paper deals with the problem of routing trains through railway stations. This problem is to be solved within the Decision Support System DONS: Designer of Network Schedules. This system is developed to support the strategic planning process related to the required future capacity of the Dutch railway infrastructure. The latter capacity will be assessed with the help of DONS by generating a number of plausible timetables, and by checking whether these timetables are feasible, given certain scenarios for the future railway infrastructure. In this paper we give a description of the routing problem to be solved and of the relevant context. Then we formulate the problem as an integer linear programming model. The first objective is to maximize the number of trains that can be routed through a railway station, the second objective is to minimize the number of shunting movements and the third objective is to assign the trains to their most preferred platforms and routes. We also describe a solution procedure based on preprocessing, the addition of valid inequalities, the application of heuristics, and a branch & cut approach. This solution procedure is used to solve real-life instances of the routing problem involving the Dutch railway stations Zwolle and Utrecht CS.

14 citations


Proceedings ArticleDOI
Kenneth J. Thurber1
05 May 1970
TL;DR: For a special-purpose machine a fixed-wire permutation network could be acceptable for the handling of data; however, for a general- Purpose machine more sophisticated reprogrammable networks are required.
Abstract: One of the most important functions that must be performed in a digital machine is the handling and routing of data. This may be done in routing logic (computers), in permutation switching networks (computers and telephone traffic), sorting networks, etc. In some parallel processing computers being envisioned the handling of large blocks of data in a parallel fashion is a very important function that must be performed. For a special-purpose machine a fixed-wire permutation network could be acceptable for the handling of data; however, for a general-purpose machine more sophisticated reprogrammable networks are required.

12 citations



Patent
10 Dec 1970
TL;DR: In this paper, a special service routing circuit is proposed for single digit access to service centers in a complex of buildings or a large multi-storied building, such as a motel or hotel, in such a way that particular centers can be accessed only by particular lines in accordance with their location.
Abstract: A special service routing circuit provides for single digit access to service centers in a complex of buildings or a large multi-storied building, such as a motel or hotel, in such a way that particular centers can be accessed only by particular lines in accordance with their location. The routing circuit generates three digits to accompany the single dialed digit, which three digits will have a value depending on the location of the calling party for access to certain service lines.

10 citations


Patent
12 Jun 1970
TL;DR: In this article, a fixture has been proposed to protect the position of the solver head in a CIRCUIT board by running a set of pipes through the running board so that it can only move between the rows of the routine pipes.
Abstract: IN THE WIRING OF AN ELECTRICAL CIRCUIT ON A CIRCUIT BOARD HAVING SOLDER PADS SUITABLE FOR CONNECTION TO CIRCUIT COMPONENTS, INSULATED WIRE PASSES THROUGH A SOLDER HEAD WHICH IS MOVED RELATIVE TO THE POSITION OF THE BOARD. A FIXTURE HAS ROUTING PINS WHICH PROTRUDE THROUGH HOLES IN THE CIRCUIT BOARD SO THAT THE SOLDER HEAD CAN ONLY MOVE BETWEEN ROWS OF THE ROUTINE PINS. THE PREVENTS UNINTENTIONALLY BONDING A WIRE TO A PAD.

10 citations



Journal ArticleDOI
TL;DR: A dual-mode algorithm for routing an unmanned autonomous roving vehicle designed to explore the uncertain terrain of other planets is presented.
Abstract: A dual-mode algorithm for routing an unmanned autonomous roving vehicle designed to explore the uncertain terrain of other planets is presented. The algorithm consists of a global mode, which uses dynamic programming and terrain information available from photo reconnaissance data to determine a nominal optimal path, and a local mode, which routes the vehicle around obstacles whose presence, location, and extent are not known in advance. Gaussian probability density functions are used to simulate terrain for examples that illustrate the performance of the algorithm.

Journal ArticleDOI
TL;DR: In this article, a simple biased routing system for measurements of particle distributions in nuclear reaction is described and the circuit configurations are presented The system has been tested in (p,α) distribution measurements.


Journal ArticleDOI
TL;DR: The central office crossbar switching system with functionally separate electronic common control units is described and provides for improved administrative capabilities and can be used as an integral part to expand an existing electromechanical crossbar system in an evolutionary fashion.
Abstract: A central office crossbar switching system with functionally separate electronic common control units is described. The common control subsystem is divided into routing control, trunk supervision control, and data storage functions. Routing control is performed by a stored program controlled electronic processor. Trunk supervision control is accomplished on an optional basis either by a common wired logic electronic control unit or by logic in individual trunk circuits which can have access to the routing control processor for trunk identifying purposes. Data storage is provided in electrically alterable ferrite core memory banks. All common control subsystems are redundant with automatic switchover in case of failure. Crossbar switches are used in the switching matrix. Marker logic and simple switching functions in trunk and receiver/sender circuits are designed with conventional relay techniques. The switching system incorporates new custom calling and Centrex features. It provides for improved administrative capabilities and can be used as an integral part to expand an existing electromechanical crossbar system in an evolutionary fashion.


Journal ArticleDOI
Ronald C Snare1, L. Croxall
TL;DR: Call routing proceeds, in general, by direct indexing into head-cell referenced tables, and can be temporarily modified by network control cancellations, skips, and reroutes.
Abstract: Call routing proceeds, in general, by direct indexing into head-cell referenced tables. A link controller software stage retrieves and stores data pertinent to incoming trunk identification in memory assigned to the sender seized for the call. The decoder channel software stage, separated in time from the link controller stage by electromechanical functions, uses the incoming trunk and sender information to select a routing pattern hierarchy and associated outgoing trunk groups. The routing can be temporarily modified by network control cancellations, skips, and reroutes.

Journal ArticleDOI
TL;DR: An adaptive-logic network is tested on a simulated routing problem; adaptation of the network logic elements is used to find solutions of the routing problem, and then the size of thenetwork is increased adaptively, to increase the number of such solutions found.
Abstract: An adaptive-logic network is tested on a simulated routing problem. A dual adaptive process is proposed; adaptation of the network logic elements is used to find solutions of the routing problem, and then the size of the network is increased adaptively, to increase the number of such solutions found.

Patent
08 Jan 1970
TL;DR: In this paper, a data processing machine is used to run a packaging routine, a placement routine, and a routing routine, in addition to check routines, and all logic elements for a particular circuit are coded and identified prior to carrying out any machine run routines.
Abstract: Artwork for a logic circuit to be fabricated by printed circuit board techniques is produced by a data processing machine programmed to run a packaging routine, a placement routine, and a routing routine, in addition to check routines. All logic elements for a particular circuit are coded and identified prior to carrying out any of the machine run routines. This circuit diagram information, along with mechanical criteria of the printed circuit board on which the circuit is to be fabricated, are supplied as input data to the data processing machine. The data processing machine first takes the coded circuit diagram information and checks it for errors. It then packages the individual logic elements into multi-element units (integrated circuits). Upon completion of the packaging routine, the data processor places the multi-element units within the limits of the mechanical criteria supplied as input data. After the packaging and placing routines have been completed, the machine routes interconnections between the terminal pins of the multi-element units using a numbered ordered maze restrained to proceed within pre-established limits.

Journal ArticleDOI
TL;DR: A parallel implementation of genetic algorithms is applied to routing protocols with low bandwidth consumption, including the (LSP) link state packet protocols and a strategy is proposed that allows the algorithm to replace segments of the entire path.
Abstract: A parallel implementation of genetic algorithms is applied to routing protocols with low bandwidth consumption. In particular, the paper discusses the (LSP) link state packet protocols. The first part of the paper deals with network topology and transmission parameters, together with the structure for storing the network. The second part discusses the Genetic Algorithm implementation. To this end, it considers the generation of the initial population that is a subset of all the possible paths connecting couples of nodes. As far as the mating and mutation policy is concerned, a strategy is proposed that allows the algorithm to replace segments of the entire path The implementation is carried out in parallel, thus letting different populations to evolve separately. Subsets of different populations migrate periodically to avoid the populations to persist in some local minima. These are the equilibrium states, where no better path, with a lower cost, can be found for a given period. As for conclusions, comparisons between the results of the sequential and distributed implementations of Genetic Algorithms are reported.

01 Jan 1970
TL;DR: This paper discusses the following aspects of Electronic Route Guidance Systems: the existing ERGS-II Design, auxiliary applications of ERGS (including non- routing and routing functions), and dynamic route guidance, which implies traffic responsive real-time surveillance and control of traffic operations.
Abstract: This paper discusses the following aspects of Electronic Route Guidance Systems: the existing ERGS-II Design (including vehicular and road hardware), auxiliary applications of ERGS (including non- routing and routing functions), and dynamic route guidance, which implies traffic responsive real-time surveillance and control of traffic operations.




01 Apr 1970
Abstract: A branch -and -bound algorithm, which finds the optimal route through n nodes when a different cost matrix occurs after each arc in the sequence is traversed, is presented. The route may begin at any node and must pass through each of the n nodes exactly once. The objective is to minimize total cost in traversing (n-1) arcs of the route. The cost of traversing each arc is r.., which is a function of the distance between nodes i and i and a function of the k position in the sequence of arcs forming the route. The algorithm is presented in step-by-step detail and illustrated by flow chart and examples. A modification for symmetric (r..) improves the efficiency of the algorithm. A trade-off between computation time and storage requirements may be accomplished by alternate branching policies. Suboptimal solutions may be obtained with reduced computation. !fPOSTGRADUATE SCHOOS HAVAL p0bi l,7; ir 93940 HTEBEY, CALIF. V* TABLE OF CONTENTS

01 Jan 1970
TL;DR: An algorithm for the solution of sequence-dependent routing problems is presented and programmed in FORTRAN IV for use on digital computers and a typical traveling salesman closed-loop problem may be solved by the same program.
Abstract: An algorithm for the solution of sequence-dependent routing problems is presented and programmed in FORTRAN IV for use on digital computers. Solutions, computation times and iteration requirements are summarized and discussed for eleven test cases. With specific modification of the input data, a typical traveling salesman closed-loop problem may be solved by the same program. TABLE OF CONTENTS