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Showing papers on "Routing (electronic design automation) published in 1998"


Patent
25 Sep 1998
TL;DR: In this paper, the authors present a Web-based call routing management workstation application which allows authorized customers to control toll free routing and monitor call center status using a web browser.
Abstract: A Web-based call routing management workstation application which allows authorized customers to control toll free routing and monitor call center status. An architecture including one or more web servers located in a firewalled demilitarized zone (DMZ) as communications medium between the customer workstations at the customer sites and the enterprise back-end applications providing the call routing management services, provides a secure infrastructure for accessing the enterprise applications via the otherwise insecure public Internet. The present invention enables creation and management of call by call routing rules by a customer with a workstation having an Internet access and a supported Web browser. The customized rules may be tested and/or debugged via the Web-enabled workstation, using a debugger/tester which runs the routing rules under a simulated environment. In addition, customers may provision hierarchies for their business; create, modify or delete agent pools; manipulate capacity tables; and define quota schemes, value lists and schedule tables, all at the customer site via the Web-enabled workstation. The present invention also enables the customers to view near real-time displays of call center ACD statistics and peg counts based on routing rules, as well as, run provisioning and statistical reports on provisioning and statistical data and also to extract the data for further analysis. Additionally, the present invention supports foreign language and branding features on a graphical user interface. An infrastructure is provided which enables secure initiation, acquisition, and presentation of the call manager functionalities to customers from any computer workstation having a web browser and located anywhere in the world.

516 citations


Book
30 Nov 1998
TL;DR: Survivable Networks: Algorithms for Diverse Routing as mentioned in this paper provides algorithms for diverse routing to enhance the survivability of a network, which is a common mesh-type network and describes in detail the construction of physically disjoint paths algorithms fordiverse routing.
Abstract: From the Publisher: Survivable Networks: Algorithms for Diverse Routingprovides algorithms for diverse routing to enhance the survivabilityof a network. It considers the common mesh-type network and describesin detail the construction of physically disjoint paths algorithms fordiverse routing. The algorithms are developed in a systematic manner,starting with shortest path algorithms appropriate for disjoint pathsconstruction. Key features of the algorithms are optimality andsimplicity. Although the algorithms have been developed forsurvivability of communication networks, they are in a generic form,and thus applicable in other scientific and technical disciplines toproblems that can be modeled as a network. A notable highlight of this book is the consideration of real-lifetelecommunication networks in detail. Such networks are described notonly by nodes and links, but also by the actual physical elements,called span nodes and spans. The sharing of spans (the actual physicallinks) by the network (logical) links complicates the network,requiring new algorithms. This book is the first one to providealgorithms for such networks. Survivable Networks: Algorithms for Diverse Routing is acomprehensive work on physically disjoint paths algorithms. It is aninvaluable resource and reference for practicing network designers andplanners, researchers, professionals, instructors, students, andothers working in computer networking, telecommunications, and relatedfields.

506 citations


01 Jan 1998
TL;DR: A Branch and Cut algorithm to solve the Capacitated Vehicle Routing Problem which is based in the partial polyhedral description of the corresponding polytope and the lower bounds obtained are better than the ones previously known.
Abstract: The Capacitated Vehicle Routing Problem (CVRP) we consider in this paper consists in the optimization of the distribution of goods from a single depot to a given set of customers with known demand using a given number of vehicles of fixed capacity. There are many practical routing applications in the public sector such as school bus routing, pick up and mail delivery, and in the private sector such as the dispatching of delivery trucks. We present a Branch and Cut algorithm to solve the CVRP which is based in the partial polyhedral description of the corresponding polytope. The valid inequalities used in our method can ne found in Cornuejols and Harche (1993), Harche and Rinaldi (1991) and in Augerat and Pochet (1995). We concentrated mainly on the design of separation procedures for several classes of valid inequalities. The capacity constraints (generalized sub-tour eliminations inequalities) happen to play a crucial role in the development of a cutting plane algorithm for the CVRP. A large number of separation heuristics have been implemented and compared for these inequalities. There has been also implemented heuristic separation algorithms for other classes of valid inequalities that also lead to significant improvements: comb and extended comb inequalities, generalized capacity inequalities and hypo-tour inequalities. The resulting cutting plane algorithm has been applied to a set of instances taken from the literature and the lower bounds obtained are better than the ones previously known. Some branching strategies have been implemented to develop a Branch an Cut algorithm that has been able to solve large CVRP instances, some of them which had never been solved before. (authors). 32 refs., 3 figs., 10 tabs.

383 citations


Proceedings ArticleDOI
07 Jun 1998
TL;DR: A heuristic algorithm to first reduce the NP-complete problem to a simpler one which can be solved in polynomial time, and then solve the new problem by either an extended Dijkstra's algorithm or an extended Bellman-Ford algorithm.
Abstract: New emerging distributed multimedia applications provide guaranteed end-to-end quality of service (QoS) and have stringent constraints on delay, delay-jitter, cost, etc. The task of QoS routing is to find a route in the network which has sufficient resources to satisfy the constraints. The delay-cost-constrained routing problem is NP-complete. We propose a heuristic algorithm for this problem. The idea is to first reduce the NP-complete problem to a simpler one which can be solved in polynomial time, and then solve the new problem by either an extended Dijkstra's algorithm or an extended Bellman-Ford algorithm. We prove the correctness of our algorithm by showing that a solution for the simpler problem must also be a solution for the original problem. The performance of the algorithm is studied by both theoretical analysis and simulation.

361 citations


Patent
05 Feb 1998
TL;DR: A system for routing electronic mails to one of a plurality of support persons (122, 124) in a processing center (100) is disclosed in this article, where each person has a skill set that is suitable for responding to a certain type of e-mails.
Abstract: A system for routing electronic mails to one of a plurality of support persons (122, 124) in a processing center (100) is disclosed. Each person has a skill set that is suitable for responding to a certain type of e-mails. The system comprises an e-mail server (102) for receiving the e-mail from a sender, an information extractor (204) for extracting relevant information from the e-mail, and a router (116) for routing the e-mail. The system contains a database (114) for storing information related to all persons who can answer e-mails. The system also contains a server (112) for storing the history of all activities in the system. The router (116) can make routing decisions and perform load-balancing and alert functions based on the information stored in the database (114) and the server (130).

358 citations


Journal ArticleDOI
TL;DR: A single model and solution approach is presented to solve simultaneously the fleet assignment and aircraft routing problems and is robust in that it can capture costs associated with aircraft connections and complicating constraints such as maintenance requirements.
Abstract: Given a schedule of flight legs to be flown by an airline, the fleet assignment problem is to determine the minimum cost assignment of flights to aircraft types, called fleets, such that each scheduled flight is assigned to exactly one fleet, and the resulting assignment is feasible to fly given a limited number of aircraft in each fleet. Then the airline must determine a sequence of flights, or routes, to be flown by individual aircraft such that assigned flights are included in exactly one route, and all aircraft can be maintained as necessary. This is referred to as the aircraft routing problem. In this paper, we present a single model and solution approach to solve simultaneously the fleet assignment and aircraft routing problems. Our approach is robust in that it can capture costs associated with aircraft connections and complicating constraints such as maintenance requirements. By setting the number of fleets to one, our approach can be used to solve the aircraft routing problem alone. We show how to extend our model and solution approach to solve aircraft routing problems with additional constraints requiring equal aircraft utilization. With data provided by airlines, we provide computational results for the combined fleet assignment and aircraft routing problems without equal utilization requirements and for aircraft routing problems requiring equal aircraft utilization.

347 citations


Journal ArticleDOI
TL;DR: An automated design technique to reduce power by making use of two supply voltages, which was applied to a media processor chip and reduced the power by 47% in random-logic modules and by 73% in the clock tree, while keeping the performance.
Abstract: This paper describes an automated design technique to reduce power by making use of two supply voltages. The technique consists of structure synthesis, placement, and routing. The structure synthesizer clusters the gates off the critical paths so as to supply the reduced voltage to save power. The placement and routing tool assigns either the reduced voltage or the unreduced one to each row so as to minimize the area overhead. The reduced supply, voltage is also exploited in a clock tree to reduce power. Combining these techniques together, we applied it to a media processor chip. The combined technique reduced the power by 47% in random-logic modules and by 73% in the clock tree, while keeping the performance.

266 citations


Proceedings ArticleDOI
01 Nov 1998
TL;DR: A fast and exact algorithm which can minimize total area subject to maximum delay bound and is based on Lagrangian relaxation and "one-gate/wire-at-a-time" local optimizations, and is extremely economical and fast.
Abstract: This paper considers simultaneous gate and wire sizing for general very large scale integrated (VLSI) circuits under the Elmore delay model. We present a fast and exact algorithm which can minimize total area subject to maximum delay bound. The algorithm can be easily modified to give exact algorithms for optimizing several other objectives (e.g., minimizing maximum delay or minimizing total area subject to arrival time specifications at all inputs and outputs). No previous algorithm for simultaneous gate and wire sizing can guarantee exact solutions for general circuits. Our algorithm is an iterative one with a guarantee on convergence to global optimal solutions. It is based on Lagrangian relaxation and "one-gate/wire-at-a-time" greedy optimizations, and is extremely economical and fast. For example, we can optimize a circuit with 27648 gates and wires in 11.53 min using under 23 Mbytes memory on a PC with a 333-MHz Pentium II processor.

255 citations


Journal ArticleDOI
TL;DR: This work considers the problem of routing connections with quality of service (QoS) requirements across networks when the information available for making routing decisions is inaccurate and shows that by decomposing the end-to-end constraint into local delay constraints, efficient and tractable solutions can be established.
Abstract: We consider the problem of routing connections with quality of service (QoS) requirements across networks when the information available for making routing decisions is inaccurate. Such uncertainty about the actual state of a network component arises naturally in a number of different environments. The goal of the route selection process is then to identify a path that is most likely to satisfy the QoS requirements. For end-to-end delay guarantees, this problem is intractable. However, we show that by decomposing the end-to-end constraint into local delay constraints, efficient and tractable solutions can be established. Moreover, we argue that such decomposition better reflects the interoperability between the routing and reservation phases. We first consider the simpler problem of decomposing the end-to-end constraint into local constraints for a given path. We show that, for general distributions, this problem is also intractable. Nonetheless, by defining a certain class of probability distributions, which includes typical distributions, and restricting ourselves to that class, we are able to establish efficient and exact solutions. We then consider the general problem of combined path optimization and delay decomposition and present efficient solutions. Our findings are applicable also to a broader problem of finding a path that meets QoS requirements at minimal cost, where the cost of each link is some general increasing function of the QoS requirements from the link.

246 citations


01 Nov 1998
TL;DR: A usage of the BGP routing protocol is described which is capable of reducing the routing traffic passed on to routing peers and therefore the load on these peers without adversely affecting route convergence time for relatively stable routes.
Abstract: A usage of the BGP routing protocol is described which is capable of reducing the routing traffic passed on to routing peers and therefore the load on these peers without adversely affecting route convergence time for relatively stable routes. This technique has been implemented in commercial products supporting BGP. The technique is also applicable to IDRP.

244 citations


Journal ArticleDOI
TL;DR: The results show that when the link assignment is the same, static routing gives better performance than dynamic routing since the latter requires a substantial amount of time to stabilize its routing table after a state transition.
Abstract: We propose a new framework for the link assignment (i.e., topological design) problem that arises from the use of intersatellite links (ISL's) in low-earth orbit (LEO) satellite networks. In the proposed framework, we model an LEO satellite network as a finite state automaton (FSA), where each state corresponds to an equal-length interval in the system period of the LEO satellite network. This FSA-based framework allows the link assignment problem in LEO satellite networks to be treated as a set of link assignment problems in fixed topology networks. Within this framework, we study various link assignment and routing schemes. In particular, both regular link assignment and link assignment optimized by simulated annealing are considered. For each link assignment, both static and dynamic routing schemes are considered. Our simulation results show that the optimized link assignment combined with static routing achieves the best performance in terms of both newly initiated call blocking probability and ongoing call blocking probability. The results also show that when the link assignment is the same, static routing gives better performance than dynamic routing since the latter requires a substantial amount of time to stabilize its routing table after a state transition.

Patent
03 Feb 1998
TL;DR: In this article, a content processing and routing (CPR) system is proposed, which is aware of the content and requirements of data and service requests, as well as the capabilities of all services accessible via the system.
Abstract: A method and apparatus for incorporating content processing and content routing intelligence into networks. In one embodiment, the content processing and routing (CPR) system is aware of the content and requirements of data and service requests, as well as the capabilities of all services accessible via the system. Efficient network routing is accomplished by considering the capabilities of the available transmission channels, and the transmission needs of all current transmission service requests. Service requests are routed to the most suitable service or combination of services to fulfill the request. A mechanism is also provided for transparently converting data to accommodate data format differences between clients and services. In one embodiment, the CPR system comprises a system kernel consisting of the core software modules that are required to load, initialize and start CPR services, and allow the services to communicate securely. The CPR services conform to several general service types. These types include application services which act as the interface between a specific external application or device and the CPR system; kernel services which provide services on behalf of the kernel; content services which act on information in transit through the CPR system; routing services which contain the routing logic specific to a particular application; and link services which provide for the joining of two CPR instances over a network or other transmission channel. Data exchange is supported for bounded data in the form of media objects and unbounded data in the form of media streams.

Journal ArticleDOI
TL;DR: A comprehensive decomposition scheme for solving the inventory routing problem in which a central supplier must restock a subset of customers on an intermittent basis and a parametric analysis is conducted to investigate the tradeoff between distance and annual costs.
Abstract: This paper presents a comprehensive decomposition scheme for solving the inventory routing problem in which a central supplier must restock a subset of customers on an intermittent basis. In this setting, the customer demand is not known with certainty and routing decisions taken over the short run might conflict with the long-run goal of minimizing annual operating costs. A unique aspect of the short-run subproblem is the presence of satellite facilities where vehicles can be reloaded and customer deliveries continued until the closing time is reached. Three heuristics have been developed to solve the vehicle routing problem with satellite facilities (randomized Clarke-Wright, GRASP, modified sweep). After the daily tours are derived, a parametric analysis is conducted to investigate the tradeoff between distance and annual costs. This leads to the development of the efficient frontier from which the decision maker is free to choose the most attractive alternative. The proposed procedures are tested on data sets generated from field experience with a national liquid propane distributor.

Proceedings ArticleDOI
18 Oct 1998
TL;DR: The first BIST approach for testing the programmable routing network in FPGAs is introduced, which detects opens in, and shorts among, wiring segments, and also faults affecting theprogrammable switches that configure the FPGA interconnect.
Abstract: We introduce the first BIST approach for testing the programmable routing network in FPGAs. Our method detects opens in, and shorts among, wiring segments, and also faults affecting the programmable switches that configure the FPGA interconnect. As a result, the BIST technique provides complete testing of interconnect faults.

Patent
Enno Wein1
30 Oct 1998
TL;DR: In this paper, the authors present an integrated circuit chip design in which a technology-independent description of the integrated circuit design is obtained, and a first component is selected from a pre-defined first library based on the technology independent description, and an interconnection is specified between the first component and a second component based on a technologyindependent description.
Abstract: Integrated circuit chip design in which a technology-independent description of an integrated circuit design is obtained. A first component is selected from a pre-defined first library based on the technology-independent description, and an interconnection is specified between the first component and a second component based on the technology-independent description. The first component and the second component are laid out on a surface of the integrated circuit chip so as to obtain an initial layout, and a routing characteristic for the interconnection is estimated based on the initial layout. The first component is then replaced with a new component selected from a pre-defined second library based on the routing characteristic. According to this aspect of the invention, the pre-defined first library is smaller than the pre-defined second library.

Patent
Rajiv Kapur1
14 Jul 1998
TL;DR: In this paper, the poly layer of an IC chip is used for routing chip interconnects with minimal impact on the chip performance by selecting nets in the IC chip based on a predetermined or a desired qualification.
Abstract: Methods for using the polysilicon layer to route the cells in the ASIC are disclosed. The poly layer of an IC chip is used for routing chip interconnects with minimal impact on the chip performance by selecting nets in the IC chip based on a predetermined or a desired qualification. A maximum allowable length of the poly layer to be used for chip interconnects is determined based on the intended technology of the chip. A filtering algorithm filters the netlist to provide a set of candidate nets that are suitable for poly layer routing based on the predetermined or desired qualification. A routing tool routes the selected nets that have been selected by the filtering algorithm by using the poly layer. Some of the poly layer routings are further rejected by a post processing step.

Proceedings Article
01 Jan 1998
TL;DR: Two versions of AntNet, a novel approach to adaptive learning of routing tables in wide area best-effort datagram networks, are presented, showing superior performance with respect to the current Internet routing algorithm (OSPF), some improved old Internet routing algorithms, and recently proposed forms of asynchronous online Bellman-Ford.

Proceedings ArticleDOI
01 Jan 1998
TL;DR: A polynomialtime algorithm which, given a list of demands, routes the demands so as to minimize the largest number of paths through any of the 2n directed links of G, a digraph consisting of two oppositely-directed rings on the same set of n nodes.
Abstract: Let G be the digraph consisting of two oppositely-directed rings on the same set of n nodes. We provide a polynomialtime algorithm which, given a list of demands-each requiring a path from a specified source node to a specified target node-routes the demands so as to minimize the largest number of paths through any of the 2n directed links of G. The algorithm makes use of a partial linear relaxation and rounding technique which together, somewhat surprisingly, produce an exact solution. The problem arises in an optical communications network with wavelength division multiplexing (WDM), configured as a ring. Such a network features a fixed number of wavelengths, each of which (at the optical level) can sup port a single path of high bandwidth through a given link. If there is no “wavelength translation” available, so that each demand is restricted to a single wavelength, then the combined routing and wavelength assignment problem is NPcomplete. Our results imply, however, that the presence of even a single wavelength translator (at any node) guarantees both full capacity and polynomial-time optimizabihty. Single-translator sufficiency in the ring is a special case of a simple criterion which, given a set of nodes in an arbitrary WDM network, determines whether wavelength translators on those nodes allow the network to run at maximum capacity. Although the problem of minimizing the cardinahty of this set is NP-complete (even in the planar case), the high cost of wavelength translators can be expected to make the criterion a useful tool.

Proceedings ArticleDOI
01 May 1998
TL;DR: This paper introduces and demonstrates an extension to quadratic placement that accounts for wiring congestion, using an A* router and line-probe heuristics on region-based routing graphs to compute routing cost and shows improvements in wireability.
Abstract: This paper introduces and demonstrates an extension to quadratic placement that accounts for wiring congestion. The algorithm uses an A* router and line-probe heuristics on region-based routing graphs to compute routing cost. The interplay between routing analysis and quadratic placement using a growth matrix permits global treatment of congestion. Further reduction in congestion is obtained by the relaxation of pin constraints. Experiments show improvements in wireability.

Journal ArticleDOI
TL;DR: Evidence that Quality of Service (QoS) routing can provide increased network utilization compared to routing that is not sensitive to QoS requirements of traffic is provided.
Abstract: Recent studies provide evidence that Quality of Service (QoS) routing can provide increased network utilization compared to routing that is not sensitive to QoS requirements of traffic. However, th...

Journal ArticleDOI
TL;DR: This work studies the minimum-cost bounded-skew routing tree problem under the pathlength (linear) and Elmore delay models and proposes a new Greedy-BST/DME algorithm which combines the merging region computation with topology generation.
Abstract: We study the minimum-cost bounded-skew routing tree problem under the pathlength (linear) and Elmore delay models. This problem captures several engineering tradeoffs in the design of routing topologies with controlled skew. Our bounded-skew routing algorithm, called the BST/DME algorithm, extends the DME algorithm for exact zero-skew trees via the concept of a merging region. For a prescribed topology, BST/DME constructs a bounded-skew tree (BST) in two phases: (i) a bottom-up phase to construct a binary tree of merging regions which represent the loci of possible embedding points of the internal nodes, and (ii) a top-down phase to determine the exact locations of the internal nodes. We present two approaches to construct the merging regions: (i) the Boundary Merging and Embedding (BME) method which utilizes merging points that are restricted to the boundaries of merging regions, and (ii) the Interior Merging and Embedding (IME) algorithm which employs a sampling strategy and a dynamic programming-based selection technique to consider merging points that are interior to, as well as on the boundary of, the merging regions. When the topology is not prescribed, we propose a new Greedy-BST/DME algorithm which combines the merging region computation with topology generation. The Greedy-BST/DME algorithm very closely matches the best known heuristics for the zero-skew case and for the unbounded-skew case (i.e., the Steiner minimal tree problem). Experimental results show that our BST algorithms can produce a set of routing solutions with smooth skew and wire length tradeoffs.

Proceedings ArticleDOI
29 Mar 1998
TL;DR: This article considers the problem of routing connections with QoS requirements across networks, when the information available for making routing decisions is inaccurate, and presents an efficient solution scheme for a certain class of probability distributions, which posses a certain convexity property.
Abstract: This article considers the problem of routing connections with QoS requirements across networks, when the information available for making routing decisions is inaccurate. This uncertainty about the actual state of a network component arises naturally in a number of different environments, which are reviewed in the paper. The goal of the route selection process is then to identify a path that is most likely to satisfy the QoS requirements. For end to end delay guarantees, this problem is intractable. However we show that by decomposing the end-to-end constraint into local delay constraints, efficient and tractable solutions can be established. We first consider the simpler problem of decomposing the end-to-end constraint into local constraints, for a given path. We show that, for general distributions, this problem is also intractable. Nonetheless, by defining a certain class of probability distributions, which posses a certain convexity property, and restricting ourselves to that class, we are able to establish efficient and exact solutions. Moreover, we show that typical distributions would belong to that class. We then consider the general problem, of combined path optimization and delay decomposition. We present an efficient solution scheme for the above class of probability distributions. Our solution is similar to that of the restricted shortest-path problem, which renders itself to near-optimal approximations of polynomial complexity. We also show that yet simpler solutions exist in the special case of uniform distributions.

Patent
Stephen M. Trimberger1
24 Apr 1998
TL;DR: A window-pane architecture for FPGAs utilizes spaced subarrays having routing channels there between as discussed by the authors. But, in this case, each routing channel includes segmented and staggered routing wires to minimize current loading and capacitive time delay.
Abstract: A window pane architecture for FPGAs utilizes spaced subarrays having routing channels therebetween. In one embodiment, at least one routing channel includes segmented and staggered routing wires to minimize current loading and capacitive time delay. Connections between the configurable logic blocks, interconnect, and routing wires may be accomplished with switch matrices and programmable interconnect points.

Patent
Robi Dutta1, Ravi Rao1, Ashok Vittal1
18 Dec 1998
TL;DR: In this paper, a cost-based fine-routing router is proposed to reduce the number of paths determined for a wire route by pruning possible paths based on the placement of obstacles within the integrated circuit.
Abstract: An efficient iterative, gridless, cost-based router for a computer controlled integrated circuit design. The fine routing process is used during the wire routing phase of an integrated circuit design and fabrication process. During the wire routing process, wires are routed between pins of nets. The routing process of the present invention is gridless and utilizes lanes that are defined based on the boundaries of objects. The cost-based router computes a cost for each wire path, and the cost is based on: (1) the manhattan wire distance: (2) the layers in which the wire runs; and (3) any overlap the wire has with soft obstacles (e.g., other wires, etc.); and (4) an estimated cost to the target. Cost computation is reduced by considering only obstacles within the layer in which a lane is run. The number of paths determined for a wire route is reduced by pruning possible paths based on the placement of obstacles within the integrated circuit. Further pruning is performed by picking the lowest cost child lane in cases when several lanes select the same lane. Paths are also pruned by stopping along any path whose work-in-progress cost estimation exceeds the final cost of a path already discovered. In multi-pin nets, the routing process selects that path (of equal cost paths) between a source pin and a target pin that also runs closer to another unconnected pin of the multi-pin net. When a source-target wire route is performed for a multi-pin net, the unconnected pin is treated as the target and the source is considered as the source-target wire route.

Proceedings ArticleDOI
01 May 1998
TL;DR: A global routing algorithm based on a new Steiner tree formulation and the Lagrangian relaxation technique is presented, which gives theoretical results on the complexity of the problem.
Abstract: Due to the scaling down of device geometry and increasing frequency in deep sub-micron designs, crosstalk between interconnection wires has become an important issue in VLSI layout design. In this paper, we consider crosstalk avoidance during global routing. W e present a global routing algorithm based on a new Steiner tree formulation and the Lagrangian relaxation technique. W e also give theoretical results on the complexity of the problem.

Journal ArticleDOI
TL;DR: The routing problem when the requirement is to overnight at a maintenance station after at most four days of flying and to undergo the balance check every n days is considered, where n is the number of planes in the fleet of the equipment type under consideration.
Abstract: Federal aviation regulations require that all aircraft undergo maintenance after flying a certain number of hours. Most major U.S. airlines observe the maintenance regulations by requiring that aircraft spend a night at a maintenance station after at most three or four days of flying. In addition, some airlines require that every aircraft goes through a special maintenance station for what is commonly called a balance check. Airlines usually schedule routine maintenance only at night so as not to cut into aircraft utilization. The maintenance routing problem is to find a routing of the aircraft that satisfies the short-term routine maintenance requirements. In Gopalan, R. and Talluri, K. T. ("The Aircraft Maintenance Routing Problem," Opns. Res. in press) we modeled this problem as one of generating an appropriate directed graph (called a line-of-flight-graph), and of finding a special Euler Tour called the k-day Maintenance Euler Tour (k-MET, for k = 3, 4,...) in that directed graph-for finding a maintenance routing in which the aircraft would spend at most k days of flying before overnighting at a maintenance station and have an opportunity for a balance-check. In the same paper we gave a polynomial-time algorithm for finding a 3-MET, if one exists, in the directed graph. In this paper we consider the routing problem when the requirement is to overnight at a maintenance station after at most four days of flying and to undergo the balance check every n days, where n is the number of planes in the fleet of the equipment type under consideration. We show that this problem is NP-complete; in fact, that the k-MET problem is NP-complete for all k ≥ 4. When the number of maintenance stations is exactly one, we show that the 4-MET problem can be solved by solving an appropriate bipartite matching problem; and hence in polynomial time. As a corollary to this result, we show that when there is no balance check station visit requirement, the four-day routing problem, in a given LOF-graph, can be solved (without any restrictions on the number of maintenance stations) in polynomial time. We show how our polynomial-time algorithms for the 3-MET problem and the restricted 4-MET problem can be used to design effective heuristics for the 4-MET problem.

Journal ArticleDOI
TL;DR: A new genetic algorithm is developed to solve the MDR problems without constraints based on the transformation of the underlying network of an MDR problem into its distance complete form, a natural chromosome representation of a minimal spanning tree, and a completely new computation of the fitness of individual.
Abstract: The multiple destination routing (MDR) problem can be formulated as finding a minimal cost tree which contains designated source and multiple destination nodes so that certain constraints in a given communication network are satisfied. This is a typical NP-hard problem, and therefore only heuristic algorithms are of practical value. As a first step, a new genetic algorithm is developed to solve the MDR problems without constraints. It is based on the transformation of the underlying network of an MDR problem into its distance complete form, a natural chromosome representation of a minimal spanning tree (an individual), and a completely new computation of the fitness of individual. Compared with the known genetic algorithms and heuristic algorithms for the same problem, the proposed algorithm has several advantages. First, it guarantees convergence to an optimal solution with probability one. Second, not only are the resultant solutions all feasible, the solution quality is also much higher than that obtained by the other methods (indeed, in almost every case in our simulations, the algorithm can find the optimal solution of the problem). Third, the algorithm is of low computational complexity, and this can be decreased dramatically as the number of destination nodes in the problem increases. The simulation studies for the sparse and dense networks all demonstrate that the proposed algorithm is highly robust and very efficient in the sense of yielding high-quality solutions.

Proceedings ArticleDOI
01 Feb 1998
TL;DR: It is shown that DPR provides performance comparable to centralized alternatives, measured in terms of throughput and delay, and enhances the scalability of Web server clusters by eliminating the performance bottleneck exhibited when centralized connection routing techniques are utilized.
Abstract: To construct high performance Web servers, system builders are increasingly turning to distributed designs. An important challenge that arises in such designs is the need to direct incoming connections to individual hosts. Previous methods for connection routing (layer 4 switching) have employed a centralized node to handle all incoming requests. In contrast, we propose a distributed approach, called distributed packet rewriting (DPR), in which all hosts of the distributed system participate in connection routing. DPR promises better scalability and fault-tolerance than the current practice of using centralized special-purpose connection routers. We describe the implementation of four variants of DPR and compare their performance. We show that DPR provides performance comparable to centralized alternatives, measured in terms of throughput and delay. Also, we show that DPR enhances the scalability of Web server clusters by eliminating the performance bottleneck exhibited when centralized connection routing techniques are utilized.

Patent
18 Dec 1998
TL;DR: An efficient, gridless, cost-based coarse router having layer assignment for a computer controlled integrated circuit design is described in this paper. But the coarse routing process is used during the wire routing phase of an integrated circuits design and fabrication process, a number of obstructions are defined.
Abstract: An efficient, gridless, cost-based coarse router having layer assignment for a computer controlled integrated circuit design. The coarse routing process is used during the wire routing phase of an integrated circuit design and fabrication process. During the coarse wire routing process, a number of obstructions are defined. Next, the horizontal and vertical passages between adjacent obstructions, through which wires may be routed, are determined. The costs for possible wire paths connecting a pair of pins are computed based upon wire density histograms associated with the various passages through which the paths traverse. The lowest cost path is then selected. In order to increase the processing speed, a pruning method is employed to minimize the number of possible paths to be considered. In some instances, there may be areas which are overly congested. For overly congested areas, a pseudo obstruction is artificially created by the coarse router. Thereby, it may be more cost effective to route a portion of the wire through multiple different metal layers. The histogram is then updated and the next wire is iteratively routed.

Patent
02 Apr 1998
TL;DR: An automated method for designing an integrated circuit layout with a computer, based upon an electronic circuit description and upon a selected plurality of cells from a cell library, is described in this article.
Abstract: An automated method for designing an integrated circuit layout with a computer, based upon an electronic circuit description and upon a selected plurality of cells from a cell library, comprising the steps of: (a) assigning each of the cells to one of a plurality of buckets designated on the integrated circuit layout, each of the cells being connected to one of the other cells; (b) performing global routing to connect at least some of the selected cells of step (a) together such that global routes are formed to provide net topology information; (c) performing track routing which sets the position of each of the global routes; (d) performing detailed placement such that the positions of all selected cells are fixed within each of the buckets designated on the integrated circuit layout; and (e) performing detailed routing such that detailed routes are formed to complete the integrated circuit layout.