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Showing papers on "Routing (electronic design automation) published in 2002"


Proceedings ArticleDOI
02 Jul 2002
TL;DR: This paper model data-centric routing and compare its performance with traditional end-to-end routing schemes, and examines the complexity of optimal data aggregation, showing that although it is an NP-hard problem in general, there exist useful polynomial-time special cases.
Abstract: Sensor networks are distributed event-based systems that differ from traditional communication networks in several ways: sensor networks have severe energy constraints, redundant low-rate data, and many-to-one flows. Data-centric mechanisms that perform in-network aggregation of data are needed in this setting for energy-efficient information flow. In this paper we model data-centric routing and compare its performance with traditional end-to-end routing schemes. We examine the impact of source-destination placement and communication network density on the energy costs and delay associated with data aggregation. We show that data-centric routing offers significant performance gains across a wide range of operational scenarios. We also examine the complexity of optimal data aggregation, showing that although it is an NP-hard problem in general, there exist useful polynomial-time special cases.

1,536 citations


Journal ArticleDOI
TL;DR: A population-sizing equation based on the gambler ruin model that can be used for determining an adequate population size in the shortest path (SP) routing problem and exhibits a much better quality of solution and a much higher rate of convergence than other algorithms.
Abstract: This paper presents a genetic algorithmic approach to the shortest path (SP) routing problem. Variable-length chromosomes (strings) and their genes (parameters) have been used for encoding the problem. The crossover operation exchanges partial chromosomes (partial routes) at positionally independent crossing sites and the mutation operation maintains the genetic diversity of the population. The proposed algorithm can cure all the infeasible chromosomes with a simple repair function. Crossover and mutation together provide a search capability that results in improved quality of solution and enhanced rate of convergence. This paper also develops a population-sizing equation that facilitates a solution with desired quality. It is based on the gambler ruin model; the equation has been further enhanced and generalized. The equation relates the size of the population, quality of solution, cardinality of the alphabet, and other parameters of the proposed algorithm. Computer simulations show that the proposed algorithm exhibits a much better quality of solution (route optimality) and a much higher rate of convergence than other algorithms. The results are relatively independent of problem types for almost all source-destination pairs. Furthermore, simulation studies emphasize the usefulness of the population-sizing equation. The equation scales to larger networks. It is felt that it can be used for determining an adequate population size in the SP routing problem.

683 citations


Journal ArticleDOI
TL;DR: This work defines the simple path-vector protocol (SPVP), a distributed algorithm for solving the stable paths problem that is intended to capture the dynamic behavior of BGP at an abstract level and shows that SPVP will converge to the unique solution of an instance of the stable path problem if no dispute wheel exists.
Abstract: Dynamic routing protocols such as RIP and OSPF essentially implement distributed algorithms for solving the shortest paths problem. The border gateway protocol (BGP) is currently the only interdomain routing protocol deployed in the Internet. BGP does not solve a shortest paths problem since any interdomain protocol is required to allow policy-based metrics to override distance-based metrics and enable autonomous systems to independently define their routing policies with little or no global coordination. It is then natural to ask if BGP can be viewed as a distributed algorithm for solving some fundamental problem. We introduce the stable paths problem and show that BGP can be viewed as a distributed algorithm for solving this problem. Unlike a shortest path tree, such a solution does not represent a global optimum, but rather an equilibrium point in which each node is assigned its local optimum. We study the stable paths problem using a derived structure called a dispute wheel, representing conflicting routing policies at various nodes. We show that if no dispute wheel can be constructed, then there exists a unique solution for the stable paths problem. We define the simple path vector protocol (SPVP), a distributed algorithm for solving the stable paths problem. SPVP is intended to capture the dynamic behavior of BGP at an abstract level. If SPVP converges, then the resulting state corresponds to a stable paths solution. If there is no solution, then SPVP always diverges. In fact, SPVP can even diverge when a solution exists. We show that SPVP will converge to the unique solution of an instance of the stable paths problem if no dispute wheel exists.

536 citations


Proceedings ArticleDOI
06 Jan 2002
TL;DR: In this article, the worst-case coordination ratio on m parallel links was shown to be Θ(log m/log log log log m) where m is the number of parallel links.
Abstract: The coordination ratio is a game theoretic measure that aims to reflect the price of selfish routing in a network. We show the worst-case coordination ratio on m parallel links (of possibly different speeds) isΘ(log m/log log log m)Our bound is asymptotically tight and it entirely resolves an question posed recently by Koutsoupias and Papadimitriou [3].

336 citations


Patent
20 Dec 2002
TL;DR: In this article, a cross-layer integration of functions is provided on several protocol layers within a network, thus providing a unified approach to Quality of Service (QoS) provisioning in a multihop network.
Abstract: A true cross-layer integration of functions is provided on several protocol layers within a network, thus providing a unified approach to Quality of Service (QoS) provisioning in a multihop network. In the unified approach, connections are preferably determined by integrated optimization of a given objective function with respect to connection parameters on at least three protocol layers within the network. Preferably, the optimization involves routing (path selection), channel access as well as adaptation of physical link parameters. By incorporating physical connection parameters together with properly designed constraints, the issue of interference can be carefully considered. It is thereby possible to determine connection parameters that ensure substantially non-interfering communication with respect to existing connections as well as the new connection.

318 citations


Proceedings ArticleDOI
07 Nov 2002
TL;DR: A probabilistic location to enhance the performance of existing peer-to-peer location mechanisms in the case where a replica for the queried data item exists close to the query source, and introduces the attenuated Bloom filter, a lossy distributed index data structure.
Abstract: We propose probabilistic location to enhance the performance of existing peer-to-peer location mechanisms in the case where a replica for the queried data item exists close to the query source. We introduce the attenuated Bloom filter, a lossy distributed index data structure. We describe how to use these data structures for document location and how to maintain them despite document motion. We include a detailed performance study which indicates that our algorithm performs as desired, both finding closer replicas and finding them faster than deterministic algorithms alone.

313 citations


Patent
15 Nov 2002
TL;DR: In this article, the authors propose a content-based routing architecture, in which a virtual overlay network called the virtual content network is superimposed over the physical network, and tags for tagging content requests at the ingress points are designed to incorporate several different attributes of the content.
Abstract: Content networking provides a content-based routing architecture, in which a virtual overlay network called the “virtual content network” is superimposed over the physical network. The content network contains content routers as the nodes and “pathways” as links. The content-based routers at the edge of the content network may be either a gateway to the client domain or a gateway to the server domain whereas the interior ones correspond to the content switches dedicated for steering content requests and replies. The pathways are virtual paths along the physical network that connect the corresponding content routers. The tags for tagging content requests at the ingress points are designed to incorporate several different attributes of the content in the routing process. The path chosen for routing the request is the optimal path and is chosen from multiple paths leading to the replicas of the content.

244 citations


Journal ArticleDOI
I-Ming Chao1
TL;DR: A solution construction method and a tabu search improvement heuristic coupled with the deviation concept found in deterministic annealing are developed to solve the truck and trailer routing problem.

221 citations


Patent
26 Apr 2002
TL;DR: In this paper, the authors present methods, apparatuses and systems implementing enhanced network path testing methodologies that enhance the efficiency of processes associated with testing of a network path, while reducing the perceived intrusiveness of test packets associated with such metrics tests.
Abstract: Methods, apparatuses and systems relating to the control and application of policies for routing data over a computer network, such as the Internet. Some implementations of the invention facilitate the configuration, deployment and/or maintenance of network routing policies. Some implementations of the invention are particularly useful for controlling the routing of data among autonomous systems or organizations. Certain implementations allow for dynamic modification of routing policy based on such factors as current Internet performance, load sharing, user-defined parameters, and time of day. In one embodiment, the present invention provides methods, apparatuses and systems implementing enhanced network path testing methodologies that enhance the efficiency of processes associated with testing of a network path, while reducing the perceived intrusiveness of test packets associated with such metrics tests.

217 citations


Patent
01 Aug 2002
TL;DR: In this paper, a method of managing a network of sensors in an energy aware manner includes the steps of clustering the sensors to minimize energy consumption, routing the network (step 44), modeling the energy available at each sensor, and re-routing the network when the sensor battery level drops to a predetermined value, or when the energy model is adjusted because it deviates from a sensor's actual energy state.
Abstract: A method of managing a network of sensors in an energy aware manner includes the steps of clustering the sensors to minimize energy consumption, routing the network (step 44), modeling the energy available at each sensor (step 45), and re-routing the network (step 47) when the sensor battery level drops to a predetermined value, or when the energy model is adjusted because it deviates from a sensor's actual energy state.

213 citations


Patent
07 Jun 2002
TL;DR: In this paper, the phase information is incorporated into a cell-based design methodology and phase sets are selected based on the ability to phase shift the features within the cell C by creating a phase set for most of the cells of a cell library.
Abstract: Phase information is incorporated into a cell-based design methodology Standard cells have four edges: top, bottom, left, and right The top and bottom edges have fixed phase shifters placed, eg 0 A given cell C will have a phase set created with two versions: 0-180 (left-right) as well as 180-0 Alternatively, the same phase set: 0—0 and 180—180 could be created for a cell The phase sets are selected based on the ability to phase shift the features within the cell C By creating a phase set for most of the cells of a cell library, standard cell placement and routing techniques can be used and phase can then be quickly assigned using a simple ripple technique This ensures a phase compliant design upfront for the standard cell areas In some instances, phase sets are created for every cell in a library

Patent
06 Jun 2002
TL;DR: In this paper, the TCP connection data statistics are collected as connections are established between requesting clients and the CDN region and requests are serviced by those edge servers, which are then used by the request routing mechanism in subsequent routing decisions and in particular in the map generation processes.
Abstract: A routing method operative in a content delivery network (CDN) where the CDN includes a request routing mechanism for routing clients to subsets of edge servers within the CDN. According to the routing method, TCP connection data statistics are collected are edge servers located within a CDN region. The TCP connection data statistics are collected as connections are established between requesting clients and the CDN region and requests are serviced by those edge servers. Periodically, e.g., daily, the connection data statistics are provdied from the edge servers in a region back to the request routing mechanism. The TCP connection data statistics are then used by the request routing mechanism in subsequent routing decisions and, in particular, in the map generation processes. Thus, for example, the TCP connection data may be used to determine whether a given quality of service is being obtained by routing requesting clients to the CDN region. If not, the request routing mechanism generates a map that directs requesting clients away from the CDN region for a given time period or until the quality of service improves.

Proceedings ArticleDOI
09 Jan 2002
TL;DR: A parallel simulated annealing algorithm to solve the vehicle routing problem with time windows is presented and the empirical evidence indicate that parallel simulatedAnnealing can be applied with success to bicriterion optimization problems.
Abstract: A parallel simulated annealing algorithm to solve the vehicle routing problem with time windows is presented. The objective is to find the best possible solutions to some well-known instances of the problem by using parallelism. The empirical evidence indicate that parallel simulated annealing can be applied with success to bicriterion optimization problems.

11 Nov 2002
TL;DR: A solving strategy, based on the Ant Colony System paradigm, is proposed for dynamic vehicle routing problems where new orders are received as time progresses and must be dynamically incorporated into an evolving schedule.
Abstract: An aboundant literature on vehicle routing problems is available. However, almost all the work deals with static problems where all data are known in advance, i.e. before the optimization has started. The technological advances of the last few years give rise to a new class of problems, namely the dynamic vehicle routing problems, where new orders are received as time progresses and must be dynamically incorporated into an evolving schedule. In this paper a dynamic vehicle routing problem is examined and a solving strategy, based on the Ant Colony System paradigm, is proposed. The method has been tested on a set of benchmarks we have defined starting from a set of widely available problems. Computational results confirm the effectiveness and the efficiency of the strategy we

Proceedings ArticleDOI
24 Feb 2002
TL;DR: A routability-driven bottom-up clustering technique for area and power reduction in clustered FPGAs using a cell connectivity metric to identify seeds for efficient clustering is presented.
Abstract: We present a routability-driven bottom-up clustering technique for area and power reduction in clustered FPGAs. This technique uses a cell connectivity metric to identify seeds for efficient clustering. Effective seed selection, coupled with an interconnect-resource aware clustering and placement, can have a favorable impact on circuit routability. It leads to better device utilization, savings in area, and reduction in power consumption. Routing area reduction of 35% is achieved over previously published results. Power dissipation simulations using a buffered pass-transistor-based FPGA interconnect model are presented. They show that our clustering technique can reduce the overall device power dissipation by an average of 13%.

Journal ArticleDOI
TL;DR: Results on a set of benchmark test problems show that the proposed heuristic produces excellent solutions in short computing times, and produced new best-known solutions for three of the test problems.

Patent
26 Jun 2002
TL;DR: In this article, a method and apparatus for routing frames through a fiber channel fabric (10) to make the most efficient possible use of redundant inter-switch links (45) between neighboring switches (45, 50).
Abstract: A method and apparatus for routing frames through a fibre channel fabric (10) to make the most efficient possible use of redundant inter-switch links (45) between neighboring switches (45, 50). The inter-switch links (45) may have different bandwidths. The flow between adjacent switches (40, 50) is monitored to determine various local usage statistics and periodically adjust routing tables to move data flows from congested links to lightly loaded links.

Patent
Zahid Hussain1, Sachin Desai1, Naveed Alam1, Joseph Cheng1, Tim Millet1 
04 Jun 2002
TL;DR: In this paper, the first level of metering is performed on packets of a first packet flow using a first metering control block (MCB) and the second level is performed using a second MCB.
Abstract: A virtual routing platform includes a line interface a plurality of virtual routing engines (VREs) to identify packets of different packet flows and perform a hierarchy of metering including at least first and second levels of metering on the packet flows. A first level of metering may be performed on packets of a first packet flow using a first metering control block (MCB). The first level of metering may be one level of metering in a hierarchy of metering levels. A second level of metering on the packets of the first packet flow and packets of a second flow using a second MCB. The second level of metering may be another level of metering in the hierarchy. A cache-lock may be placed on the appropriate MCB prior to performing the level of metering. The first and second MCBs may be data structures stored in a shared memory of the virtual routing platform. The cache-lock may be released after performing the level of metering using the MCB. The cache-lock may comprise setting a lock-bit of a cache line index in a cache tag store, which may identify a MCB in the cache memory. The virtual routing platform may be a multiprocessor system utilizing a shared memory having a first and second processors to perform levels of metering in parallel. In one embodiment, a virtual routing engine may be shared by a plurality of virtual router contexts running in a memory system of a CPU of the virtual routing engine. In this embodiment, the first packet flow may be associated with one virtual router context and the second packet flow is associated with a second virtual router context. The first and second routing contexts may be of a plurality of virtual router contexts resident in the virtual routing engine.

Patent
10 Jun 2002
TL;DR: A method for modeling integrated circuit designs in a hierarchical design automation system which utilizes a block abstraction including a set of all database objects (cells, nets, wires, vias, and blockages) that are necessary to achieve accurate placement, routing, extraction, simulation, and verification of the block's ancestors in the hierarchy is presented in this article.
Abstract: A method for modeling integrated circuit designs in a hierarchical design automation system which utilizes a block abstraction including therein set of all database objects (cells, nets, wires, vias, and blockages) that are necessary to achieve accurate placement, routing, extraction, simulation, and verification of the block's ancestors in the hierarchy.

Journal ArticleDOI
10 Dec 2002
TL;DR: The paper presents an extension of the classical Banker's algorithm to a class of flexible manufacturing systems modeled by means of Petri nets, which have two interesting characteristics from the application point of view.
Abstract: Banker's-like approaches to deadlock avoidance are based on a decision procedure to grant active processes resources using information about the maximum needs of resources that a process can request in order to ensure termination. The paper presents an extension of the classical Banker's algorithm to a class of flexible manufacturing systems modeled by means of Petri nets. These systems have two interesting characteristics from the application point of view. First, flexible routing of parts is allowed, and second, a multiset of resources is allowed to be used at each processing step. The decision procedure introduced is polynomial in the Petri net model size.

Proceedings ArticleDOI
07 Apr 2002
TL;DR: A fast but reliable way to detect routing criticalities in VLSI chips by using a congestion estimator for a dynamic avoidance of routability problems in one single run of the placement algorithm.
Abstract: We present a fast but reliable way to detect routing criticalities in VLSI chips. In addition, we show how this congestion estimation can be incorporated into a partitioning based placement algorithm. Different to previous approaches, we do not rerun parts of the placement algorithm or apply a post-placement optimization, but we use our congestion estimator for a dynamic avoidance of routability problems in one single run of the placement algorithm. Computational experiments on chips with up to 1,300,000 cells are presented: The framework reduces the usage of the most critical routing edges by 9.0% on average, the running time increase for the placement is about 8.7%. However, due to the smaller congestion, the running time of routing tools can be decreased drastically, so the total time for placement and (global) routing is decreased by 47% on average.

Patent
Anupam A. Bharali1, Balraj Singh1, Manish H. Sampat1, Amit P. Singh1, Rajiv Batra1 
23 Aug 2002
TL;DR: In this article, an efficient routing information through a dynamic network consisting of at least one ingress point and one egress point is proposed. But the system is not suitable for large networks and it requires the ingress and egress to form a virtual circuit for routing packets to destination subnets directly reachable by the egress.
Abstract: The present invention provides an efficient system and method for routing information through a dynamic network. The system includes at least one ingress point and one egress point. The ingress and egress point cooperate to form a virtual circuit for routing packets to destination subnets directly reachable by the egress point. The egress point automatically discovers which subnets are directly accessible via its local ports and summarizes this information for the ingress point. The ingress point receives this information, compiles it into a routing table, and verifies that those subnets are best accessed by the egress point. Verification is accomplished by sending probe packets to select addresses on the subnet. Additionally, the egress point may continue to monitor the local topology and incrementally update the information to the ingress to allow the ingress to adjust its compiled routing table.

Patent
Glenn A. Baxter1
09 Dec 2002
TL;DR: In this paper, the reduced logic blocks are derived from the configuration data of configurable logic blocks and reduced matrices for input/output blocks and programmable switch matrices of the FPGA, respectively.
Abstract: Method and circuits to create reduced field programmable gate arrays (RFPGA) from the configuration data of field programmable gate arrays (FPGA) are disclosed. The configurable elements of the FPGA are replaced with standard cell circuits that reproduce the functionality of the configured FPGA. Specifically, reduced logic blocks are derived from the configuration data of configurable logic blocks. Similarly, reduced input/output blocks and reduced matrices are derived from the configuration data for input/output blocks and programmable switch matrices of the FPGA, respectively. A database can be expanded as new reduced logic block models are created for configurable logic block models that were not in the database. Similarly, a database can be used for the input/output blocks and programmable switch matrices of an FPGA.

Proceedings ArticleDOI
06 Apr 2002
TL;DR: In this short paper, some of the challenges and opportunities afforded by the X Architecture are presented and some early results that demonstrate the promise of pervasive, diagonal wiring are shown, reflecting the belief that five years from now, virtually all, high-performance, integrated circuits will use the X architecture.
Abstract: The X Architecture is an integrated-circuit wiring architecture based on the pervasive use of diagonal wires. Compared with the traditional, currently ubiquitous, Manhattan architecture, the X Architecture demonstrates a wire length reduction of more than 20% and a via reduction of more 30%. Because of the rapidly increasing percentage of delay due to interconnect and the manufacturing challenges due to vias in the nanometer realm, these length and via reductions result simultaneously in a chip performance improvement of 10%, a power reduction of 20%, and a die cost reduction of 30%. Furthermore, the reduction in both wire length and parallel runs on different layers often both reduces die size and improves signal integrity. Remarkably, on virtually every important measure of chip quality, the X Architecture is superior to the Manhattan architecture.While diagonal wiring has been discussed for years, and short diagonal jogs have even been used for years, pervasive diagonal wiring has not been used on an IC before 2002 (to our knowledge). The fundamental reasons for this are not manufacturing limitations, as might be suspected, but EDA limitations, and the changes required to take full advantage of the X Architecture are significant and numerous. In particular, routing must be not only octilinear, but also gridless and non-preferred direction. In addition, significant changes are required at least in floorplanning, placement, global routing, extraction, power routing, clock routing, wire length estimation (e.g., in synthesis), database, graphics, and even data interchange formats. The folklore that 45-degree wiring might not be worth the trouble because it can provide only a 10% reduction in wire length is rooted in the incorrect assumptions that (a) only the router must change, (b) the router must resemble contemporary, preferred-direction, net-at-a-time maze routers, and (c) that wire length is the only major contributor to interconnect delay.In this short paper, we present some of the challenges and opportunities afforded by the X Architecture and show some early results that demonstrate the promise of pervasive, diagonal wiring, reflecting our belief that five years from now, virtually all, high-performance, integrated circuits will use the X Architecture.

Journal ArticleDOI
TL;DR: The concept of pattern routing is used to develop algorithms that guide the router to a solution that minimizes interconnect delay - by considering both coupling and wirelength-without damaging the routability of the circuit.
Abstract: Deep submicron effects, along with increasing interconnect densities, have increased the complexity of the routing problem. Whereas previously we could focus on minimizing wirelength, we must now consider a variety of objectives during routing. For example, an increased amount of timing restrictions means that we must minimize interconnect delay. But, interconnect delay is no longer simply related to wirelength. Coupling capacitance has become a dominant component of delay due to the shrinking of device sizes. Regardless, the most important objective is producing a routable circuit. Unfortunately, this often conflicts with minimizing interconnect delay as minimum delay routes create congested areas, for which an exact routing cannot be realized without violating design rules. In this work, we use the concept of pattern routing to develop algorithms that guide the router to a solution that minimizes interconnect delay - by considering both coupling and wirelength-without damaging the routability of the circuit. The paper is divided into two parts. The first part demonstrates that pattern routing can be used without affecting the routability of the circuit. We propose two schemes to choose a set of nets to pattern route. Using these schemes, we show that the routability is not hindered. The second part builds on the previous part by presenting a framework for coupling reduction using pattern routing. We develop theory and algorithms relating pattern routing and coupling. Additionally, we give suggestions on how to extend our theory and use our algorithms for both global and detailed routing.

Journal ArticleDOI
TL;DR: This paper proposes a suitable addressing scheme for nodes, derive a formula for distance between nodes, and presents a very simple and elegant routing algorithm for hexagonal interconnection.
Abstract: Nodes in a hexagonal network are placed at the vertices of a regular triangular tessellation, so that each node has up to six neighbors. The network is proposed as an alternative interconnection network to a mesh connected computer (with nodes serving as processors) and is used also to model cellular networks where nodes are the base stations. In this paper, we propose a suitable addressing scheme for nodes (with two variants), derive a formula for distance between nodes, and present a very simple and elegant routing algorithm. This addressing scheme and corresponding routing algorithm for hexagonal interconnection are considerably simpler than previously proposed solutions. We then apply the addressing scheme for solving two problems in cellular networks. With the new scheme, the distance between the new and old cell to which a mobile phone user is connected can be easily determined and coded with three integers, one of them being zero. Further, in order to minimize the wireless cost of tracking mobile users, we propose hexagonal cell identification codes containing three, four, or six bits, respectively, to implement a distance based tracking strategy. These schemes do not have errors in determining cell distance in existing hexagonal based cellular networks. Another application is for connection rerouting in cellular networks during a path extension process.

Patent
03 Apr 2002
TL;DR: In this article, a routing system for routing communication events is described, which comprises at least one data queue for queuing incoming events, at least two interaction mechanisms for enabling bi-directional communication with authors of events in queue, and a processor for processing events in queuing according to routing rules.
Abstract: A routing system is disclosed for routing communication events. The system comprises at least one data queue for queuing incoming events; at least one interaction mechanism for enabling bi-directional communication with authors of events in queue; and a processor for processing events in queue according to routing rules. In a preferred embodiment authors of the communication events are solicited through the at least one interaction mechanism to make a value contribution in exchange for advancement in the data queue.

Patent
26 Nov 2002
TL;DR: In this paper, the authors proposed a middleware oriented messaging (MOM) infrastructure using named/labeled routing nodes and queues, which can be dynamically mapped to network connection information at runtime in the event of an addition, deletion, or modification to a processor cluster via the information contained in the informational messages.
Abstract: The disclosed technology enables electronic messages generated by one software application program to be routed to another remote software application program via a middleware oriented messaging (“MOM”) infrastructure using named/labeled routing nodes and queues. Network connection information corresponding to particular routing nodes and queues can be automatically and dynamically determined by periodically, and/or upon the occurrence of an event, transmitting/receiving informational messages between software processes associated with known/previously-encountered routing nodes and queues. The routing nodes and queues can be identified by names or labels, which can be dynamically mapped to network connection information at runtime in the event of an addition, deletion, or modification to a processor cluster via the information contained in the informational messages.

Proceedings ArticleDOI
07 Aug 2002
TL;DR: An application of a gradient ascent algorithm for reinforcement learning to a complex domain of packet routing in network communication is presented and the performance of this algorithm is compared to other routing methods on a benchmark problem.
Abstract: Reinforcement learning means learning a policy-a mapping of observations into actions-based on feedback from the environment. The learning can be viewed as browsing a set of policies while evaluating them by trial through interaction with the environment. We present an application of a gradient ascent algorithm for reinforcement learning to a complex domain of packet routing in network communication and compare the performance of this algorithm to other routing methods on a benchmark problem.

Proceedings ArticleDOI
21 Jul 2002
TL;DR: In this paper, the authors consider the problem of designing an overlay network and routing mechanism that permits finding resources efficiently in a peer-to-peer system, and prove upper and lower bounds on the message complexity of locating particular resources in such a system, under a variety of assumptions about failures of either nodes or connections between them.
Abstract: We consider the problem of designing an overlay network and routing mechanism that permits finding resources efficiently in a peer-to-peer system. We argue that many existing approaches to this problem can be modeled as the construction of a random graph embedded in a metric space whose points represent resource identifiers, where the probability of a connection between two nodes depends only on the distance between them in the metric space. We study the performance of a peer-to-peer system where nodes are embedded at grid points in a simple metric space: a one-dimensional real line. We prove upper and lower bounds on the message complexity of locating particular resources in such a system, under a variety of assumptions about failures of either nodes or the connections between them. Our lower bounds in particular show that the use of inverse power-law distributions in routing, as suggested by Kleinberg [5], is close to optimal. We also give heuristics to efficiently maintain a network supporting efficient routing as nodes enter and leave the system. Finally, we give some experimental results that suggest promising directions for future work.