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Routing (electronic design automation)

About: Routing (electronic design automation) is a research topic. Over the lifetime, 41081 publications have been published within this topic receiving 566406 citations. The topic is also known as: wire routing.


Papers
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Journal ArticleDOI
TL;DR: A unified tabu search heuristic for the vehicle routing problem with time windows and for two important generalizations: the periodic and the multi-depot vehicle routing problems with timewindows is presented.
Abstract: This paper presents a unified tabu search heuristic for the vehicle routing problem with time windows and for two important generalizations: the periodic and the multi-depot vehicle routing problems with time windows. The major benefits of the approach are its speed, simplicity and flexibility. The performance of the heuristic is assessed by comparing it to alternative methods on benchmark instances of the vehicle routing problem with time windows. Computational experiments are also reported on new randomly generated instances for each of the two generalizations.

857 citations

Proceedings ArticleDOI
08 Jun 1997
TL;DR: This paper uses an approximation to the minimum connected dominating set (MCDS) of the ad-hoc network topology as the virtual backbone, and maintains local copies of the global topology of the network, along with shortest paths between all pairs of nodes.
Abstract: We impose a virtual backbone structure on the ad-hoc network, in order to support unicast, multicast, and fault-tolerant routing within the ad-hoc network. This virtual backbone differs from the wired backbone of cellular networks in two key ways: (a) it may change as nodes move, and (b) it is not used primarily for routing packets or flows, but only for computing and updating routes. The primary routes for packets and flows are still computed by a shortest-paths computation; the virtual backbone can, if necessary provide backup routes to handle interim failures. Because of the dynamic nature of the virtual backbone, our approach splits the routing problem into two levels: (a) find and update the virtual backbone, and (b) then find and update routes. The key contribution of this paper is to describe several alternatives for the first part of finding and updating the virtual backbone. To keep the virtual backbone as small as possible we use an approximation to the minimum connected dominating set (MCDS) of the ad-hoc network topology as the virtual backbone. The hosts in the MCDS maintain local copies of the global topology of the network, along with shortest paths between all pairs of nodes.

836 citations

Journal ArticleDOI
TL;DR: The theoretical background for the design of deadlock-free adaptive routing algorithms for wormhole networks is developed and some basic definitions and two theorems are proposed, which create the conditions to verify that an adaptive algorithm is deadlocks-free, even when there are cycles in the channel dependency graph.
Abstract: The theoretical background for the design of deadlock-free adaptive routing algorithms for wormhole networks is developed. The author proposes some basic definitions and two theorems. These create the conditions to verify that an adaptive algorithm is deadlock-free, even when there are cycles in the channel dependency graph. Two design methodologies are also proposed. The first supplies algorithms with a high degree of freedom, without increasing the number of physical channels. The second methodology is intended for the design of fault-tolerant algorithms. Some examples are given to show the application of the methodologies. Simulations show the performance improvement that can be achieved by designing the routing algorithms with the new theory. >

831 citations

Journal ArticleDOI
TL;DR: It is found that Internet paths are heavily dominated by a single prevalent route, but that the time periods over which routes persist show wide variation, ranging from seconds up to days.
Abstract: The large-scale behavior of routing In the Internet has gone virtually without any formal study, the exceptions being Chinoy's (1993) analysis of the dynamics of Internet routing information, and work, similar in spirit, by Labovitz, Malan, and Jahanian (see Proc. SIGCOMM'97, 1997). We report on an analysis of 40000 end-to-end route measurements conducted using repeated "traceroutes" between 37 Internet sites. We analyze the routing behavior for pathological conditions, routing stability, and routing symmetry. For pathologies, we characterize the prevalence of routing loops, erroneous routing, infrastructure failures, and temporary outages. We find that the likelihood of encountering a major routing pathology more than doubled between the end of 1994 and the end of 1995, rising from 1.5% to 3.3%. For routing stability, we define two separate types of stability, "prevalence", meaning the overall likelihood that a particular route is encountered, and "persistence", the likelihood that a route remains unchanged over a long period of time. We find that Internet paths are heavily dominated by a single prevalent route, but that the time periods over which routes persist show wide variation, ranging from seconds up to days. About two-thirds of the Internet paths had routes persisting for either days or weeks. For routing symmetry, we look at the likelihood that a path through the Internet visits at least one different city in the two directions. At the end of 1995, this was the case half the time, and at least one different autonomous system was visited 30% of the time.

811 citations

Journal ArticleDOI
TL;DR: The torus routing chip (TRC) is a selftimed chip that performs deadlock-free cut-through routing ink-aryn-cube multiprocessor interconnection networks using a new method of deadlock avoidance called virtual channels.
Abstract: The torus routing chip (TRC) is a self-timed chip that performs deadlock-free cut-through routing in k-ary n-cube multiprocessor interconnection networks using a new method of deadlock avoidance called virtual channels. A prototype TRC with byte wide self-timed communication channels achieved on first silicon a throughput of 64Mbits/s in each dimension, about an order of magnitude better performance than the communication networks used by machines such as the Caltech Cosmic Cube or Intel iPSC. The latency of the cut-through routing of only 150ns per routing step largely eliminates message locality considerations in the concurrent programs for such machines. The design and testing of the TRC as a self-timed chip was no more difficult than it would have been for a synchronous chip.

808 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20241
2023971
20222,369
20212,254
20202,454
20192,530