Showing papers on "Sampling (signal processing) published in 1983"

Real-time fringe-pattern analysis.

Abstract: The task is to learn the phases of real positive intensity fringes from an optical testing interferometer The introduction of substantial tilt into the interferometer establishes a field of finely spaced fringes that serve as a spatial heterodyne carrier Sequential pixel values from a TV video signal of the picture are distributed among three separate signal channels, every third pixel going to the same channel The distribution rate is set at ~3 pixels/fringe so that each channel senses one phase of a three-phase stroboscope or moire Complex weighting of the channel signals eliminates the common mode to provide in-phase and quadrature analog fringe signals A direct analog-to-digital arctangent converter, with that analog signal pair as input, provides 4-bit (1/16-cycle resolution) fringe phase at a 5-MHz sampling rate The converter is coupled to a turns counter that automatically registers unwrapped phase The similarity of the signals to ntsc color TV encoding is noted along with certain other applications

Multi-function electricity metering transducer

Abstract: An electricity metering transducer which samples voltages and currents at an innerconnection terminal (10) of an electrical energy distribution system, converts those samples to digital form and computes selected electricity metering quantities. In a multiphase system current and voltage signals are multiplexed to a pair of codecs (24 & 26), one for current signals and one for voltage signals. The period of the signals being sampled is detected and used to generate a substantially nonsynchronous sampling signal so that a sample migration system is created which provides a large number of samples of a composite waveform. The steps of a digitally generated stepwise approximation of a sawtooth waveform are summed with the sequential analog samples and then removed from the digital value of each sample by software operation in order to increase the resolution of the digital to analog conversion.

Vibration monitoring system for aircraft engines

Abstract: A vibration monitoring sytem for aircraft engines includes a nonrecursive digital filter network (22) controlled by a data processor (16). A signal from accelerometers (1,2) are passed through a circuit (36) for sampling analogue signals under the control of sampling signals. Digital techniques process tachometer signals to generatate sampling signals at a frequency which is an integral multiple of the rotating frequency. The digital filter (22) can track the rotational frequency of the rotating component and can be accurately centred on that frequency. The digital filter includes a pair of memories (82, 88) which respectively store sampled data and constant coefficients. The sampled data storage can accommodate the output of more than one sensor and data from each sensor can be alternately processed.

Spectrum display device for audio signals

Abstract: An input audio signal is AD converted into digital signals which are processed by a central processing unit (CPU) in which Fast Fourier Transform (FFT) operation and power spectrum calculation are effected. As a result power spectrum data is obtained, and then position determination is effected to determine the position of each bar of a bar graph to be displayed on a display unit screen, according to the power level at different frequencies within the spectrum of the audio signal. Pattern data is then produced in correspondence with the determined position, and output data from the CPU is fed via a video display processor to a video RAM, thereby displaying the spectrum by way of a predetermined pattern of a bar graph on the screen. In order to reduce the number of digital data used in FFT operation the input audio signal may be divided into a plurality of different frequency bands so that different sampling frequencies are used for AD conversion of signals of respective bands. As a result, operating time is reduced. To further reduce the operating time the CPU may be arranged to execute parallel operations in various manners. Furthermore, two or more CPUs may be employed to further increase the operating speed.

Solid-state image pickup device

Abstract: PURPOSE:To obtain a signal with high quality through the use of a circuit of low speed, by providing a plurality of signal output lines for a solid-state image pickup element, and picking up output signals at the same time and subjecting to A/D conversion, by decreasing a sampling period and a sampling time width. CONSTITUTION:When a vertical scanning circuit 24 and a horizontal scanning circuit 25 are sequentially driven with adriving pulse signals phiV and phiH, a readout signal is respectively applied to control lines V1-Vm and H1-He. Thus, an output signal of adjacent photo diodes is picked up always at output terminals 22 and 23. When this signal is processed with a sampling signal SP of the same frequency at A/D converters 31 and 32, doubled picture elements can simultaneously be processed. Thus, when the output terminal and the A/D converters are increased in number as each two or three and two or more picture elements can be picked up at the output terminals at the same time, then the amount of information to be processed with the same sampling signal can be increased to N times proportionally.

Signal quality monitoring device

Abstract: The error rate of a signal is monitored by sampling an input signal with a first clock and also with second and third clocks phase delayed in equal but opposite directions with respect to the first clock, and then logically combining the first through third sampled outputs in order to obtain an error signal.

Circuit for digital phase difference measuring and synchronizing between pulse trains

Abstract: A circuit for digitally evaluating the magnitude of the phase error between a reference and a locally generated train (sequence) of pulses. The reference train (sequence) may be, for example, the received horizontal sync pulse in a television receiver and the locally generated synchronizable horizontal trigger of the receiver. The reference pulse train (sequence) contains statistical noise and noise pulses and by multiple phase error sampling (digital) and averaging a much more accurate phase error measurement is obtained. Circuits for directly synchronizing the local trigger generator from the measured phase error are also included.

Method and apparatus for acquiring and tracking a communications signal

Abstract: A receiver is disclosed for acquiring and tracking a data signal in a highly stressed environment. The receiver comprises first and second I.F. sections, a mixer for translation from the first I.F. frequency to the second I.F. frequency, a 2 KHz bandpass filter at the second I.F. frequency, signal translator for synchronous translation of the signal at the second I.F. frequency to baseband, a digitizer for complex sampling operation on the baseband signal, a microprocessor for processing the digital samples, and a numerically controlled oscillator coupled to the mixer and controlled by the microprocessor. The microprocessor formulates matched digital discrete Fourier Transform filters which drive frequency, phase and symbol lock loops at the symbol rate. Each of the loop filters is formed by symbol-rate recursive, first-order equations. A novel mode control system is employed to implement an orderly transition through the receiver modes, comprising (i) out-of-band noise estimation, (ii) coarse frequency and time acquisition of the data signal employing a sequential probability ratio test and a handover process, (iii) frequency and symbol synchronization with the data signal, (iv) phase and symbol synchronization with the data signal, and (v) feedback loop lock confirmation. After loss of lock, the mode controller transfers the receiver operations back to the appropriate restart operation.

Method and system for decoding a digital signal using a variable frequency low-pass filter

Abstract: In a data compression system, a digital signal comprising a series of digital samples and a sampling datum indicating the sampling interval of the digital samples are written into a read-write memory (M2). The digital samples and the associated sampling datum are read out of the memory into first and second digital-to-analog converters (DAC1, DAC2), respectively. The output of the first digital-to-analog converter is applied to a variable frequency low-pass filter (5) to remove the components having frequencies higher than a presettable frequency limit value which is variable as a function of the output of the second digital-to-analog converter so that the cut-off frequency is lower than one-half the sampling frequency to eliminate quantum noise.

Electronic control system for a work implement

Abstract: A tractor control system has a work implement, an actuator for the work implement, an electronic circuit utilizing an analog/digital technique and including an analog/digital control unit and a device for measuring a factor dominating the performance of the actuator and providing a first signal representing the actual value of the control system, a second signal representing a set point value, and a third signal in analog form representing the difference between the values of the first and second signals. The difference constitutes the control deviation for governing the analog/digital control unit which controls the actuator. A converter converts the third signal to digital form by a sampling device for sampling at a sampling frequency f o to establish a dead range in a time dimension. The sampling device provides pulses. A comparator circuit processes the digital signal and includes comparators having limit values defining the dead range set therein. Thus, when the amplitude of the pulses established by the sampling falls outside the dead range one or more times, the sampling device provides a transition to continuous following of the control deviation, thereby performing a requisite control so that when the value of a fourth signal derived from the control deviation falls into the dead range the sampling is repeated.

Apparatus for discriminating a paper-like material

Abstract: An apparatus can discriminate defects such as stains on bank notes by an optical scanner, A/D converter and comparing device. The apparatus comprises an optical scanner (18; 20) for projecting scanning light toward a detection area (30) of the bank note (10) which is being conveyed through the optical scanning device (18; 20); a photoelectric converter (24) for converting an optically scanned signal from the optical scanner (18; 20) into an electric analog signal whose level is substantially in proportion to the level of the optically scanned signal; an analog/ digital converter (26) for converting the electric analog signal into a digital signal; a timing control device (44) for applying sampling pulses to the analog/digital converter (26) so as to produce a sampled digital value from the analog/digital converter (26); a storing device (32; 34; 36; 40) for storing at least a presettable value which is used to discriminate the bank notes; and an arithmetic operation device (28) for performing the arithmetic operation by introducing the sampled digital value and the presettable value so as to discriminate defects in the detection area (30) of the bank notes.

TV video data input apparatus

Abstract: A TV video data input apparatus samples and quantizes a video signal from a TV camera and feeds the quantized data into a computer. The input apparatus is provided with means for generating sampling clocks different from each other while selectively changing over the sampling clocks correspondingly to characteristics of a TV picture. An A/D converting means is driven by the sampling clocks to convert the video signal into digital video data. The output of the A/D converting means is written in a memory. Thus, it is possible to switch over the writing of the video data into a memory having a short access time at a high speed and that into a memory having a long access time at a low speed.

Picosecond signal sampling and multiplication by using integrated tandem light modulators

Abstract: A picosecond signal sampling experiment was performed successfully by using integrated optic technologies. Two interferometric modulators of the traveling-wave and lumped types were integrated in series on a LiNbO 3 crystal surface. The traveling-wave modulator was oprated as a sampling gate activated by an electrical pulse train of 1-GHz repetition from a comb generator, while the lumped one was driven by a 2-GHz CW signal. The aperture time of the gate was estimated about 52 ps from the measurement using the image tube streak camera modified to sinusoidal scan at 1 GHz. Also a signal multiplication experiment was carried out using 100- and 10-MHz CW signals.

Digital signal reproducing apparatus

Abstract: A digital signal reproducing apparatus comprises a reproducing circuit for reproducing a recorded unipolar signal from a recording medium, an equalizer for subjecting the reproduced signal to a waveform equalization, a circuit for extracting a timing component having a period which is equal to one bit transmission period of the recorded unipolar signal from an output signal of the equalizer, a circuit for generating one or a plurality of clock signals which are in phase synchronism with the timing component and for forming one or a plurality of control signals by frequency-dividing the timing component by 1/2, a circuit for sampling and holding a peak value of the output signal of the equalizer for every one bit transmission period, a variable resistor for voltage-dividing the sampled and held signal to obtain a reference signal, a delay circuit for delaying the output signal of the equalizer, a comparing circuit for comparing the levels of the output signal of the delay circuit and the reference signal, and a circuit for producing a reproduced unipolar digital signal by controlling the pulse width and the pulse position of the output pulse signal of the comparing circuit by the one or a plurality of clock signals.

Sampling pulse generator

Abstract: A sampling pulse generator utilizes sampling clocks CLi each having a frequency which corresponds to a character data signal D to be sampled. Each phase of these clocks CLi is progressively and slightly deviated from one another. One of these clocks CLi will be in-phase with the signal D. A feedback signal P1 corresponding to one of these clocks CLi is phase-compared with a clock run-in signal CR which is used as the phase reference of signal D. If signal P1 leads signal CR in phase, the suffix "i" of CLi is incremented, while the suffix "i" is decremented if signal P1 lags in phase behind signal CR. By the change of suffix "i" of clocks CLi, the phase difference between signals P1 and CR is minimized. One of the sampling clocks CLi thus obtained is used as a sampling pulse output SP of the sampling pulse generator which is substantially in-phase with the signal CR or D.

Musical note display device

Abstract: An input audio signal is AD converted into digital data which is processed by a central processing unit (CPU) in which Fast Fourier Transform (FFT) operation and power spectrum calculation are effected. Furthermore, spectrum data obtained in this way is processed to obtain a fundamental tone to determine the pitch of each sound of the input audio signal. After the pitch is determined, data indicative of a given pattern is produced so that a musical note is indicated at an appropriate position on a staff displayed on a screen of a display unit. Such data from the CPU is fed via a video display processor to a video RAM to be stored therein where the video display processor produces a video signal fed to the display unit in turn. Since the fundamental tone does not necessarily have the highest level within the spectrum of the input audio signal, various ways for accurate determination of the pitch are used. Furthermore, a reference pitch preset in the musical note display device may be changed so as to be equal to a reference pitch emitted from a musical instrument or the like by changing sampling frequency of sampling pulses fed to an AD converter.

Receiver mode control for acquiring and tracking a signal

Abstract: A receiver is disclosed for acquiring and tracking a data signal in a highly stressed environment. The receiver comprises first and second I.F. sections, a mixer for translation from the first I.F. frequency to the second I.F. frequency, a 3 KHz bandpass filter at the second I.F. frequency, signal translator for synchronous translation of the signal at the second I.F. frequency to baseband, a digitizer for complex sampling operation on the baseband signal, a microprocessor for processing the digital samples, and a numerically controlled oscillator coupled to the mixer and controlled by the microprocessor. The microprocessor formulates matched digital discrete Fourier Transform filters which drive frequency, phase and symbol lock loops at the symbol rate. Each of the loop filters is formed by symbol-rate recursive, first-order equations. A novel mode control system is employed to implement an orderly transition through the receiver modes, comprising (i) out-of-band noise estimation, (ii) coarse frequency and time acquisition of the data signal employing a sequential probability ratio test and a handover process, (iii) frequency and symbol synchronization with the data signal, (iv) phase and symbol synchronization with the data signal, and (v) feedback loop lock confirmation. After loss of lock, the mode controller transfers the receiver operations back to the appropriate restart operation.

Method and system for data compression by variable frequency sampling

Abstract: A data compression system comprises an analog-to-digital converter for quantizing the analog signal at a first sampling frequency into a series of digital samples and a memory for storing the digital samples. A control circuit generates a sampling datum indicating a variable sampling frequency lower than the first sampling frequency as a function of the instantaneous frequency of the analog signal for selecting digital samples from the memory, reads the selected digital samples out of the memory means in response to the sampling datum, and forms the sampling datum and the selected digital samples into a data set. A series of data sets may be transmitted to a receiving end of the system or stored in a recording medium. The sampling datum is used to indicate the point at which the digital sample is converted to a corresponding analog value.

Receiver for a data transmission modem, comprising an echo canceller and an equalizer

Abstract: A receiver used in a data transmission modem having a receive path containing a baseband signal and clock signal, and a transmit path. An echo canceller is employed having a transversal filter connected to the transmit path for generating a synthetic echo signal. A self-adaptive equalizer includes a transversal filter connected to receive a data signal from the receive path. Subtracting means subtract the signals from the echo canceller and equalizer from the baseband signal in the receive path. The subtracting means output is sampled at a sampling rate which satisfies the Shannon criteria with respect to a transmit signal in the transmit path. The filter coefficients are controlled in response to the sampled signal. The second and third clocking signals for the echo canceller and transversal filter and self-adaptive equalizer transversal filter are derived from recovered clock signals. Circuit means are connected to the sampling circuit output for deriving first and second error signals for controlling the coefficients of the transversal filters of the echo canceller and self-adaptive equalizer.

Filtered Manchester Coded PSK transmission system

Abstract: A system for digital transmission includes an active pulse forming network to convert a digital data signal into a Manchester Coded PSK format. A low pass filter network is provided to transform the Manchester Coded signal for transmission over a bandlimited wireline channel. The receiver includes a low pass filter and a bandpass filter that combine to form an overall bandpass filter response for receiving the output of the wireline channel. The transmitter low pass filter and the receiver bandpass filter combine to transform the Manchester Coded PSK data signal into a quasi-raised cosine signal that has the digital data signal coded therein. A timing recovery circuit is included that extracts a timing signal from the quasi-raised cosine signal to provide a coherent timing signal such that the quasi-raised cosine signal can be sampled and the digital data signal reconstructed. The timing recovery circuit delays the quasi-raised cosine signal and multiplies it by the reconstructed digital data signal and the product signal thereof is half-wave rectified and input to a phase lock loop which locks onto the signal to provide a reconstructed timing signal to drive a sampling circuit.

Method and means for real time image zoom display in an ultrasonic scanning system

Abstract: Real time image zoom is obtained by sampling electrical signals corresponding to reflected ultrasonic waves at a sampling frequency whereby display data is obtained only in an area of interest. The sampling is delayed to eliminate signals from areas not of interest. Ultrasonic pulse repetition rate is selected so that internal resolution in the area of interest is optimized.

Digital data detecting apparatus

Abstract: A digital data detecting apparatus comprises means (13) for sampling an input digital signal at a frequency which is M times (M is greater than 1) higher than a channel bit rate of the input digital signal, means (15) responsive to two adjacent sampled values for computing an interval from a point where the digital signal intersects a reference level to a sampling time, and means (34) responsive to an output from the computing means (15) for generating a data detecting signal for detecting data of the digital signal.

Apparatus for recording and reproducing a digital signal

Abstract: An apparatus for reproducing a digital signal recorded on a recording medium in the form of successive data blocks, in which each data block includes at least plural data words and a block address circulating with a predetermined phase relation to a certain reference signal. In accordance with the reference signal, a control signal is recorded on the recording medium. The control signal is reproduced from the recording medium and a reference phase signal with a frequency of an integral multiple of more than twice the frequency of the control signal is sampled by the control signal, and a phase comparison output and a lock mode signal are generated from the sampling output. The running phase of the recording medium is controlled by the phase comparison output whereby the fluctuation of running speed of the recording medium due to discontinuities of the control signal can be suppressed. Further, by the lock mode signal, it becomes easy to change the phase of a block address which will be added to a newly recordable digital signal.

Reduced data rate signal separation system

Abstract: @ The signal separation arrangement separates frequency interleaved signal components of a video signal one of which is modulated as a double sideband modulated component of a subcarrier frequency. A video signal is sampled by a digital-to-analog converter (10). The resultant signal samples are applied to a bandpass filter (12). The bandpass filter produces a filtered signal restricted to a given passband of the original video band over which the double-sideband-modulated component is modulated. The filtered information in the passband is comb-filtered by a comb filter (20) operating on selected ones of the bandpass-filtered samples in response to a subsampling clock signal. The subsampling clock frequency is less than or equal to the subcarrier frequency. The comb filter comprises a shift register (22) and a signal combining circuit (24). Comb filtered samples, produced at the subsampling clock rate, correspond to one of the interleaved signal components.

Circuit for reducing errors in a data receiver

Abstract: In a data receiver, a complex data signal after demodulation and sampling is applied to an equalizer which provides an improved signal which is applied to a phase and amplitude correction circuit for correction utilizing a complex reference vector. The corrected signal is applied to a decision circuit the input and output of which are applied to a difference determinator circuit, the output of which is a complex residual error signal utilized in conjunction with a plurality of gain factors generated in a gain factors generator to determine the reference vector. The gain factors vary in time from transmission initialization such that optimal compensation for transmission disturbances is achieved both at initialization and after stabilization.

Speed controller for elevator

Abstract: PURPOSE:To obtain an accurate speed signal over the entire speed range of a motor by counting the number of pulses while a motor is rotating at a high speed, measuring the interval of the pulses during the low speed rotation as a speed signal. CONSTITUTION:When an armature 3 rotates, a speed pulse 8a from a pulse generator 8 is outputted. A counter 12 counts the number of speed pulses 8a in a sampling period T1 indicated by a sampling pulse 24a, and outputs a speed signal 12a. A counter 14 counts the number of pulses 13a in the time T2 during the speed pulse 8a and outputs a speed signal 14a. A central processing unit 20 calculates a deviation signal between the speed command signal and the speed signal 12a when the armature 3 rotates at a high speed and a deviation signal between the speed command signal and the speed signal 14a when rotating at a low speed, and produces an output through a converter 23 to a phase control circuit 25.

Automatic drift correction

Abstract: Drift in the zero or datum reference point of a circuit (such as that forming part of a measuring device) is corrected by sensing the rate of change of the signal provided by the circuit and distinguishing between a rate of change characteristic of that due to a valid signal indicative of a measurement and a rate of change characteristic of that due to drift in the circuit. In one embodiment, a window comparator 18 senses the rate of change of the signal output from circuit 10 by periodically sampling in sample/ hold 16 and then comparing with the current value of the signal. A signal circulating path 20, 21, 22 holds a drift compensating value which is updated when comparator 18 senses a rate of change below a threshold value which is indicative of drift in circuit 10. The drift compensating value is added to the signal from circuit 10 in summing amplifier 15 thereby correcting the signal for drift.

Data communications receiver operable in highly stressed environments

Abstract: A receiver is disclosed for acquiring and tracking a data signal in a highly stressed environment. The receiver comprises first and second I.F. sections, a mixer for translation from the first I.F. frequency to the second I.F. frequency, a 2 KHz bandpass filter at the second I.F. frequency, signal translator for synchronous translation of the signal at the second I.F. frequency to baseband, a digitizer for complex sampling operation on the baseband signal, a microprocessor for processing the digital samples, and a numerically controlled oscillator coupled to the mixer and controlled by the microprocessor. The microprocessor formulates matched digital discrete Fourier Transform filters which drive frequency, phase and symbol lock loops at the symbol rate. Each of the loop filters is formed by symbol-rate recursive, first-order equations. A novel mode control system is employed to implement an orderly transition through the receiver modes, comprising (i) out-of-band noise estimation, (ii) coarse frequency and time acquisition of the data signal employing a sequential probability ratio test and a handover process, (iii) frequency and symbol synchronization with the data signal, (iv) phase and symbol synchronization with the data signal, and (v) feedback loop lock confirmation. After loss of lock, the mode controller transfers the receiver operations back to the appropriate restart operation.

Scan tracking apparatus for helical scan video tape recorder

Abstract: A scan tracking apparatus for a helical scan tape recorder, comprising a movable tape head (11), a detector (13) detecting the envelope of the tape signal to produce a reproduced signal, sampling means (15) for sampling the reproduced signal at fixed points of the helical scan, memory (17) for storing the reproduced signal and correction signals from different tracks of the helical scan, computation means (2) for computing a correction signal to return the tape head to the center of the track, a sawtooth generator (2, 4) for producing a signal related to the tape speed (v), and a head driving mechanism (9) for moving the tape head in response to the sawtooth and correction signals.

Digital phase detection based on in-phase and quadrature sampling

Abstract: A simple and efficient algorithm of digital phase detection is presented. From data sampled at two instants of time separated by a quarter of the signal period an estimate of phase and magnitude can be obtained. The additional use of coherent averaging improves the accuracy of phase detection in signals with poor signal-to-noise ratio. A system implementation of the algorithm and error caused by the harmonics of the measured signal is discussed.