Showing papers on "Sampling (signal processing) published in 2002"

A nonlinear adaptive method of elimination of power line interference in ECG signals

Abstract: A new method of elimination of power line noise in electrocardiogram signals is presented. The proposed method employs, as its main building block, a recently developed signal processing algorithm capable of extracting a specified component of a signal and tracking its variations over time. Design considerations and performance of the proposed method are presented with the aid of computer simulations. Superior performance is observed in terms of effective elimination of noise under conditions of varying powerline interference frequency. The proposed method presents a simple and robust structure which complies with practical constraints involved in the problem such as low computational resource availability and low sampling frequency.

System and method for spectrum management of a shared frequency band

Abstract: A system and method for managing the spectrum utilization of a frequency band that is shared, both in frequency and time, by multiple devices. At one or more devices operating in the frequency band, pulses associated with signals occurring in the frequency band are detected by sampling part or all the frequency band for a time interval. From the detected signal pulses, the signals can be classified. In addition, overall spectrum activity can be measured. Using classification information for signals detected in the frequency band, policies can be executed so that a device may take certain actions in order to avoid interfering with other signals, or to optimize simultaneous use of the frequency band with the other signals. Signal detection occurs at one or more devices operating in a frequency band. Signal classification and measurement, as well as policy execution may occur within a processor of the same device where signal detection occurs, or in another device (located remotely or within the operating region of the frequency band).

High-resolution signal processing for a switch antenna array FMCW radar with a single channel receiver

Abstract: Standard high resolution array processing techniques are based on simultaneous sampling of the whole multiple sensor array and, hence, require that the number of receivers should be equal to the number of receiving antennas. A switch antenna array FMCW radar system is introduced as a promising substitute for the multiple-channel array due to its lower cost and a simpler front-end circuitry. New high-resolution signal processing algorithms for the system composed of a single transmitter, m receiving antennas, and a single receiving channel are based on the new nonstationary version of the Capon (1969) beamforming. Simulation demonstrates that the new algorithms yield very good performance in terms of both estimation accuracy and multiple-target resolution. These algorithms give better estimation than the MUSIC algorithm even for the case of slow moving targets.

Apparatus for data recovery in a synchronous chip-to-chip system

Abstract: An apparatus that reduces sampling errors for data communicated between devices uses phase information acquired from a timing reference signal such as a strobe signal to align a data-sampling signal for sampling a data signal that was sent along with the timing reference signal. The data-sampling signal may be provided by adjustably delaying a clock signal according to the phase information acquired from the strobe signal. The data-sampling signal may also have an improved waveform compared to the timing reference signal, including a fifty percent duty cycle and sharp transitions. The phase information acquired from the timing reference signal may also be used for other purposes, such as aligning received data with a local clock domain, or transmitting data so that it arrives at a remote device in synchronism with a reference clock signal at the remote device.

Emotion recognition method and device

Abstract: Emotion recognition is performed by extracting a set comprising at least one feature derived from a signal, and processing the set of extracted feature(s) to detect an emotion therefrom. The voice signal is low pass filtered prior to extracting therefrom at least one feature of the set. The cut-off frequency for the low pass filtering is typically centered around 250 Hz. The features are e.g. statistical quantities extracted from sampling a signal of the intensity or pitch of the voice signal.

An on-chip 100 GHz-sampling rate 8-channel sampling oscilloscope with embedded sampling clock generator

Abstract: An on-chip 8-channel sampling oscilloscope macro for signal integrity checking uses a 0.13 /spl mu/m CMOS process. It contains a phase-interpolated sampling clock generator for 100GHz sampling, charge-sharing sampling heads, and ESD-tolerant decoupling capacitors for noise-immune measurement.

Radio base station receiver having digital filtering and reduced sampling frequency

Abstract: A station for processing a first signal which can be generated by a mobile terminal and belongs to a plurality of signals for mobile radio communications networks. The stations include an input able to receive from an antenna the first signal associated with a first band and at least one adjacent signal of said plurality associated with a second band adjacent to that of the first signal; a processing stage for generating from the first digital signal at a first sampling frequency, this first digital signal including a useful spectral content of the first signal and an interfering spectral content associated with the adjacent signal; a digital filter for processing the first digital signal, attenuating the interfering spectral content, and for providing a filtered digital signal including at least part of the useful special content sampled at a second sampling frequency less than the first sampling frequency and an electro-optical converter for generating from the filtered digital signal electromagnetic radiation to be transmitted on a waveguide.

Circuit Techniques for Low-Voltage and High-Speed A/D Converters

Abstract: 1. Introduction. 2. Low Voltage Issues. 3. Sample-and-Hold Operation. 4. A/D Converters. 5. S/H Circuit Architectures. 6. Sampling with a MOS Transistor Switch. 7. Operational Amplifiers. 8. Clock Generation. 9. Double-Sampling. 10. Switched OpAmp Technique. 11. Other Low-Voltage Techniques. 12. Prototypes and Experimental Results. 13. Conclusions. Appendices: Derivation of OTA GBW Requirement. Optimum Input Capacitance. Saturation Voltage.

A simple adjustable window algorithm to improve FFT measurements

Abstract: The Fourier spectrum of a periodic signal may be obtained by fast Fourier transform algorithms, but, as is well known, special care must be taken to avoid severe distortions introduced by the sampling process. The main problem is the leakage generated by the truncation required to obtain a finite length sampled data. The usual procedure to reduce leakage is to multiply the sampled signal by a weighting window. Several kinds of windows have been proposed in the literature, and today they are also included in many commercial instruments. A simple alternative procedure is proposed in this paper. It is implemented with a PC compatible data acquisition board (DAQ) and consists of an algorithm that uses decimation and interpolation techniques. This algorithm is equivalent to the use of an adjustable sampling frequency and correspondingly an adjustable window size. Results obtained by this method on both harmonic and polyharmonic signals are empirically analyzed and compared with those given by an instrument with built-in FFT capabilities.

A 4-GHz effective sample rate integrated test core for analog and mixed-signal circuits

Abstract: An area-efficient and robust integrated test core for mixed-signal circuits is described. The core consists of a completely digital implementation, except for a simple reconstruction filter and a comparator. It is capable of both generating arbitrary band-limited waveforms (for excitation purposes) and coherently digitizing arbitrary periodic analog waveforms (for DSP-based test and measurement). Several prototypes were fabricated in a triple-metal 3.3-V 0.35-/spl mu/m CMOS process, and were demonstrated to perform various curve tracing, oscilloscope, and spectrum analysis tasks at a clock rate of 20 MHz (limited by our experimental setup). Designed for 8 bits of quantization, a spurious-free dynamic range (SFDR) of 65 dB at 500 KHz and 61 dB at Nyquist (20.001 MHz) was demonstrated using our prototypes. High-frequency narrow-band signals (extending into the gigahertz range) have been captured through subsampling and the use of a high-bandwidth front-end sampling network. Similarly, circuit phenomena that are broadband in nature were measured by using a delayed-clock subsampling mechanism in which the digitizer sample clock is consistently delayed over multiple runs of the periodic test signal. Delaying the clock is performed using a voltage-controlled delay line tuned by a self-biased delay-locked loop, which allowed for a timing resolution of about one gate delay (/spl sim/200 ps). The proposed test core occupies an area equivalent to only about 7000 standard-cell 2-input NAND gates.

Solid state image sensor and video system using the same

Abstract: A solid state image sensor includes an area sensor section having photoelectric conversion pixels arranged in the form of a matrix, a pixel selection section for selecting a pixel of the area sensor section and reading out a video signal, an analog signal processor section for performing signal processing for the video signal, an analog-digital conversion section for converting the processed signal into a digital signal, a digital signal processor section for performing signal processing to convert the digital signal into a digital signal having a predetermined signal format, and an interface section which operates in accordance with an external command, and has the function of selecting a video signal obtained by digitizing a pixel or a signal obtained by performing processing for the luminance and color difference signals of the video signal. These sections are mounted on a single chip.

Low cost system and method for making dual band GPS measurements

Abstract: A low-cost, solid-state position sensor system suitable for making precise code and carrier phase measurements in the L1 and L2 bands of GPS uses an ordinary, low-cost OEM card single-frequency carrier phase tracking C/A code receiver and includes low-cost hardware for sensing the L1 and L2 components of GPS carrier phase. Such measurements are suitable for general use in a variety of fields, including surveying. They are also of sufficient quality to be used in controlling heavy machinery, such as aircraft, farm tractors, and construction and mining equipment. A C/A code continuous tracking GPS receiver is used to produce GPS positioning fixes and real-time L1 carrier phase measurements. This C/A code receiver generates timing and reference information for a digital sampling component. This sampling component processes the L1 and L2 signals from the GPS signals in view. A digital signal processing component coupled to this sampling component processes the raw samples in synchronous, batch form including a step to precisely unwrap the P(Y) carrier phase to baseband. The receiver outputs synchronous, carrier phase measurements associated with each ranging source and signal observable. The synchronous raw carrier phase measurements from the continuous tracking C/A code receiver and the digital sampling component may be used to resolve the cycle ambiguities to each ranging source with respect to a reference station at a known location. Within a short interval typically tens of seconds from initial turn on, continuous, synchronous raw measurements are provided by the GPS receiver and processed into precise position fixes.

Averaged Q-factor method using amplitude histogram evaluation for transparent monitoring of optical signal-to-noise ratio degradation in optical transmission system

Abstract: Presents the averaged Q-factor method based on an amplitude histogram evaluation to monitor the optical signal quality of an optical transmission system. We examine several parameters of this method and provide direction to design a novel optical signal quality monitoring circuit.

Digital receiver capable of processing modulated signals at various data rates

Abstract: A digital receiver is enabled to process modulated signals at various data rates including a sampling circuit for receiving modulated signals and outputting digitalized sampled signals, a matched filter for expelling noise from digitalized sampled signals at a first data rate and at a second data rate and generating in-phase and quadrature-phase signals, a barker code correlator for depreading digitalized sampled signals at first data rate, a channel equalizer which counteracts co-channel interferences by using equalizer coefficients obtained from a plurality of noise whitening coefficients so as to generate a sequence of symbol decisions therefrom, a CCK correlator coupled to the channel equalizer for decoding signals at the second data rate and at a third data rate, a first quantization filter for recovering transmitted signals at the first data rate, and a second quantization fitler for recovering transmitted signals at the second data rate and at the third data rate.

Adaptive method and apparatus for transmission line analysis

Abstract: A method and system for performing sequence time domain reflectometry to determine the location of line anomalies in a communication channel is disclosed. In one embodiment, the system generates a sequence signal and transmits the sequence signal over a channel. The system receives one or more reflection signals, and performs reflection signal processing on the reflection. In one embodiment, the reflection signal is correlated with the original sequence signal to generate a correlated signal. The system determines a time value between the start of the reflection signal and the subsequent points of correlation to determine a location of a line anomaly. In one embodiment preprocessing and post-processing occurs to counter the effects of a communication device, such as a DMT modulator/demodulator. In one embodiment sampling of the sequence and reflection signal may occur at different times or at a different phase to provide greater resolution of the line anomaly location.

Delta operator digital filters for high performance inverter applications

Abstract: Most infinite impulse response (IIR) digital filter implementations in power electronic inverter applications are based on the time shift operator q and its associated z-transform. But for higher sampling frequencies where the sample period approaches zero for z-transform discrete systems, their dynamic response does not converge smoothly to the continuous counterpart, causing substantial implementation problems. In contrast, the response of filters based on the delta operator does converge to the continuous counterpart for smaller sample periods, and hence they are much better suited for digital control applications where sampling frequencies are much higher than the system poles. This paper presents a practical overview describing the use of the delta operator for IIR digital filter systems, and shows how the operator can be used in power electronic inverter applications to achieve substantial performance benefits compared to equivalent shift-based implementations. A transformation is presented to convert shift-based implementations to the delta form, and the specific examples of an active filter and a P+ resonant current regulator are used to illustrate the improvements that can be expected. The superior performance of the delta operator for digital control of inverter applications has been verified in both simulation and experiment.

Spatial processing and timing estimation using a training sequence in a radio communications system

Abstract: A method and apparatus are provided that performs spatial processing, timing estimation and frequency offset using a training sequence of a received burst. According to one aspect of the present invention, the invention includes receiving a burst having a known training sequence at a set of diversity antennas, sampling the received burst at each antenna, determining a coarse timing estimate for samples from at least one antenna, and determining a spatial weighting vector using the coarse timing estimate. The embodiment further includes applying the spatial weighting vector to the received burst samples for each antenna to form a single channel signal, determining a fine timing estimate for the single channel signal, determining a second spatial weighting vector using the fine timing estimate, applying the second spatial weighting vector to the received burst samples for each antenna to form a second single channel signal, and demodulating the second single channel signal.

Low capacitance, low kickback noise input stage of a multi-level quantizer with dithering and multi-threshold generation for a multi-bit sigma-delta modulator

Abstract: An N-level quantizer circuit (14) has an analog input terminal and N-1 digital output terminals, and includes a sampling circuit (SW samp) coupled to the input terminal for providing a sampled input voltage signal; at least one preamplifier stage (14A) for converting the sampled input voltage signal to a current signal and providing an amplified sampled input signal; and N-1 comparator stages (14B) each having an input coupled to an output of the at least one preamplifier stage (14A) and sharing the input current equally. Individual ones of the N-1 comparator stages (14B) operate to compare the amplified sampled signal to an associated one of N-1 reference signals. The quantizer (14) further includes N-1 latches (14C), individual ones of which latch an output state of one of the N-1 comparators and have an output coupled to one of the N-1 digital output terminals of the quantizer circuit (14).

Data reproducing device

Abstract: PROBLEM TO BE SOLVED: To provide a data reproducing device, by which the phase between a clock and a reproduction signal is synchronized even in the low S/N ratio and also a synchronizing signal, etc., are exactly detectable. SOLUTION: In the data reproducing device for sampling a reproducing signal by a synchronizing clock of the reproduced signal, this data reproducing device is provided with an A/D conversion means for converting an analog reproduced signal to a digital signal, an interpolation means for interpolating the digital signal converted by the A/D conversion means so as to become the digital signal sampled by the clock having a frequency of n times the frequency of the sampling clock, an optimum phase detection means for detecting the phase difference from an optimum phase between the synchronizing clock and the reproduced signal, a phase correction means for correcting the phase in accordance with the above phase difference detected by the optimum phase detection means, and a lead of information data detection means for detecting the lead of information data in accordance with the phase difference detected by the optimum phase detection means. COPYRIGHT: (C)2004,JPO

A micropower low-distortion digital pulsewidth modulator for a digital class D amplifier

Abstract: We describe the design of a micropower digital pulsewidth modulator (PWM) for a hearing instrument class D amplifier. The PWM embodies a novel delta-compensation (/spl delta/C) sampling process and a novel pulse generator. The /spl delta/C process is sampled at the same low rate as reported algorithmic sampling processes and it features a similar low total harmonic distortion (THD). Its arithmetic computation is however, substantially simplified. We analytically derive the double Fourier series expression for the /spl delta/C process and show that the THD is low. The pulse generator is based on a hybrid 9-b counter 3-b tapped-delay-line. We investigate the compromise between the different design parameters that affect its power dissipation and THD. The complete proposed PWM features a simple circuit implementation (small IC area), micropower low voltage operation (/spl sim/22.1 /spl mu/W at 1.1 V), low sampling rate (48 kHz) and low harmonic distortion (/spl sim/0.2%), thereby rendering it suitable for a practical digital hearing instrument. We verify our design by means of computer simulations and on the basis of experimental measurements.

A twofold modulation frequency laser range finder

Abstract: The purpose of this paper is to present the conception of a twofold modulation frequency laser range finder. The system is based on the phase-shift measurement method with two modulation frequencies, one giving the distance within a wide range and a second one leading to high resolution measurement. The measurement method is based on intermediate frequency sampling associating the under-sampling technique with digital synchronous detection. Its main advantage is a global simplification of the electronic system, leading to a quite simple development and low cost system. There is only one phase-shift measurement stage but the twofold modulation frequency is possible thanks to the heterodyne technique. The emission and detection parts are designed for wideband operation and are digitally controlled. The whole system has been designed with only one digital phase locked loop reducing the phase noise and improving the resolution. Because of the global structure and the different digitally controlled parts the necessary calibration process could be introduced. From the design of the prototype it is possible to move towards a smart laser range finder.

Optimal control for systems with varying sampling rate

Abstract: The paper addresses the aspects of control of real time systems with varying sampling rate. An example is given in which a stable continuous system is sampled at two different sampling rates. Two controllers are designed to minimize the same continuous quadratic loss function with the same weights. It is shown that although the design leads to stable controlled closed loop systems, for both discretizations, the resulting system can be unstable due to variations in sampling rate. To avoid that problem, we suggest an optimal controller design in which a bound on the cost, for all possible sampling rate variations, is computed. This results in a piecewise constant state feedback control law and guarantees stability regardless of the variations in sampling rate. The controller synthesis is cast into an LMI, which conveniently solves the synthesis problem. To illustrate the procedure, the introduction example is revised using the proposed LMI synthesis method and the stable control law is given, which is robustly stable against variations in sampling rate.

Direct radio frequency (RF) sampling with recursive filtering method

Abstract: A radio receiver 2000 with a sampling mixer 1100 for creating a discrete-time sample stream by directly sampling an RF current with history and rotating capacitors 1111 and 1112, wherein the accumulated charge on the rotating capacitors is read-out to produce a sample. The mixer provides immunity to noise glitches by predicting the occurrence of the glitch (or detecting a significant difference between observed and predicted samples) and creating corrected samples for the corrupted samples. These corrected samples can be created with special circuitry 1933 (digital) or in the mixer 1100 (analog).

Broadband receiver having a multistandard channel filter

Abstract: A television (TV) receiver includes a multi-standard channel filter with a programmable intermediate frequency adapted to receive television signals in a variety of television standards and formats. In one embodiment, a receiver includes a tuner and a channel filter. The tuner receives input RF signals encoding information in one of a number of formats and converts the input RF signals to intermediate signals having an intermediate frequency (IF). The intermediate signals are coupled to the channel filter. The channel filter includes an anti-aliasing filter for filtering the intermediate signals, an analog-to-digital converter for sampling the filtered intermediate signals and generating a digital representation thereof, and a signal processor for processing the digital representation of the intermediate signals in accordance with the format of the input RF signal. The signal processor generates digital output signals indicative of information encoded in the input RF signal.

Single ended clock signal generator having a differential output

Abstract: Embodiments of the present invention provide for generating a sampled differential pattern signal with reduced jitter. In one embodiment of the present invention, a seed frequency generator provides a differential seed frequency signal. The differential seed frequency signal is converted to a single ended seed frequency signal by a differential-to-single ended converter. The pattern generation logic utilizes the single ended seed frequency signal to generate single ended pattern signals. Single ended-to-differential samplers then generate a sampled differential pattern signal by sampling the single ended pattern signal according to the differential seed frequency signal.

Asynchronous sample rate converter and method

Abstract: An asynchronous sample rate converter interpolates and filters a digital audio input signal to produce a filtered, up-sampled first signal. A FIFO memory receives the first signal and stores samples thereof at locations determined by a write address and presents stored samples from locations determined by a read address. The presented samples are passed through an interpolation and resampling circuit to produce a continuous-time signal which is re-sampled to produce a signal that is up-sampled relative to a desired output. That signal then is filtered and down-sampled to produce the output signal. Sample rate estimating circuitry computes a difference signal representative of a time at which a data sample of the audio input signal is received and a time at which a corresponding audio output sample is required, and address generation circuitry generates the read and write addresses. A coefficient calculation circuit calculates filter coefficients for the interpolation and resampling circuit in response to the difference signal.

Clock skew compensation for a jitter buffer

Abstract: A method and system to minimize the potential of jitter buffer underflow/overflow resulting from a difference in sampling rates of an audio encoder and an audio decoder are disclosed herein. The difference in sampling rates, or clock skew, can be determined from a difference between an actual amount of data stored in a jitter buffer and the desired, or threshold, amount. A subset of packets from a sequence of packets output to the audio decoder can be altered to compensate for the clock skew, whereby the amount of data associated with the subset of packets is decreased when the sampling rate of the encoder is greater than the sampling rate of the decoder, and the amount of data is increased when the sampling rate of the encoder is less than the sampling rate of the decoder. The present invention finds particular advantage in providing audio data via a packet-switched network.