Showing papers on "Sampling (signal processing) published in 2006"

Photonic signal processing of microwave signals

Abstract: Photonic signal processing offers the prospect of realizing extremely high multigigahertz sampling frequencies, overcoming inherent electronic limitations. This stems from the intrinsic excellent delay properties of optical delay lines. These processors provide new capabilities for realizing high time-bandwidth operation and high-resolution performance. In-fiber signal processors are inherently compatible with fiber-optic microwave systems and can provide connectivity with built-in signal conditioning. Fundamental principles of photonic signal processing, including sampling, tuning, and noise, are discussed. Structures that can extend the performance of photonic signal processors are presented, including methods for improving the filter shape characteristics of interference mitigation filters, techniques to increase the stopband attenuation of bandpass filters, and methods to achieve large free spectral range. Several photonic signal processors, including high-resolution microwave filters, widely tunable filters, arbitrary waveform generators, and fast signal correlators, are discussed. Techniques to solve the fundamental noise problem in photonic signal processors are described, and coherence-free structures for few-tap notch filters are discussed. Finally, a new concept for realizing multiple-tap coherence-free processor filters, based on a new frequency-shifting technique, is presented. The structure not only eliminates the phase-induced intensity noise limitation, but can also generate a large number of taps to enable the achievement of processors with high performance and high resolution.

A Digital Current-Mode Control Technique for DC–DC Converters

Abstract: The objective of this paper is to propose a simple digital current mode control technique for dc-dc converters. In the proposed current-mode control method, the inductor current is sampled only once in a switching period. A compensating ramp is used in the modulator to determine the switching instant. The slope of the compensating ramp is determined analytically from the steady-state stability condition. The proposed digital current-mode control is not predictive, therefore the trajectory of the inductor current during the switching period is not estimated in this method, and as a result the computational burden on the digital controller is significantly reduced. It therefore effectively increases the maximum switching frequency of the converter when a particular digital signal processor is used to implement the control algorithm. It is shown that the proposed digital method is versatile enough to implement any one of the average, peak, and valley current mode controls by adjustment of the sampling instant of the inductor current with respect to the turn-on instant of the switch. The proposed digital current-mode control algorithm is tested on a 12-V input and 1.5-V, 7-A output buck converter switched at 100kHz and experimental results are presented

Robust and high-quality time-domain audio watermarking based on low-frequency amplitude modification

Abstract: This work proposes a method of embedding digital watermarks into audio signals in the time domain. The proposed algorithm exploits differential average-of-absolute-amplitude relations within each group of audio samples to represent one-bit information. The principle of low-frequency amplitude modification is employed to scale amplitudes in a group manner (unlike the sample-by-sample manner as used in pseudonoise or spread-spectrum techniques) in selected sections of samples so that the time-domain waveform envelope can be almost preserved. Besides, when the frequency-domain characteristics of the watermark signal are controlled by applying absolute hearing thresholds in the psychoacoustic model, the distortion associated with watermarking is hardly perceivable by human ears. The watermark can be blindly extracted without knowledge of the original signal. Subjective and objective tests reveal that the proposed watermarking scheme maintains high audio quality and is simultaneously highly robust to pirate attacks, including MP3 compression, low-pass filtering, amplitude scaling, time scaling, digital-to-analog/analog-to-digital reacquisition, cropping, sampling rate change, and bit resolution transformation. Security of embedded watermarks is enhanced by adopting unequal section lengths determined by a secret key.

A 20-mW 640-MHz CMOS continuous-time ΣΔ ADC with 20-MHz signal bandwidth, 80-dB dynamic range and 12-bit ENOB

Abstract: A wide bandwidth continuous-time sigma-delta ADC, operating between 20 and 40 MS/s output data rate, is imple- mented in 130-nm CMOS. The circuit is targeted for applications that demand high bandwidth, high resolution, and low power, such as wireless and wireline communications, medical imaging, video, and instrumentation. The third-order continuous-time mod- ulator comprises a third-order RC operational-amplifier-based loop filter and 4-bit internal quantizer operating at 640 MHz. A 400-fs rms jitter LC PLL with 450-kHz bandwidth is integrated, generating the low-jitter clock for the jitter-sensitive contin- uous-time ADC from a single-ended input clock between 13.5 and 40 MHz. To reduce clock jitter sensitivity, nonreturn-to-zero (NRZ) DAC pulse shaping is used. The excess loop delay is set to half the sampling period of the quantizer and the degradation of modulator stability due to excess loop delay is avoided with a new architecture. The ADC achieves 76-dB SNR, 78-dB THD, and a 74-dB SNDR or 12 ENOB over a 20-MHz signal band at an OSR of 16. The power consumption of the CT modulator itself is 20 mW and in total the ADC dissipates 58 mW from the 1.2-V supply. Index Terms—Analog-to-digital conversion, CMOS analog inte- grated circuits, continuous-time modulation, continuous-time filters, delta-sigma modulation, low-pass filter, low power design, low-voltage design, multibit internal quantization, sigma-delta modulation.

A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process

Abstract: A high-speed 4b flash ADC in 90nm digital CMOS is presented that uses a dynamic offset-compensation scheme in its comparators. It achieves a sampling rate of 1.25GS/s with 3.7 ENOB (23.8dB SNDR) from dc to Nyquist while consuming 2.5mW. It has an energy per conversion step of 0.16pJ

Time-interleaved analog-to-digital converters: status and future directions

Abstract: We discuss time-interleaved analog-to-digital converters (ADCs) as a prime example of merging analog and digital signal processing. A time-interleaved ADC (TI-ADC) consists of M parallel channel ADCs that alternately take samples from the input signal, where the sampling rate can be increased by the number of channels compared to a single channel. We recall the advantages of time interleaving and investigate the problems involved. In particular, we explain the error behavior of mismatches among the channels, which distort the output signal and reduce the system performance significantly, and provide a concise framework for dealing with them. Based on this analysis, we review the principle possibilities of calibrating TI-ADCs, where we point out the necessities and advantages of digital enhancement. To this end, we discuss open issues of channel mismatch identification as well as channel mismatch correction.

A 14-bit 125 MS/s IF/RF Sampling Pipelined ADC With 100 dB SFDR and 50 fs Jitter

Abstract: This paper describes a 14-bit, 125 MS/s IF/RF sampling pipelined A/D converter (ADC) that is implemented in a 0.35mum BiCMOS process. The ADC has a sample-and-hold circuit that is integrated in the first pipeline stage, which removes the need for a dedicated sample-and-hold amplifier (i.e., "SHA-less"). It also has a sampling buffer that is turned off during the hold clock phases to save power. To accurately estimate and minimize the clock jitter, a new jitter simulation technique was used whose results were verified on silicon. The measured silicon results indicate the highest published IF sampling performance to date and prove the viability of the "SHA-less" architecture for IF/RF sampling ADCs. The ADC is calibration-free and achieves a DNL of less than 0.2 LSB and INL of 0.8 LSB. The SNR is 75 dB below Nyquist, and stays above 71 dB up to 500 MHz. The low-frequency SFDR is about 100 dB, and stays above 90 dB up to about 300 MHz. This is also the first ADC to achieve 14-bit level performance for input signal frequencies up to 500 MHz and to have a total RMS jitter of only 50 fs

A 1-GS/s 11-bit ADC With 55-dB SNDR, 250-mW Power Realized by a High Bandwidth Scalable Time-Interleaved Architecture

Abstract: A time-interleaved ADC architecture that eliminates the need to correct timing offsets and is yet scalable to high sampling rates is presented. To eliminate timing skews, a Nyquist rate sampling switch is used, which is followed by subsampled, double-sampled time-interleaved sample-and-hold (S/H) stages. This circuit is configured with a special clocking scheme that reduces the loading of the interleaved S/Hs on the Nyquist rate sampling switch, making this scalable to high sampling rates. The subsampled ADCs (sub-ADCs) in this design use a 3.5-bit/stage pipelined architecture. This 1-GS/s 11-bit ADC achieves 55-dB peak SNDR, 58.6-dB SNR, consumes 250-mW core power, and occupies a core area of 3.5 mm2. This circuit is implemented in a dual-gate 1.2 V/2.5 V, 0.13-mum logic CMOS process

A 14-bit 125 MS/s IF/RF sampling pipelined ADC with 100 dB SFDR and 50 fs jitter

Abstract: This paper describes a 14-bit, 125 MS/s IF/RF sampling pipelined A/D converter (ADC) that is implemented in a 0.35 μm BiCMOS process. The ADC has a sample-and-hold circuit that is integrated in the first pipeline stage, which removes the need for a dedicated sample-and-hold amplifier (i.e., "SHA-less"). It also has a sampling buffer that is turned off during the hold clock phases to save power. To accurately estimate and minimize the clock jitter, a new jitter simulation technique was used whose results were verified on silicon. The measured silicon results indicate the highest published IF sampling performance to date and prove the viability of the "SHA-less" architecture for IF/RF sampling ADCs. The ADC is calibration-free and achieves a DNL of less than 0.2 LSB and INL of 0.8 LSB. The SNR is 75 dB below Nyquist, and stays above 71 dB up to 500 MHz. The low-frequency SFDR is about 100 dB, and stays above 90 dB up to about 300 MHz. This is also the first ADC to achieve 14-bit level performance for input signal frequencies up to 500 MHz and to have a total RMS jitter of only 50 fs.

Analog vertical sub-sampling in an active pixel sensor (APS) image sensor

Abstract: An active pixel sensor (APS) image sensor comprises an array of pixel circuits corresponding to rows and columns of pixels, a plurality of amplifiers that buffer signals output by the array of pixel circuits, and a plurality of sample and hold circuits that read the buffered signals. A routing mechanism is positioned between the array of pixel circuits and the plurality of amplifiers. A controller selects a set of the pixel circuits for sampling and is configured to control the routing mechanism to couple each pixel circuit in the set to a different one of the amplifiers during a normal mode of operation and to couple each pixel circuit of a subset of pixel circuits in a first set of pixel circuits to a different amplifier of a first subset of the amplifiers, to couple each pixel circuit of a subset of pixel circuits in a second set of pixel circuits to a different amplifier of a second subset of the amplifiers, and to connect the amplifiers of the first and second subsets of amplifiers in pairs to a common one of the sample and hold circuits during a sub-sampling mode of operation.

Systems and methods for ultrasound imaging

Abstract: Systems and methods are disclosed for improving the resolution and quality of an image formed by signals from an array of receivers. Multiple receivers introduce variations in arrival times that can be less than the period of an operating signal, and also less than the period associated with a sampling operation. Thus, multiple receivers allow sampling of fine features of reflected signals that would be considered beyond the resolution associated with the operating signal. Use of multiple receivers also provides an effective sampling rate that is greater than the sampling rate of an individual receiver. Similar advantages can be obtained using multiple transmitters. Such advantageous features can be used to obtain high resolution images of objects in a medium in applications such as ultrasound imaging. Sub-Nyquist sampling is discussed. Accounting for the effects of refraction on pathlengths as a signal passes between two regions of different sound speed allows improved calculation of focus distances. Extending the analysis to account for additional layers or sub-layers allows further improvement.

Method and apparatus for on-line compressed sensing

Abstract: A typical data acquisition system takes periodic samples of a signal, image, or other data, often at the so-called Nyquist/Shannon sampling rate of two times the data bandwidth in order to ensure that no information is lost. In applications involving wideband signals, the Nyquist/Shannon sampling rate is very high, even though the signals may have a simple underlying structure. Recent developments in mathematics and signal processing have uncovered a solution to this Nyquist/Shannon sampling rate bottlenck for signals that are sparse or compressible in some representation. We demonstrate and reduce to practice methods to extract information directly from an analog or digital signal based on altering our notion of sampling to replace uniform time samples with more general linear functionals. One embodiment of our invention is a low-rate analog-to-information converter that can replace the high-rate analog-to-digital converter in certain applications involving wideband signals. Another embodiment is an encoding scheme for wideband discrete-time signals that condenses their information content.

Synchronization algorithms for UWB signals

Abstract: This paper is concerned with timing recovery for ultra-wideband communication systems operating in a dense multipath environment. Two timing algorithms are proposed that exploit the samples of the received signal to estimate the start of the individual frames with respect to the receiver's clock (frame timing) and the location of the first frame in each symbol (symbol timing). Channel estimation comes out as a by-product and can be used for coherent matched filter detection. The proposed algorithms require sampling rates on the order of the inverse of the pulse duration. Their performance is assessed by simulating the operation of coherent and differential detectors. Their sensitivity to the sampling rate is discussed, and the effects of the multiple access interference are evaluated.

Direct downconversion of multiband RF signals using bandpass sampling

Abstract: -Bandpass sampling can be used by radio receivers to directly digitize the radio frequency (RF) signals. Although the bandpass sampling theory for single-band RF signals is well established, its counterpart for multiband RF signals is relatively immature. In this paper, we propose a novel and efficient method to find the ranges of valid bandpass sampling frequency for direct downconverting multiband RF signals. Simple formulas for the ranges of valid bandpass sampling frequency in terms of the frequency locations of the multiple RF bands are derived. The result can be used to design a multiband receiver for software defined radios.

Fully digital hysteresis modulation with switching-time prediction

Abstract: This paper proposes a digital hysteresis-modulation technique based on switching-time prediction. Sampling controlled variables several times within a switching period, it ensures a dynamic performance comparable to that obtainable with analog hysteresis modulation. Compared to conventional digital hysteresis modulation, it avoids frequency jitter since it predicts switching transitions. Compared to hysteresis modulation based on the detection of the zero crossing of current errors, it avoids external analog circuits. Compared to pulsewidth-modulation (PWM) techniques, it ensures faster dynamic response. These advantages are obtained at the expense of increased signal-processing requirements and of control complexity. Switching-frequency stabilization and synchronization with an external clock can be obtained extending the techniques proposed for analog hysteresis modulations. The proposed predictive algorithm does not require knowledge of load parameters and only a rough estimation of the inductor value, which can be easily self-adjusted. The proposed solution is suited for high-performance current (or sliding-mode) control where the digital hardware has enough computational power to allow multiple samples within a switching period. The proposed modulation technique has been applied to a sliding-mode control of a single-phase uninterruptible power supply (UPS). Experimental results confirm the effectiveness of the proposed approach.

Apparatus and method for estimating synchronized phasors at predetermined times referenced to a common time standard in an electrical system

Abstract: An apparatus and method estimates a plurality of synchronized phasors at predetermined times referenced to an absolute time standard in an electrical power system. The method includes acquiring and determining a frequency of a power system signal, sampling the power system signal at a sampling interval rate based on a frequency of the power system signal to form signal samples, and generating a plurality of acquisition time values based on an occurrence of each of the signal samples at a corresponding plurality of different times referenced to the absolute time standard. The method further includes adjusting a phasor of each of the signal samples based on a time difference between a corresponding selected acquisition time value and a predetermined time referenced to an absolute time standard to form the plurality of synchronized phasors.

A minimum squared-error framework for generalized sampling

Abstract: We treat the problem of reconstructing a signal from its nonideal samples where the sampling and reconstruction spaces as well as the class of input signals can be arbitrary subspaces of a Hilbert space. Our formulation is general, and includes as special cases reconstruction from finitely many samples as well as uniform-sampling of continuous-time signals, which are not necessarily bandlimited. To obtain a good approximation of the signal in the reconstruction space from its samples, we suggest two design strategies that attempt to minimize the squared-norm error between the signal and its reconstruction. The approaches we propose differ in their assumptions on the input signal: If the signal is known to lie in an appropriately chosen subspace, then we propose a method that achieves the minimal squared error. On the other hand, when the signal is not restricted, we show that the minimal-norm reconstruction cannot generally be obtained. Instead, we suggest minimizing the worst-case squared error between the reconstructed signal, and the best possible (but usually unattainable) approximation of the signal within the reconstruction space. We demonstrate both theoretically and through simulations that the suggested methods can outperform the consistent reconstruction approach previously proposed for this problem.

Demodulation Pixel Based on Static Drift Fields

Abstract: A novel pixel architecture for two-dimensional pixel parallel demodulation of modulated light waves is introduced, enabling real-time three-dimensional (3-D) imaging. Applications for such methods can be found in the field of surveillance, robotics, automotive, and industry security applications. The pixel architecture is based on large areas of static drift fields and relatively small demodulation regions. The large area of static drift field forms the basic photodetection region. The constant drift field enables the very fast transport of photo-generated charges to the sampling region where demodulation of the light signal is performed. The main advantages compared to recently used demodulation pixels are lower power consumption and higher optical fill factor or sensitivity. The first implementation is a pixel of 40times40 mum 2 size with 25% optical fill factor. Measurements prove the concept of transporting photo-generated charges within less than 1 ns to the demodulation node. The applicability of the pixel in 3-D imaging applications is highlighted by distance measurements achieving millimeter distance resolution

Demonstration and analysis of a 40-gigasample/s interferometric analog-to-digital converter

Abstract: A novel interferometric scheme for photonic analog-to-digital conversion is for the first time experimentally demonstrated at a real-time sample rate of 40 gigasamples/s. The scheme includes sampling as well as binary encoding, and the input signal in the experiment was a 1.25-GHz sinusoidal tone that was successfully digitized with a nominal resolution of 21 digital levels. Single-sample measurements yielded an effective number of bits (ENOB) of 2.6, which was limited by thermal detection noise while multisample averaged measurements resulted in an ENOB of 3.6 bits, mainly limited by phase drift. Apart from the experimental results, this paper covers an extensive theoretical analysis of the system, including calculations on the fundamental maximum bandwidth, the required optical power, the generated binary code, and its error robustness, as well as the impact of detection noise on the signal-to-noise ratio of the digitized signal. The major benefits of this interferometric scheme are that only one standard phase modulator is required and that the phase swing does not have to be larger than plusmnpi to reach the full digital value space

Singular value analysis of the Jacobian matrix in microwave image reconstruction

Abstract: For non-linear inverse scattering problems utilizing Gauss-Newton methods, the Jacobian matrix encodes rich information concerning the system performance and algorithm efficiency. In this paper, we perform an analytical evaluation of a single-iteration Jacobian matrix based on a previously derived nodal adjoint representation. Concepts for studying linear ill-posed problems, such as the degree-of-ill-posedness, are used to assess the impact of important system parameters on the expected image quality. Analytical singular value decomposition (SVD) of the Jacobian matrix for a circular imaging domain is derived along with the numerical SVD for optimizing imaging system configurations. The results show significant reductions in the degree-of-ill-posedness when signal frequency, antenna array density and property parameter sampling are increased. Specifically, the decay rate in the singular spectrum of the Jacobian decreases monotonically with signal frequency being approximately 1/3 of its 0.1 GHz value at 3 GHz, is improved with antenna array density up to about 35 equally-spaced circumferentially positioned elements and drops significantly with increased property parameter sampling to more than twice the amount of measurement data. These results should serve as useful guidelines in the development of design specifications for an optimized hardware installation

A digital beamsteerer for difference frequency in a parametric array

Abstract: A steerable audio system can be realized using parametric array. However, the available steerable angle is often limited by the sampling interval used in the digital system. As such, the smallest steerable angle is large (/spl sim/26/spl deg/) for several hundred kilohertz of sampling frequency. Although there are some fractional delay or frequency domain algorithms can be used to improve the steering angle, most of the algorithms are either computational intensive or introduce error during the process. In this paper, an algorithm is proposed to rectify this problem by applying separate delays to the carrier and sideband frequencies. Different weighting functions also added to the carrier and sideband frequencies to control the difference frequency's beamwidth and sidelobe. Most importantly, the proposed system can steer the difference frequency to a small angle with minimal computation.

High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation

Abstract: A signaling system having an equalizing transmitter and equalizing receiver. The equalizing transmitter transmits a signal to a receive circuit. A first sampling circuit within the equalizing receiver samples the signal to determine whether the signal exceeds a first threshold, and a second sampling circuit within the equalizing receiver samples the signal to determine whether the signal exceeds a second threshold. A drive strength of the equalizing transmitter and a drive strength of an equalizing signal driver within the equalizer are adjusted based, at least in part, on whether the first signal exceeds the first and second thresholds.

High-resolution side-channel attack using phase-based waveform matching

Abstract: This paper describes high-resolution waveform matching based on a Phase-Only Correlation (POC) technique and its application for a side-channel attack. Such attacks, such as Simple Power Analysis (SPA) and Differential Power Analysis (DPA), use a statistical analysis of signal waveforms (e.g., power traces) to reduce noise and to retrieve secret information. However, the waveform data often includes displacement errors in the measurements. The use of phase components in the discrete Fourier transforms of the waveforms makes it possible to estimate the displacements between the signal waveforms with higher resolution than the sampling resolution. The accuracy of a side-channel attack can be enhanced using this high-resolution matching method. In this paper, we demonstrate the advantages of the POC-based method in comparison with conventional approaches through experimental DPA and Differential ElectroMagnetic Analysis (DEMA) against a DES software implementation on a Z80 processor.

Temporal and spatial shaping of multi-channel audio signals

Abstract: A selected channel of a multi-channel signal which is represented by frames composed from sampling values having a high time resolution can be encoded with higher quality when a wave form parameter representation representing a wave form of an intermediate resolution representation of the selected channel is derived, the wave form parameter representation including a sequence of intermediate wave form parameters having a time resolution lower than the high time resolution of the sampling values and higher than a time resolution defined by a frame repetition rate. The wave form parameter representation with the intermediate resolution can be used to shape a reconstructed channel to retrieve a channel having a signal envelope close to that one of the selected original channel. The time scale on which the shaping is performed is shorter than the time scale of a framewise processing, thus enhancing the quality of the reconstructed channel. On the other hand, the shaping time scale is larger than the time scale of the sampling values, significantly reducing the amount of data needed by the wave form parameter representation.

Communication channel with undersampled interpolative timing recovery

Abstract: Method and apparatus for processing transmitted data. A sampling circuit preferably performs lossy sampling of a continuous signal to provide a corresponding sequence of discrete samples at a sampling rate less than a Nyquist rate of the continuous signal. A processing circuit reconstructs an informational content of the continuous signal from the discrete samples, and operates to periodically insert additional samples into the sequence, which preferably increases an effective rate of said sampling to match or exceed the Nyquist rate. Preferably, the lossy discrete samples are temporarily stored in a memory space prior to reconstruction by the processing circuit. The sampling circuit preferably comprises an analog-to-digital converter (ADC) of an analog front end (AFE). The processing circuit preferably comprises a digital back end (DBE) employing partial-response, maximum-likelihood (PRML) detection. The additional samples are preferably provided by an iterative timing recovery (ITR) block of the DBE.

An oversampled channelized UWB receiver with transmitted reference modulation

Abstract: To digitize the ultra-wideband (UWB) signal at its Nyquist rate, a frequency channelized receiver for UWB radio based on hybrid filter banks (HFB) is presented. Among the challenges of such receivers are the uncertainties of the analog analysis filters and the slow convergence speed. To overcome these problems, a channelized receiver operating at slightly above the critically sampling rate is presented. The proposed receiver, which is designed for use in transmitted reference (TR) systems, combines the synthesis filters and the matched filter so that the joint response of the analysis filter and the propagation channel can be estimated independently in each subband. When the input noise is colored or a narrowband interference (NBI) is present, the weighting in each subband can be adaptively adjusted so to approximate the noise whitening and matched filtering operation for near optimal detection. The adaptive performance of the proposed receiver is slightly better than an ideal full-band receiver when the input noise is white and significantly better when a NBI is present. The effect of the automatic gain controller (AGC) and the analog-to-digital converter (ADC) are also considered. The proposed receiver with 3-bit ADC seems sufficient to achieve performance comparable to an infinite bit channelized receiver even in the presence of large NBI

Spread spectrum radar apparatus

Abstract: It is an object of the present invention to prevent the sensitivity of radar apparatus from falling. A spread spectrum radar apparatus which detects an object, includes a carrier wave oscillator which generates a carrier wave, transmission unit which transmits a spread signal which is the carrier wave spread using a first PN code, an intermediate demodulated signal generating unit which receives a reflected wave which is the spread signal reflected from the object, and despreads the reflected wave using a delayed second PN code that has a cyclically reversed logical value of the first PN code, to generate an intermediate demodulated signal, a low-pass filter through which a specific frequency component of the intermediate demodulated signal passes, and a sampling unit which samples an output signal from the low-pass filter, and the sampling unit samples the output signal in synchronization with the cycle of the reversal.

Fast Reconstruction Methods for Bandlimited Functions from Periodic Nonuniform Sampling

Abstract: A well-known generalization of Shannon's sampling theorem states that a bandlimited function can be reconstructed from its periodic nonuniformly spaced samples if the effective sampling rate is at least the Nyquist rate. Analogous to Shannon's sampling theorem this generalization requires that an infinite number of samples be available, which, however, is never the case in practice. Most existing reconstruction methods for periodic nonuniform sampling yield very low order (often not even first order) accuracy when only a finite number of samples is given. In this paper we propose a fast, numerically robust, root-exponential accurate reconstruction method. The efficiency and accuracy of the algorithm is obtained by fully exploiting the sampling structure and utilizing localized Fourier analysis. We discuss applications in analog-to-digital conversion where nonuniform periodic sampling arises in various situations. Finally, we demonstrate the performance of our algorithm by numerical examples.

Detection of engine valve faults by vibration signals measured on the cylinder head

Abstract: This technical note proposes a simple technique for the detection of incipient engine valve faults by vibration signals measured on the cylinder head. The characteristics of the vibration signal are analysed, indicating that its time domain and frequency domain characteristics are both useful for engine diagnosis while the cycle-by-cycle variation seems a disadvantage. A simple diagnostic technique named partial sampling and feature averaging (PSFA) has been presented. Only a specific part of the vibration signal corresponding to a particular impact force within each operating cycle is sampled and analysed, and then the diagnostic features are extracted from each part but averaged among many cycles. Identification of abnormal valve clearance just requires a partial sampling of the vibration signal extracted during the period of valve closing, and detection of gas leakage from valves needs a partial sampling signal corresponding to the period of in-cylinder combustion. The experimental results show...

A background timing-skew calibration technique for time-interleaved analog-to-digital converters

Abstract: This paper presents a background timing-skew calibration technique for time-interleaved analog-to-digital converters (ADCs). The timing skew between any two adjacent analog-digital (A/D) channels is detected by counting the number of zero crossings of the ADCs input while randomly alternating their sampling sequence. Digitally controlled delay units are adjusted to minimize the timing skews among the A/D channels caused by the mismatches among the clock routes. The calibration behaviors, including converging speed and timing jitter, are theoretically analyzed and verified with simulations. A 6-bit 16-channel ADC is used as an example.