Showing papers on "Sampling (signal processing) published in 2007"

Blind Multi-Band Signal Reconstruction: Compressed Sensing for Analog Signals

Abstract: We address the problem of reconstructing a multi-band signal from its sub-Nyquist point-wise samples. To date, all reconstruction methods proposed for this class of signals assumed knowledge of the band locations. In this paper, we develop a non-linear blind perfect reconstruction scheme for multi-band signals which does not require the band locations. Our approach assumes an existing blind multi-coset sampling method. The sparse structure of multi-band signals in the continuous frequency domain is used to replace the continuous reconstruction with a single finite dimensional problem without the need for discretization. The resulting problem can be formulated within the framework of compressed sensing, and thus can be solved efficiently using known tractable algorithms from this emerging area. We also develop a theoretical lower bound on the average sampling rate required for blind signal reconstruction, which is twice the minimal rate of known-spectrum recovery. Our method ensures perfect reconstruction for a wide class of signals sampled at the minimal rate. Numerical experiments are presented demonstrating blind sampling and reconstruction with minimal sampling rate.

Silicon Odometer: An On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits

Abstract: Precise measurement of digital circuit degradation is a key aspect of aging tolerant digital circuit design. In this study, we present a fully digital on-chip reliability monitor for high-resolution frequency degradation measurements of digital circuits. The proposed technique measures the beat frequency of two ring oscillators, one stressed and the other unstressed, to achieve 50 X higher delay sensing resolution than that of prior techniques. The differential frequency measurement technique also eliminates the effect of common-mode environmental variation such as temperature drifts between each sampling points. A 265 X 132 mum2test chip implementing this design has been fabricated in a 1.2 V, 130 nm CMOS technology. The measured resolution of the proposed monitoring circuit was 0.02%, as the ring oscillator in this design has a period of 4 ns; this translates to a temporal resolution of 0.8 ps. The 2 mus measurement time was sufficiently short to suppress the unwanted recovery effect from concealing the actual circuit degradation.

Small-Signal Discrete-Time Modeling of Digitally Controlled PWM Converters

Abstract: The letter presents an exact small-signal discrete-time model for digitally controlled pulsewidth modulated (PWM) dc-dc converters operating in constant frequency continuous conduction mode (CCM) with a single effective A/D sampling instant per switching period. The model, which is based on well-known approaches to discrete-time modeling and the standard Z-transform, takes into account sampling, modulator effects and delays in the control loop, and is well suited for direct digital design of digital compensators. The letter presents general results valid for any CCM converter with leading or trailing edge PWM. Specific examples, including approximate closed-form expressions for control-to-output transfer functions are given for buck and boost converters. The model is verified in simulation using an independent system identification approach.

Spatial Aliasing in Spherical Microphone Arrays

Abstract: Performance of microphone arrays at the high-frequency range is typically limited by aliasing, which is a result of the spatial sampling process. This paper presents analysis of aliasing for spherical microphone arrays, which have been recently studied for a range of applications. The paper presents theoretical analysis of spatial aliasing for various sphere sampling configurations, showing how high-order spherical harmonic coefficients are aliased into the lower orders. Spatial antialiasing filters on the sphere are then introduced, and the performance of spatially constrained filters is compared to that of the ideal antialiasing filter. A simulation example shows how the effect of aliasing on the beam pattern can be reduced by the use of the antialiasing filters

Super-Resolution From Unregistered and Totally Aliased Signals Using Subspace Methods

Abstract: In many applications, the sampling frequency is limited by the physical characteristics of the components: the pixel pitch, the rate of the analog-to-digital (AID) converter, etc. A low- pass filter is usually applied before the sampling operation to avoid aliasing. However, when multiple copies are available, it is possible to use the information that is inherently present in the aliasing to reconstruct a higher resolution signal. If the different copies have unknown relative offsets, this is a nonlinear problem in the offsets and the signal coefficients. They are not easily separable in the set of equations describing the super-resolution problem. Thus, we perform joint registration and reconstruction from multiple unregistered sets of samples. We give a mathematical formulation for the problem when there are M sets of N samples of a signal that is described by L expansion coefficients. We prove that the solution of the registration and reconstruction problem is generically unique if MN ges L + M - 1. We describe two subspace-based methods to compute this solution. Their complexity is analyzed, and some heuristic methods are proposed. Finally, some numerical simulation results on one- and two-dimensional signals are given to show the performance of these methods.

Method and system for real-time signal classification

Abstract: A method to achieve an accurate, extremely low power state classification implementation is disclosed. Embodiments include a sequence that matches the data flow from the sensor transducer, through analog filtering, to digital sampling, feature computation, and classification.

SABRINA: A SAR Bistatic Receiver for Interferometric Applications

Abstract: This letter discusses the implementation of SABRINA, Synthetic Aperture radar Bistatic Receiver for Interferometric Applications. The ground resolution of a fixed-receiver bistatic system is studied, showing that it is comparable to that of a monostatic system. Due to the short distance from target to receiver, large sensitivity is obtained. The noncooperative nature of the bistatic system forces a conservative data-acquisition strategy based on continuously sampling the scattered signal during a temporal window around the predicted satellite overpass time. Also, to be able to synchronize the system in time and in frequency, sampling of a direct signal obtained through an antenna pointed at the satellite is required. Besides the signal processing required to phase-lock the received signal, the bistatic synthetic aperture radar processing needs to take into account the azimuth-dependent phase history. First focused images obtained with the SABRINA-ENVISAT combination are discussed

CMOS Camera With In-Pixel Temporal Change Detection and ADC

Abstract: An array of 90times90 active pixel sensors (APS) with pixel-level embedded differencing and comparison is presented. The nMOS-only 6T 2C 25 mum times 25 mum pixel provides both analog readout of pixel intensity and a digital flag indicating temporal change at variable thresholds. Computation is performed through a pixel-level capacitively coupled comparator which also functions as analog-to-digital converter. The chip, fabricated in a 0.5 mum 3M2P CMOS, process consumes 4.2 mW of power while operating at 30 fps. Change sensitivity is 2.1% at an illumination of 1.7 W/cm2. Gating of raster-scanned pixel output by change detection typically produces a 20-fold compression in the data stream, depending on image conditions and reconstruction quality set by the change detection threshold.

A 130 nm CMOS 6-bit Full Nyquist 3 GS/s DAC

Abstract: This paper presents a 6-bit very high-speed, low-power digital-to-analog converter (DAC). It is based on a current steering binary weighted architecture and achieves 10-bit static linearity without calibration. Due to the use of a pseudo-segmented structure instead of a thermometer decoder, the operating speed of the converter can be up to 4.5 GS/s. The DAC occupies 0.4 mmtimes0.5 mm in a standard 130 nm CMOS technology. A spurious-free dynamic range (SFDR) of more than 36 dB has been measured over the complete Nyquist interval at sampling frequencies up to 3 GS/s. The power consumption at a 3 GHz clock frequency for a near-Nyquist sinusoidal output signal equals 29 mW .

Design for a Simplified Cochlear Implant System

Abstract: A simplified cochlear implant (CI) system would be appropriate for widespread use in developing countries. Here, we describe a CI that we have designed to realize such a concept. The system implements 8 channels of processing and stimulation using the continuous interleaved sampling (CIS) strategy. A generic digital signal processing (DSP) chip is used for the processing, and the filtering functions are performed with a fast Fourier transform (FFT) of a microphone or other input. Data derived from the processing are transmitted through an inductive link using pulse width modulation (PWM) encoding and amplitude shift keying (ASK) modulation. The same link is used in the reverse direction for backward telemetry of electrode and system information. A custom receiver-stimulator chip has been developed that demodulates incoming data using pulse counting and produces charge balanced biphasic pulses at 1000 pulses/s/electrode. This chip is encased in a titanium package that is hermetically sealed using a simple but effective method. A low cost metal-silicon hybrid mold has been developed for fabricating an intracochlear electrode array with 16 ball-shaped stimulating contacts

A Design-Optimized Continuous-Time Delta–Sigma ADC for WLAN Applications

Abstract: A third-order continuous-time delta-sigma (DeltaSigma) analog-to-digital converter (ADC) is presented for the conversion of an input signal bandwidth of 10 MHz Design optimization towards minimal power consumption is demonstrated for the high-speed low-power building blocks of the DeltaSigma modulator From this point of view, it is shown that GmC integrators are preferred over RC integrators in the low-pass filter of the modulator because they show a better tradeoff between power, speed, and accuracy A new single-bit quantizer topology is presented that incorporates a local feedback path that improves stability using a switched-voltage technique Finally, a design methodology for the single-bit digital-to-analog converter (DAC) in the feedback loop is proposed, focusing on the impact of high sampling rates on the stability of the converter The presented continuous-time ADC achieves a simulated dynamic range of 72 dB and a signal-to-noise-and-distortion-ratio of 66 dB in a 10-MHz signal bandwidth Therefore, it can be applied for WLAN broadband communication The power consumption of the DeltaSigma modulator is limited to 75 mW The chip is designed in a 018-mum triple-well CMOS technology

Compressive Sensing for GPR Imaging

Abstract: The theory of compressive sensing (CS) enables the reconstruction of sparse signals from a small set of non-adaptive linear measurements by solving a convex lscr1 minimization problem This paper presents a novel data acquisition and imaging algorithm for ground penetrating radars (GPR) based on CS by exploiting sparseness in the target space, ie, a small number of point-like targets Instead of measuring conventional radar returns and sampling at the Nyquist rate, linear projections of the returned signal with random vectors are taken as measurements Using simulated and experimental GPR data, it is shown that sparser and sharper target space images can be obtained compared to standard backprojection methods using only a small number of CS measurements Furthermore, the target region can even be sampled at random aperture points

Self-calibrating multi-port circuit and method

Abstract: The invention provides a type-based method to compensate for distortions in circuits operating on a plurality of input modulated signals to form one or more output modulated signals. Steps of the method include low-rate sampling of the output signal to obtain a statistical characteristics thereof, and adjusting parameters of the circuit to introduce a controlled degree of cross-coupling between the signals until the statistical characteristics of the output signal approximates a reference characteristics defined by the used modulation formats. Another aspect of the invention provides a self-calibrating multi-port circuit implementing said method.

Exact Harmonics/Interharmonics Calculation Using Adaptive Window Width

Abstract: An accurate, simple, and practical numerical method for exact calculation of harmonics/interharmonics using adaptive window width is presented in this paper. The proposed method adaptively adjusts the window width based on correlation calculation, thus completely eliminating or significantly reducing the unacceptable spectral leakage errors in the frequency domain caused by truncation of the time-domain signal. The iterative algorithm does not require any knowledge about the system frequency and the interharmonic constituents; the only parameter needed is the signal sequence obtained by sampling the analog signal at equidistant sampling interval. Various case studies using simulation data, experimental data and the real world data show that the adaptive algorithm provides an ideal numerical solution to the problem of spectral leakage encountered in harmonics and interharmonics detection and analysis.

Multirate Sampling Method for Acceleration Control System

Abstract: This paper focuses on the realization of high-performance motion control based on acceleration control. A disturbance observer is used to construct an acceleration control system. A high sampling frequency is known to be effective for improving the performance. Characteristics of acceleration control are investigated to discuss the relationship between the performance and a sampling frequency of the system. The needs for a high sampling frequency for an output are then described. Based on these considerations, a novel multirate sampling method for the acceleration control system is proposed. An output sampling period is set shorter than an input sampling period, and control calculation is executed at each output sampling period in the method. The disturbance observer is redesigned for application to the multirate system. Stability analysis is performed to verify the validity of the proposal. Feasibility of the proposed method and its influence on the performance are also verified by experimental results

Compensation for gain imbalance, phase imbalance and DC offsets in a transmitter

Abstract: A method for correcting gain imbalance error, phase imbalance error and DC offset errors in a transmitter having an OFDM-based I/Q modulator is disclosed. The method employs a compensator prior to the I/Q-modulator to compensate for the gain and phase imbalance and DC offset. The compensator is efficiently updated with the estimated values of gain and phase imbalance and DC offsets obtained by performing the DFT operation in the digital baseband domain while sending a pair of orthogonal test tones to the modulator's inputs from a digital baseband chip, then down converting the RF modulated signal through a nonlinear device and a bandpass filter to a baseband signal, and finally sampling it using an A/D. The delay mismatch, which is mainly generated by lowpass filters between the I and Q branches, is also minimized in this method.

Linear Current-Mode Active Pixel Sensor

Abstract: A current mode CMOS active pixel sensor (APS) providing linear light-to-current conversion with inherently low fixed pattern noise (FPN) is presented. The pixel features adjustable-gain current output using a pMOS readout transistor in the linear region of operation. This paper discusses the pixel's design and operation, and presents an analysis of the pixel's temporal noise and FPN. Results for zero and first-order pixel mismatch are presented. The pixel was implemented in a both a 3.3 V 0.35 and a 1.8V 0.18 CMOS process. The 0.35 process pixel had an uncorrected FPN of 1.4%/0.7% with/without column readout mismatch. The 0.18 process pixel had 0.4% FPN after delta-reset sampling (DRS). The pixel size in both processes was 10times10 mum2, with fill factors of 26% and 66%, respectively.

Synchronous Sampling and Demodulation in an Instrument for Multifrequency Bioimpedance Measurement

Abstract: Direct sampling of known carriers is the preferred digital method for measuring biomodulation of tissue impedance. Due to limited resolution and conversion rate of analog-to-digital converters and limited processing power of available digital processors and/or lack of energy resources, conventional discrete-Fourier-transform-based algorithms are not efficient in small medical devices. Knowing exactly the frequencies of carriers (and excitations), an energy-saving fast signal processing method can be developed and implemented. When sampling synchronously with a carrier, it is possible to minimize the complexity of calculations and to introduce a digital-to-analog feedback for enhancement of resolution by digitizing only the small variations between adjacent samples. The proposed system is qualified on proprietary hardware.

Optical coding scheme using optical interconnection for high sampling rate and high resolution photonic analog-to-digital conversion

Abstract: We propose and demonstrate an optical coding scheme using optical interconnection for a photonic analog-to-digital conversion. It allows us to convert a multi-power level signal into a multiple-bit binary code so as to detect it in a bit-parallel format by binary photodiode array. The proposed optical coding is executed after optical quantization using self-frequency shift. Optical interconnection based on a binary conversion table generates a multiple-bit binary code by appropriate allocation of a level identification signal which is provided as a result of optical quantization. Experimental results show that 8-levels analog pulses are converted into 3-bit parallel binary codes.

Solid-state imaging apparatus

Abstract: A solid-state imaging apparatus includes: a pixel section where a plurality of pixels for effecting photoelectric conversion are two-dimensionally arranged, having an effective pixel section consisting of pixels for receiving object light and a reference pixel section consisting of pixels shielded from light; a first scanning circuit for sequentially setting to the pixel section the pixels to be read out a signal; a noise suppressing circuit for suppressing noise components of signals from the pixels based on a first control signal associated with sampling and holding of signals from the pixels and a second control signal associated with setting of clamping potential that are applied at respective predetermined timings; a second scanning circuit for sequentially reading signals of each pixel suppressed of the noise components; and a reference signal control section for applying the first and second control signals to the noise suppressing circuit so that it is brought into one or the other of a first condition where signals of the pixels shielded from light are inputted and a second condition where inputting of signals of the pixels shielded from light is lacked without changing an order according to which a release of sampling by the first control signal and a release of setting of clamping potential by the second control signal are effected, causing a generation of a first reference signal obtained in the first condition or a second reference signal obtained in the second condition as a signal corresponding to an optical black level.

Uncertainty Analysis of the RMS Value and Phase in the Frequency Domain by Noncoherent Sampling

Abstract: The determination of RMS value and phase of harmonic components belongs to the most important tasks of signal analysis in the frequency domain. Evaluation of these parameters is frequently performed using a discrete Fourier transform (DFT) algorithm. In practice, signals are mostly sampled noncoherently. This leads to the well-known effect called leakage, i.e., spreading energy of signal harmonic components into signal frequency neighboring frequency bins. Signals are multiplied by tapering time windows for leakage suppression. This paper is focused on the uncertainty analysis of the RMS value and phase computed from the DFT spectrum of the noncoherently sampled signal using cosine windows. The analysis is focused on investigating the influence of quantization noise

Thresholded samplers for UWB impulse radar

Abstract: This paper presents two novel methods for sampling the backscatter in an impulse radar system. The authors have called the two related methods for swept threshold and stochastic resonance sampling. The samplers are simple, mostly digital circuits which are not clocked, but instead utilize continuous-time signal processing. Since fine-pitch CMOS is not very good for analog processing, but instead has very fast digital logic, the samplers are well suited for this technology. An implementation in 90 nm CMOS is described and measurements which confirm a working 23 GHz sampler are shown

Antialiasing Oscillators in Subtractive Synthesis

Abstract: In this article, oscillator algorithms for digital subtractive synthesis were reviewed. The algorithms were divided into three categories: bandlimited, quasi-bandlimited, and alias-reducing methods. In the first category, the most interesting methods are in practice those that utilize wavetable techniques. The second category consists of methods that low-pass-filter the underlying continuous-time signal prior to sampling. The optimization of the previously introduced BLIT and BLEP methods were considered as a filter design problem. A new technique called the PolyBLEP method was introduced as a variation of the BLEP method that does not require a table lookup but is based on a closed-form formula. In the PolyBLEP algorithm, an integrated polynomial interpolation function is used for acquiring samples to correct the transition region of the waveform. In the third category, the DPW oscillator algorithm generates an approximate sawtooth waveform that has reduced aliasing. This recently proposed method is probably the simplest useful technique for this purpose, because only the trivial sawtooth is simpler, but it is practically useless due to its heavy aliasing. An alternative decimation filter was proposed for the DPW2X algorithm to suppress aliasing well in the frequency region where human hearing is most sensitive

Fractional Delay Based Repetitive Control with Application to PWM DC/AC Converters

Abstract: In repetitive control system, the period of exogenous signals must be the integer number of sampling points. However, it can not be always satisfied in real applications. In this paper, a systematic approach for non-integer delay repetitive control system with fixed sampling rate is proposed. The proposed fractional delay based repetitive control scheme employs the design techniques in digital signal processing theory and two different implementation structures are presented. One is easy to design and the other has optimized performance. Application of the proposed method to PWM DC/AC converter systems is studied to illustrate the design procedure and performance. Experimental results demonstrate the effectiveness of the proposed approach.

A Chirp Transform Algorithm for Processing Squint Mode FMCW SAR Data

Abstract: Frequency-modulated continuous-wave (FMCW) synthetic aperture radar (SAR) is a lightweight cost-effective high-resolution airborne imaging radar. In squint case, the frequency scaling algorithm, which is suitable for processing nonchirped raw data, cannot be used directly in FMCW SAR data processing because of low system sampling frequency. On the other hand, the continuous antenna motion of FMCW SAR can cause serious distortions in the reconstructed images. In this letter, an improved algorithm called the chirp transform algorithm is proposed. When the effects of the residual video phase are negligible, the algorithm uses a chirp transform to perform the time scaling operation to alleviate the sampling frequency problem. It requires only fast Fourier transforms and multiplications. The range cell migration introduced by the continuous motion is also compensated completely in range-Doppler domain. The algorithm performances are analyzed and are supported by point target simulation experiments.

Joint position-pitch estimation of acoustic sources for their tracking and separation

Abstract: The invention relates to a method for localizing and tracking acoustic sources (101) in a multi-source environment, comprising the steps of recording audio-signals (103) of at least one acoustic source (101) with at least two recording means (104, 105), creating a two- or multi-channel recording signal, partitioning said recording signal into frames of predefined length (N), calculating for each frame a cross-correlation function as a function of discrete time-lag values (τ) for channel pairs (106, 107) of the recording signal, evaluating the cross-correlation function by calculating a sampling function depending on a pitch parameter (f0) and at least one spatial parameter (φ0), the sampling function assigning a value to every point of a multidimensional space being spanned by the pitch-parameter and the spatial parameters, and identifying peaks in said multidimensional space with respective acoustic sources in the multi-source environment.

On Dealing with Sampling Rate Mismatches in Blind Source Separation and Acoustic Echo Cancellation

Abstract: The lack of a common clock reference is a fundamental problem when dealing with audio streams originating from or heading to different distributed sound capture or playback devices. When implementing multichannel signal processing algorithms for such kind of audio streams it is necessary to account for the unavoidable mismatches between the actual sampling rates. There are some approaches that can help to correct these mismatches, but important problems remain to be solved, among them the accurate estimation of the mismatch factors, and achieving both accuracy and computational efficiency in their correction. In this paper we present an empirical study on the performance of blind source separation and acoustic echo cancellation algorithms in this scenario. We also analyze the degradation in performance when using an approximate but efficient method to correct the rate mismatches.

High-Speed Digitizing of Repetitive Waveforms Using Accurate Interleaved Sampling

Abstract: Random interleaved sampling has become a widespread operating mode for digital storage oscilloscopes. Different repetitions of (notionally) the same waveform are recorded at random time shifts and are interleaved in memory, resulting in an increase of the equivalent sampling frequency. This procedure requires substantial time, particularly if further averaging is required. In this paper, an approach that ensures accurate time shifts is presented for repeated waveform measurements. Operating two independent oscillators with related frequencies forms the accurate shifts. One of these is used to excite a waveform of interest repeatedly, and the other clocks the analog-to-digital converter (ADC). This architecture was implemented using a commercial "off-the-shelf" field programmable gate array. Examples of experimental waveforms, which are sampled at 2160 MHz using an ADC that is clocked at 80 MHz, are presented. They are compared with the simulated and independently measured waveforms where appropriate.

Clock and data recovery circuit and serdes circuit

Abstract: Disclosed is a clock-and-data recover circuit in which a data sampling circuit, a phase comparator, a phase controller and a phase interpolator make up a loop. The data sampling circuit samples serial input data, and the phase comparator receives an output from the data sampling circuit to detect the phase relationship between clock and the data. The phase controller outputs a phase control signal based on the result of phase comparison of the phase comparator to output a phase control signal. The phase interpolator receives a multi-phase clock composed of plural clock signals with different phases and supplies a clock signal having the phase interpolated based on the phase control signal, to the data sampling circuit. The clock and data recovery circuit further includes a second phase interpolator and a second data sampling circuit. The phase controller generates and outputs a second phase control signal to the second phase interpolator. The second phase interpolator receives the multi-phase clock and outputs a second clock signal having the phase interpolated based on the second phase control signal and supplies the second clock signal to the second data sampling circuit. The second data sampling circuit samples the input data based on the second clock signal from the second phase interpolator. Preferably, the second phase interpolator has a variably set threshold level for sampling the data.