Showing papers on "Sampling (signal processing) published in 2008"

An Introduction To Compressive Sampling

Abstract: Conventional approaches to sampling signals or images follow Shannon's theorem: the sampling rate must be at least twice the maximum frequency present in the signal (Nyquist rate). In the field of data conversion, standard analog-to-digital converter (ADC) technology implements the usual quantized Shannon representation - the signal is uniformly sampled at or above the Nyquist rate. This article surveys the theory of compressive sampling, also known as compressed sensing or CS, a novel sensing/sampling paradigm that goes against the common wisdom in data acquisition. CS theory asserts that one can recover certain signals and images from far fewer samples or measurements than traditional methods use.

Compressive sensing

Abstract: This paper overviews the recent work on compressive sensing, a new approach to data acquisition in which analog signals are digitized for processing not via uniform sampling but via measurements using more general, even random, test functions. In stark contrast with conventional wisdom, the new theory asserts that one can combine "low-rate sampling" with digital computational power for efficient and accurate signal acquisition. Compressive sensing systems directly translate analog data into a compressed digital form; all we need to do is "decompress" the measured data through an optimization on a digital computer. The implications of compressive sensing are promising for many applications and enable the design of new kinds of analog-to-digital converters, cameras, and imaging systems.

Iterative Hard Thresholding for Compressed Sensing

Abstract: Compressed sensing is a technique to sample compressible signals below the Nyquist rate, whilst still allowing near optimal reconstruction of the signal. In this paper we present a theoretical analysis of the iterative hard thresholding algorithm when applied to the compressed sensing recovery problem. We show that the algorithm has the following properties (made more precise in the main text of the paper) - It gives near-optimal error guarantees. - It is robust to observation noise. - It succeeds with a minimum number of observations. - It can be used with any sampling operator for which the operator and its adjoint can be computed. - The memory requirement is linear in the problem size. - Its computational complexity per iteration is of the same order as the application of the measurement operator or its adjoint. - It requires a fixed number of iterations depending only on the logarithm of a form of signal to noise ratio of the signal. - Its performance guarantees are uniform in that they only depend on properties of the sampling operator and signal sparsity.

A Continuous-Time ADC/DSP/DAC System With No Clock and With Activity-Dependent Power Dissipation

Abstract: A continuous-time system that converts its analog input to a continuous-time digital representation without sampling, then processes the information digitally without the aid of a clock, is presented. Without sampling there is no aliasing, which reduces the in-band distortion power by not aliasing into band out-of-band distortion components. The 8-bit system, fabricated in a 90 nm CMOS process, utilizes continuous delay elements as part of a programmable transversal FIR filter. The input is encoded by a delta modulator without a clock into a series of non-uniformly spaced tokens, which are processed by the digital continuous-time filter and converted to an analog output using a custom DAC that guarantees there are no glitches in the output waveform. All activity is signal driven, automatically affording dynamic power scaling that tracks input activity.

Analysis of Harmonics in Power Systems Using the Wavelet-Packet Transform

Abstract: This paper proposes a new algorithm based on the wavelet-packet transform for the analysis of harmonics in power systems. The proposed algorithm decomposes the voltage/current waveforms into the uniform frequency bands corresponding to the odd-harmonic components of the signal and uses a method to reduce the spectral leakage due to the imperfect frequency response of the used wavelet filter bank. This paper studies the selection of the mother wavelet, the sampling frequency, and the frequency characteristics of the wavelet filter bank for the two most common wavelet functions used for harmonic analysis and compares the performance of the proposed method with the results obtained using the discrete Fourier transform (DFT) analysis and the harmonic-group concept introduced by the International Electrotechnical Commission (IEC) under different measurement conditions.

Improved spectral optical coherence tomography using optical frequency comb

Abstract: We identify and analyze factors influencing sensitivity drop-off in Spectral OCT and propose a system employing an Optical Frequency Comb (OFC) to verify this analysis. Spectral Optical Coherence Tomography using a method based on an optical frequency comb is demonstrated. Since the spectrum sampling function is determined by the comb rather than detector pixel distribution, this method allows to overcome limitations of high resolution Fourier-domain OCT techniques. Additionally, the presented technique also enables increased imaging range while preserving high axial resolution. High resolution cross-sectional images of biological samples obtained with the proposed technique are presented.

Photonic subsampling analog-to-digital conversion of microwave signals at 40-GHz with higher than 7-ENOB resolution

Abstract: Conversion of analog signals into digital signals is one of the most important functionalities in modern signal processing systems. As the signal frequency increases beyond 10 GHz, the timing jitter from electronic clocks, currently limited at ~100 fs, compromises the achievable resolution of analog-to-digital converters (ADCs). Owing to their ultralow timing jitter, the use of optical pulse trains from passively mode-locked lasers has been considered to be a promising way for sampling electronic signals. In this paper, based on sub-10 fs jitter optical sampling pulse trains, we demonstrate a photonic subsampling ADC that downconverts and digitizes a narrowband microwave signal at 40 GHz carrier frequency with higher than 7 effective-number-of-bit (ENOB) resolution.

System and method for detection with a digitizer sensor

Abstract: A method for detection on a digitizer sensor, the method comprises simultaneously transmitting orthogonal signals having the same frequency on at least two conductors of a digitizer sensor; sampling a signal on at least one other conductor crossing the at least two conductors, wherein the signal is responsive to capacitive coupling at cross-junctions formed between the at least two conductors and at least one other conductor; decomposing the sampled signal into orthogonal components; and analyzing the orthogonal components to detect user interaction at each cross junction.

A Robust Phase-Locked Loop Algorithm to Synchronize Static-Power Converters With Polluted AC Systems

Abstract: In this paper, a phase-locked loop algorithm appropriated for digital-signal-processor-based control implementations, where the operation of a static-power converter needs to be synchronized with an ac network, is presented. The proposed algorithm includes a multiplier, a filter, a feedback closed loop, and a numerically controlled oscillator stage. As a result, a discrete sine (and cosine) signal is generated in synchronism with the fundamental component of an external-reference (ER) signal. Moreover, the sampling period of the algorithm is adjusted at each sampling instant such that an integer number of sampling periods per period of the ER signal is ensured. This is the main feature, and it is achieved by using a discrete rectangular window filter and a discrete controller. The proposed algorithm code is simple, stable, and presents high noise rejection. A comprehensive theoretical justification and various rigorous experimental tests are included.

Digital Lock-In Detection for Discriminating Multiple Modulation Frequencies With High Accuracy and Computational Efficiency

Abstract: We introduce a novel digital lock-in detection technique for simultaneously measuring the amplitude and phase of multiple amplitude-modulated signals. Using particular modulation and sampling constraints and averaging filters, we achieve optimal noise reduction and discrimination between sources of different modulation frequencies. Furthermore, it is shown that the digital lock-in technique can be performed as a simple matrix multiplication, which considerably reduces the computation time. The digital lock-in algorithm is described and analyzed under certain sampling and modulation conditions, and results are shown for both numerical and experimental data.

A prototype hardware for random demodulation based compressive analog-to-digital conversion

Abstract: In this paper, we utilize recent advances in compressive sensing theory to enable signal acquisition beyond Nyquist sampling constraints. We successfully recover signals sampled at sub-Nyquist sampling rates by exploiting additional structure other than bandlimitedness. We present a working prototype of compressive analog-to-digital converter (CADC) based on a random demodulation architecture. The architecture is particularly suitable for wideband signals that are sparse in the time-frequency plane. CADC has the advantage of enhancing the performance of communication and multimedia systems by increasing the transmission rate for the same bandwidth. We report successful reconstruction of AM modulated signals at sampling rates down to 1/8 of the Nyquist-rate, which represents an up to 87.5% savings in the bandwidth and the storage memory.

Compressive sensing on a CMOS separable transform image sensor

Abstract: This paper discusses the application of a computational image sensor, capable of performing separable 2-D transforms on images in the analog domain, to compressive sensing. Instead of sensing and transmitting raw pixel data, this image sensor first projects the image onto a separable 2-D basis set. The inner products computed in these projections are computed in the analog domain using a computational focal-plane and a computational analog vector-matrix multiplier. Since this operation is performed in the analog domain, components such as the analog-to-digital converters can be taxed less when a only subset of correlations are performed. Compressed sensing theory prescribes the use of a pseudo-random, incomplete basis set, allowing for sampling at less than the Nyquist rate. This can reduce power consumption or increase frame rate.

Modeling of Multisampled Pulse Width Modulators for Digitally Controlled DC–DC Converters

Abstract: This paper presents steady-state and small-signal models for digital pulsewidth modulators (DPWM) employed in multiple sampling digital control schemes for dc-dc switched mode power supplies (SMPS), and identifies the triangular modulation as intrinsically superior to other modulation schemes in multisampling applications. In conventional digital control of dc-dc converters, closed-loop bandwidth limitations are mainly set by analog-to-digital conversion times, computational delays and DPWM delays originated by the sampled nature of the PWM. While the use of hardwired logic and fast A/D converters minimizes computational and A/D delays, the DPWM small-signal phase lag strictly depends on the adopted sampling strategy. Multiple sampling techniques recently proposed in literature can achieve a strong reduction of the DPWM delay by operating the control and modulation steps at a sampling frequency strictly higher than the converter switching frequency. On the other hand, multisampled pulse width modulators (MSPWMs) exhibit nonlinear behaviors which do not have analog counterparts nor are encountered in conventional digital control, the most relevant effect being the onset of sampling induced dead bands, i.e., regions of zero modulation gain in the modulator transcharacteristic which may compromise proper closed-loop operation of the converter. The models proposed in this paper fully characterize the steady-state and small-signal behavior of DPWMs operated in multiple-sampling fashion. Multisampled triangular modulators are proven to be intrinsically superior to trailing edge or leading edge modulators in terms of linearity. Simulation and experimental results validate the proposed models and confirm the properties of triangular modulations.

UWB Echo Signal Detection With Ultra-Low Rate Sampling Based on Compressed Sensing

Abstract: A major challenge in ultra-wide-band (UWB) signal processing is the requirement for very high sampling rate. The recently emerging compressed sensing (CS) theory makes processing UWB signal at a low sampling rate possible if the signal has a sparse representation in a certain space. Based on the CS theory, a system for sampling UWB echo signal at a rate much lower than Nyquist rate and performing signal detection is proposed in this paper. First, an approach of constructing basis functions according to matching rules is proposed to achieve sparse signal representation because the sparse representation of signal is the most important precondition for the use of CS theory. Second, based on the matching basis functions and using analog-to-information converter, a UWB signal detection system is designed in the framework of the CS theory. With this system, a UWB signal, such as a linear frequency-modulated signal in radar system, can be sampled at about 10% of Nyquist rate, but still can be reconstructed and detected with overwhelming probability. The simulation results show that the proposed method is effective for sampling and detecting UWB signal directly even without a very high-frequency analog-to-digital converter.

Compressive Sampling of Binary Images

Abstract: Compressive sampling is a novel framework that exploits sparsity of a signal in a transform domain to perform sampling below the Nyquist rate. In this paper, we apply compressive sampling to significantly reduce the sampling rate of video. A practical system is developed that first splits each video frame into non-overlapping blocks of equal size. Compressive sampling is then performed on sparse blocks, determined by predicting sparsity based on previous reference frames which are sampled conventionally. The blocks identified as sparse are reconstructed using the orthogonal matching pursuit algorithm, whereas the remaining blocks are sampled fully. Thus, the acquisition complexity and sampling time are reduced, while exploiting the local sparsity, within the DCT domain, of a video stream. Our simulation results indicate up to 50% saving in acquisition for Y-components of video with very small performance loss compared to traditional sampling.

Digital pulse-shape discrimination of fast neutrons and γ rays

Abstract: Discrimination of the detection of fast neutrons and γ rays in a liquid scintillator detector has been investigated using digital pulse-processing techniques. An experimental setup with a 252Cf source, a BC-501 liquid scintillator detector, and a BaF2 detector was used to collect waveforms with a 100 Ms/s, 14 bit sampling ADC. Three identical ADCs were combined to increase the sampling frequency to 300 Ms/s. Four different digital pulse-shape analysis algorithms were developed and compared to each other and to data obtained with an analogue neutron– γ discrimination unit. Two of the digital algorithms were based on the charge comparison method, while the analogue unit and the other two digital algorithms were based on the zero-crossover method. Two different figure-of-merit parameters, which quantify the neutron– γ discrimination properties, were evaluated for all four digital algorithms and for the analogue data set. All of the digital algorithms gave similar or better figure-of-merit values than what was obtained with the analogue setup. A detailed study of the discrimination properties as a function of sampling frequency and bit resolution of the ADC was performed. It was shown that a sampling ADC with a bit resolution of 12 bits and a sampling frequency of 100 Ms/s is adequate for achieving an optimal neutron– γ discrimination for pulses having a dynamic range for deposited neutron energies of 0.3–12 MeV. An investigation of the influence of the sampling frequency on the time resolution was made. A FWHM of 1.7 ns was obtained at 100 Ms/s.

Low-delay signal processing based on highly oversampled digital processing

Abstract: A low-delay signal processing system and method are provided which includes a delta-sigma analog-to- digital converter, an oversampling processor, and a delta-sigma digital-to-analog converter. The delta- sigma analog-to-digital converter receives an input or audio signal and generates a digital sample signal at a high oversampling rate. The oversampling processor is connected to the analog-to-digital converter for processing the digital sample signal at the high oversampling rate with low-delay. The delta-sigma digital-to-analog converter is connected to the oversampling processor for receiving the digital sample signal at the high oversampling rate with low-delay for generating an analog signal. The oversampling processor includes a low-delay filter and a programmable delay element. In this manner, the analog signal is produced with a low delay and high accuracy.

Highly Interleaved 5-bit, 250-MSample/s, 1.2-mW ADC With Redundant Channels in 65-nm CMOS

Abstract: This successive approximation register ADC uses time-interleaving to gain the energy advantage of slower circuits (reduced supply voltage and improved bias points) without sacrificing high speed operation. The drawbacks of interleaving are addressed through architectural solutions. Channel redundancy counteracts the severe yield loss that parallel circuits experience due to local variation. Clock partitioning restricts the distribution of the precise, high-speed sampling clock to three centrally located sampling networks. Only a low frequency clock is distributed across the majority of die area. The skew-resistant global top-plate sampling network is extended to allow overlapped sampling windows without introducing extra sources of crosstalk. The 36 -way interleaved 5-bit ADC operates with a core voltage of 800 mV and consumes 1.20 mW total power at 250 MS/s. At Nyquist, the SNDR is 28.4 dB. The 6 redundant channels (17% overhead) increase the yield of the 24 measured chips from 42% to 88%.

Dynamic Element Matching to Prevent Nonlinear Distortion From Pulse-Shape Mismatches in High-Resolution DACs

Abstract: This paper shows analytically and experimentally that properly-designed dynamic element matching (DEM) eliminates pulse shape, timing, and amplitude errors arising from component mismatches as sources of nonlinear distortion in high-resolution DACs. A set of sufficient conditions on the DEM encoder that ensure this effect, and a specific segmented DEM encoder that satisfies the sufficient conditions are presented. Unlike most previously published DEM encoders, the new DEM encoder's complexity does not grow exponentially with the number of bits of DAC resolution, so it is practical for high-resolution Nyquist-rate DACs. These analytical results are demonstrated experimentally with a 0.18 mum CMOS 14-bit DAC IC that has a sample rate of 100 MHz and worst case, single and two-tone spurious-free dynamic ranges of 83 dB and 84 dB, respectively, across the Nyquist band.

Phased Array Antenna Applications on Universal Frequency Translation

Abstract: A universal frequency translation module (UFT) frequency translates an electromagnetic (EM) input signal by sampling the EM input signal according to a periodic control signal (also called an aliasing signal). By controlling the relative sampling time, the UFT module implements a relative phase shift during frequency translation. In other words, a relative phase shift can be introduced in the output signal by sampling the input signal at one point in time relative to another point in time. As such, the UFT module can be configured as an integrated frequency translator and phase-shifter. This includes the UFT module as an integrated down-converter and phase shifter, and the UFT module as an integrated up-converter and phase shifter. Applications of universal frequency translation and phase shifting include phased array antennas that utilize integrated frequency translation and phase shifting technology to steer the one or more main beams of the phased array antenna.

A 1.8-V 22-mW 10-bit 30-MS/s Pipelined CMOS ADC for Low-Power Subsampling Applications

Abstract: This paper describes a 10-bit 30-MS/s subsampling pipelined analog-to-digital converter (ADC) that is implemented in a 0.18 mum CMOS process. The ADC adopts a power efficient amplifier sharing architecture in which additional switches are introduced to reduce the crosstalk between the two opamp-sharing successive stages. A new configuration is used in the first stage of the ADC to avoid using a dedicated sample-and-hold amplifier (SHA) circuit at the input and to avoid the matching requirement between the first multiplying digital-to-analog converter (MDAC) and flash input signal paths. A symmetrical gate-bootstrapping switch is used as the bottom-sampling switch in the first stage to enhance the sampling linearity. The measured differential and integral nonlinearities of the prototype are less than 0.57 least significant bit (LSB) and 0.8 LSB, respectively, at full sampling rate. The ADC exhibits higher than 9.1 effective number of bits (ENOB) for input frequencies up to 30 MHz, which is the twofold Nyquist rate (fs/2), at 30 MS/s. The ADC consumes 21.6 mW from a 1.8-V power supply and occupies 0.7 mm2, which also includes the bandgap and buffer amplifiers. The figure-of-merit (FOM) of this ADC is 0.26 pJ/step.

Real time en face Fourier-domain optical coherence tomography with direct hardware frequency demodulation.

Abstract: We demonstrate en face swept source optical coherence tomography (ss-OCT) without requiring a Fourier transformation step. The electronic optical coherence tomography (OCT) interference signal from a k-space linear Fourier domain mode-locked laser is mixed with an adjustable local oscillator, yielding the analytic reflectance signal from one image depth for each frequency sweep of the laser. Furthermore, a method for arbitrarily shaping the spectral intensity profile of the laser is presented, without requiring the step of numerical apodization. In combination, these two techniques enable sampling of the in-phase and quadrature signal with a slow analog-to-digital converter and allow for real-time display of en face projections even for highest axial scan rates. Image data generated with this technique is compared to en face images extracted from a three-dimensional OCT data set. This technique can allow for real-time visualization of arbitrarily oriented en face planes for the purpose of alignment, registration, or operator-guided survey scans while simultaneously maintaining the full capability of high-speed volumetric ss-OCT functionality.

Coherent signal rejection in ecg

Abstract: A method for monitoring an electrocardiogram (ECG) signal of a subject, includes digitally sampling an average signal from at least a first ECG electrode, determining an average interference frequency, and digitally sampling and buffering a raw ECG signal from at least a second ECG electrode. The method further includes: filtering the raw ECG signal to generate a residual signal; calculating, based on the residual signal, a first amplitude and a first phase shift of a primary interference signal at the average interference frequency and a second amplitude and a second phase shift of one or more harmonic interference signals at respective multiples of the average interference frequency; and digitally subtracting the primary interference signal and the one or more harmonic interference signals from the raw ECG signal so as to generate and output a clean ECG signal.

Accurate and Efficient Traffic Monitoring Using Adaptive Non-Linear Sampling Method

Abstract: Sampling technology has been widely deployed in measurement systems to control memory consumption and processing overhead. However, most of the existing sampling methods suffer from large estimation errors in analyzing small-size flows. To address the problem, we propose a novel adaptive non-linear sampling (ANLS) method for passive measurement. Instead of statically configuring the sampling rate, ANLS dynamically adjusts the sampling rate for a flow depending on the number of packets having been counted. We provide the generic principles guiding the selection of sampling function for sampling rate adjustment. Moreover, we derive the unbiased flow size estimation, the bound of the relative error, and the bound of required counter size for ANLS. The performance of ANLS is thoroughly studied through theoretic analysis and experiments under synthetic/real network data traces, with comparison to several related sampling methods. The results demonstrate that the proposed ANLS can significantly improve the estimation accuracy, particularly for small-size flows, while maintain a memory and processing overhead comparable to existing methods.

Efficient sampling of sparse wideband analog signals

Abstract: Periodic nonuniform sampling is a known method to sample spectrally sparse signals below the Nyquist rate. This strategy relies on the implicit assumption that the individual samplers are exposed to the entire frequency range. This assumption becomes impractical for wideband sparse signals. The current paper proposes an alternative sampling stage that does not require a full-band front end. Instead, signals are captured with an analog front end that consists of a bank of multipliers and lowpass filters whose cutoff is much lower than the Nyquist rate. The problem of recovering the original signal from the low-rate samples can be studied within the framework of compressive sampling. An appropriate parameter selection ensures that the samples uniquely determine the analog input. Moreover, the analog input can be stably reconstructed with digital algorithms. Numerical experiments support the theoretical analysis.

Ultrasonic diagnostic apparatus

Abstract: An ultrasonic diagnostic apparatus capable of obtaining phase information of ultrasonic waves reflected at respective sampling points within an object to be inspected and displaying the phase information in an easy-to-understand-way. The ultrasonic diagnostic apparatus includes: a transmitting and receiving unit for converting reception signals outputted from plural ultrasonic transducers, which have transmitted ultrasonic waves and received ultrasonic echoes, into digital signals; reception focus processing means for performing reception focus processing on the digital signals to generate a sound ray signal along a reception direction of ultrasonic waves; first calculating means for performing quadrature detection processing on the sound ray signal to generate a complex baseband signal; second calculating means for obtaining phase information of the complex baseband signal; and image signal generating means for generating an image signal representing phase rotation of the complex baseband signal at plural sampling points along the reception direction of ultrasonic waves based on the phase information of the complex baseband signal.

Tuning of control loops for grid connected voltage source converters

Abstract: Traditional tuning techniques like modulus optimum or symmetrical optimum can be applied to the design of control loops for many power electronic applications When directly implemented in digital control systems, this will lead to reduced stability margins since the sampling effects are not taken into account for the controller design This paper is investigating a method for obtaining discrete time equivalents to the traditional tuning techniques and shows the application of the obtained criteria to the control loops of a grid connected voltage source converter A bilinear transform from the discrete time z-domain to a virtual frequency w-domain is utilized to obtain the discrete time tuning criteria By this, similar derivations as for obtaining the traditional continuous time criteria can be carried out to obtain equivalent analytical criteria that are valid for design of discrete time controllers The results are applied to both continuous time and discrete time controllers of the presented example, to discuss the influence of the sampling effects on the controller performance

Adaptive clock and equalization control systems and methods for data receivers in communications systems

Abstract: Systems and methods for adaptive clock and equalization control are provided for data receivers, which are based on a “closed loop” sampling clock framework that employs controllable and dynamically adapted time offsets on both local data and amplitude clocks. The controllable clock offsets are dynamically adapted using signal processing methods adapted to achieve optimum sampling of data and amplitude sampling clock signals to accurately detect data bits and optimize system equalization settings, including, decision-feedback equalizer and/or an optional linear equalizer preceding a decision-feedback equalizer.

Medical device for monitoring biological signals

Abstract: A medical device having a sensor for sampling a biological signal, the biological signal representing a signal waveform and forming a waveform vector composed of the biological signal samples, and a memory for storing a least two threshold vectors composed of boundary samples representing at least two boundaries related to the biological signal defining subspaces for the biological signal samples. One threshold vector is an upper threshold vector composed of upper boundary samples and the other threshold vector is a lower threshold vector composed of lower boundary samples. An evaluation unit connected to the sensor determines a similarity index (ASCI) by comparing each of the biological signal samples of the waveform vector to corresponding boundary samples of the threshold vectors, thus determining to which subspace each biological signal sample belongs to and creating a trichotomized signal vector, and calculating the signed correlation product of two trichotomized signal vectors.

A 14 mW Fractional- N PLL Modulator With a Digital Phase Detector and Frequency Switching Scheme

Abstract: In this work an all-digital phase detector for a fractional-N PLL is proposed and demonstrated. The phase detector consists of a single flip-flop, which acts as an oversampled 1 bit phase quantizer. A digital sampling scheme that enables FSK modulation rates much larger than the loop bandwidth is demonstrated, without compromising on the frequency accuracy of the output signal. A prototype 2.2 GHz fractional-N synthesizer incorporating the digital phase detector and sampling scheme is presented as a proof of concept. Although the loop bandwidth is only 142 kHz, an FSK modulation rate of 927.5 kbs is achieved. The 0.7 mm2 prototype is implemented in 0.13 mum CMOS consumes 14 mW from a 1.4 V supply.