Showing papers on "Sampling (signal processing) published in 2010"

Beyond Nyquist: Efficient Sampling of Sparse Bandlimited Signals

Abstract: Wideband analog signals push contemporary analog-to-digital conversion (ADC) systems to their performance limits. In many applications, however, sampling at the Nyquist rate is inefficient because the signals of interest contain only a small number of significant frequencies relative to the band limit, although the locations of the frequencies may not be known a priori. For this type of sparse signal, other sampling strategies are possible. This paper describes a new type of data acquisition system, called a random demodulator, that is constructed from robust, readily available components. Let K denote the total number of frequencies in the signal, and let W denote its band limit in hertz. Simulations suggest that the random demodulator requires just O(K log(W/K)) samples per second to stably reconstruct the signal. This sampling rate is exponentially lower than the Nyquist rate of W hertz. In contrast to Nyquist sampling, one must use nonlinear methods, such as convex programming, to recover the signal from the samples taken by the random demodulator. This paper provides a detailed theoretical analysis of the system's performance that supports the empirical observations.

Improved single channel backpropagation for intra-channel fiber nonlinearity compensation in long-haul optical communication systems

Abstract: Backpropagation has been shown to be the most effective method for compensating intra-channel fiber nonlinearity in long-haul optical communications systems. However, effective compensation is computationally expensive, as it requires numerous steps and possibly increased sampling rates compared with the baud rate. This makes backpropagation difficult to implement in real-time. We propose: (i) low-pass filtering the compensation signal (the intensity waveform used to calculate the nonlinearity compensation) in each backpropagation step and (ii) optimizing the position of the nonlinear section in each step. With numerical simulations, we show that these modifications to backpropagation improve system performance, reducing the number of backpropagation steps and reducing the oversampling for a given system performance. Using our ‘filtered backpropagation’, with four backpropagation steps operating at the same sampling rate as that required for linear equalizers, the Q at the optimal launch power was improved by 2 dB and 1.6 dB for single wavelength CO-OFDM and CO-QPSK systems, respectively, in a 3200 km (40 × 80km) single-mode fiber link, with no optical dispersion compensation. With previously proposed backpropagation methods, 40 steps were required to achieve an equivalent performance. A doubling in the sampling rate of the OFDM system was also required. We estimate this is a reduction in computational complexity by a factor of around ten.

Discrete-Time Current Regulator Design for AC Machine Drives

Abstract: This paper analyzes the behavior of discrete-time current regulators for ac machines operating at high ratios of fundamental-to-sampling frequencies, a situation common for high-speed automotive drives and large-traction drives. At high ratios of fundamental-to-sampling frequencies, highly oscillatory, or unstable, response can occur if the current regulator design does not properly incorporate the effects of the discrete nature of the controller, including delays between the sampling of signals and the application of the voltage commands through pulse-width modulation (PWM). This paper investigates these issues for different design methods and current regulator topologies. As part of this investigation, a simple discrete-time domain ac machine model is developed that includes the delays associated with PWM. This model is then used to design a discrete-time domain version of the complex vector PI current regulator that demonstrates improved response compared with the other regulators studied. Simulation and experimental results are provided to compare the performance, stability, and robustness of the current regulators analyzed.

Compressive acquisition of dynamic scenes

Abstract: Compressive sensing (CS) is a new approach for the acquisition and recovery of sparse signals and images that enables sampling rates significantly below the classical Nyquist rate. Despite significant progress in the theory and methods of CS, little headway has been made in compressive video acquisition and recovery. Video CS is complicated by the ephemeral nature of dynamic events, which makes direct extensions of standard CS imaging architectures and signal models infeasible. In this paper, we develop a new framework for video CS for dynamic textured scenes that models the evolution of the scene as a linear dynamical system (LDS). This reduces the video recovery problem to first estimating the model parameters of the LDS from compressive measurements, from which the image frames are then reconstructed. We exploit the low-dimensional dynamic parameters (the state sequence) and high-dimensional static parameters (the observation matrix) of the LDS to devise a novel compressive measurement strategy that measures only the dynamic part of the scene at each instant and accumulates measurements over time to estimate the static parameters. This enables us to considerably lower the compressive measurement rate considerably. We validate our approach with a range of experiments including classification experiments that highlight the effectiveness of the proposed approach.

A 40GS/s 6b ADC in 65nm CMOS

Abstract: Progress in 40Gb/s optical dual- polarization (DP) QPSK systems inspired an idea of 100G transmission by optical frequency division multiplexing (FDM) of QPSK-modulated channels [1]. A practical solution suggests two 58Gb/s DP QPSK channels, spaced by 50GHz (Fig. 21.7.1). The challenge is in implementing a 6b ADC operating at sampling rate of 29Gs/s, as compared to 24Gs/s reported before [2]. The other challenge is reduction of ADC sampling jitter. In an interleaved architecture, jitter is limited by the timing mismatch between the clocks of T&H circuits. While initial timing error is compensated during ADC calibration, its spread over the input frequency range and drift may still impact jitter performance. This paper presents, to our knowledge for the first time, a 6b ADC operating up to 40Gs/s with power dissipation ≪ 1.5W. The 30% margin for the sampling rate reduces interleaved timing errors and therefore sampling jitter below 0.25ps-rms. The ADC also includes on-chip test signal synthesizer that generates a gigahertz range sinusoidal signal to simplify production testing.

A Four-Channel Time-Interleaved ADC With Digital Calibration of Interchannel Timing and Memory Errors

Abstract: An 11-bit 160-MS/s four-channel time-interleaved double-sampled pipelined ADC implemented in a 0.35-μm CMOS process is described. Digital calibration is used to correct mismatch errors between channels as well as the memory errors that arise from the use of double sampling. The signal-to-noise-and-distortion ratio is improved from 45 to 62 dB after calibration with an 8.7-MHz input. The spurious-free dynamic range is increased from 47 dB to 79 dB.

Generic real-time uniform K-space sampling method for high-speed swept-source optical coherence tomography.

Abstract: We developed a universal, real-time uniform K-space sampling (Rt-UKSS) method for high-speed swept-source optical coherence tomography (SS-OCT). An external clock uniform in K-space was generated. The clock was synchronized with the zero-crossing time of an interferometric calibration signal and used as triggers for a high-speed data acquisition system in a point-by-point fashion, hence enabling uniform data sampling in K-space. Different from the numerical calibration algorithm commonly used in an SS-OCT system, the method reported here does not require over-sampling, thus greatly reducing the demand for digitization, data processing and storage speed. The Rt-UKSS method is adaptive and applicable to a generic SS-OCT system of a wide range of A-scan rates without special adjustment. We successfully implemented the Rt-UKSS method in an SS-OCT system based on a Fourier-domain mode-locked laser (FDML) of a 40-kHz scanning rate. Real-time imaging of biological tissues using such a system was demonstrated with a measured axial resolution of 9.3 μm and detection sensitivity greater than 120dB.

A signal-agnostic compressed sensing acquisition system for wireless and implantable sensors

Abstract: A signal-agnostic compressed sensing (CS) acquisition system is presented that addresses both the energy and telemetry bandwidth constraints of wireless sensors. The CS system enables continuous data acquisition and compression that are suitable for a variety of biophysical signals. A hardware efficient realization of the CS sampling demonstrates data compression up to 40x on an EEG signal while maintaining low perceptual loss in the reconstructed signal. The proposed system also simultaneously relaxes the noise and resolution constraints of the analog front end (AFE) and ADC by nearly an order of magnitude. The CS sampling hardware is implemented in a 90 nm CMOS process and consumes 1.9 µW at 0.6 V and 20 kS/s.

Digital coherent receiving apparatus

Abstract: A digital coherent receiving apparatus includes a first oscillator for outputting a local light signal of a fixed frequency, a hybrid unit mixing the local light signal with a light signal received by a receiver, a second oscillator for outputting a sampling signal of a sampling frequency, a converter for converting the mixed light signal into digital signal synchronizing with the sampling signal, a waveform adjuster for adjusting a waveform distortion of the converted digital signal, a phase adjustor for adjusting a phase of the digital signal adjusted by the waveform adjustor, a demodulator for demodulating the digital signal adjusted by the phase adjuster, and a phase detector for detecting a phase of the digital signal adjusted by the phase adjuster, and a control signal output unit for outputting a frequency control signal on the basis of the detected phase signal to the second oscillator.

A Two-Step Compressed Spectrum Sensing Scheme for Wideband Cognitive Radios

Abstract: For cognitive radios (CRs), compressive sampling (CS) techniques have been utilized for spectrum sensing in order to alleviate the high signal acquisition costs in the wideband regime. Given the desired sensing performance, the fundamental limit on the sampling rates is determined by the actual sparsity order S_{nz} of the signal spectrum, which can be considerably lower than the Nyquist sampling rate. However, S_{nz} is time-varying and hence unknown a priori for a dynamic CR network, and is typically available in the form of its statistical upper bound S_{max}. When the practical sampling rate is chosen according to S_{max} in lieu of S_{nz}, this rate is unnecessarily high for accurate spectrum sensing and hence wasteful of the sensing resources. To circumvent this problem, this paper develops a two-step compressed spectrum sensing (TS-CSS) scheme for efficient wideband sensing. The first step quickly estimates the actual sparsity order of the wide spectrum of interest using a small number of samples, and the second step adjusts the total number of samples collected according to the estimated signal sparsity order. By doing so, the overall sampling rate is minimized adaptively. The cornerstone of this work is the fact that the number of measurements required for estimating the signal sparsity order is (much) smaller than that for reconstructing the sparse signal itself. The gap between these two numbers is delineated in this paper in closed form, which offers valuable design guideline. Validated by simulations, the proposed TS-CSS scheme achieves the desired sensing performance at considerably reduced sensing costs, using a lowered average sampling rate compared with traditional one-step compressive sampling schemes.

Sample Value Adjustment Improves Phasor Estimation at Off-Nominal Frequencies

Abstract: This paper presents an algorithm for better phasor estimation at off-nominal frequencies. The sampling rate remains unchanged, but instead the amplitude of the sample values within a buffer is altered in order to give a signal of the same amplitude but different frequency. The re-calculation of the samples is done by second order spline interpolation. The effect is that the signal frequency appears to be changed to nominal. The algorithm requires knowledge of the frequency, which has to be determined by other means. It can only be used for filters with a finite window length, such as finite-impulse response filters. The proposed algorithm gives a maximum magnitude error of less than 0.1% for frequency deviations up to 10% from nominal. The proposed algorithm does not need any over-sampling and re-sampling to a lower sampling rate. It helps preserve the desired frequency characteristics of filters at off-nominal frequencies. This paper presents a simulation example, which uses an off-nominal test signal of 55 Hz with a 10% second harmonic. The result indicates that this test signal might cause problems for some phasor algorithms, but the proposed sample value adjustment algorithm handles this test case efficiently and complies with Level 1 of IEEE Standard C37.118-2005.

Organic light emitting diode display and method for driving the same

Abstract: Disclosed are an organic light emitting diode display, which can reduce image sticking caused by the deterioration of an organic light emitting diode, and a driving method thereof. The organic light emitting diode display comprises: a display panel comprising a plurality of pixels arranged in a matrix at intersections of gate line portions and data line portions and each having an organic light emitting diode; a memory for storing compensation data; a timing controller for modulating input digital video data based on the compensation data and generating modulated data; and a data driving circuit for, during compensation driving, generating the compensation data to compensate for a difference in the deterioration of the organic light emitting diodes by supplying a sensing voltage to the pixels and sampling the threshold voltage of the organic light emitting diodes, which is fed back from the pixels, and for, during normal driving, converting the modulated data into a data voltage and supplying the data voltage to the pixels.

Robust EPI Nyquist ghost elimination via spatial and temporal encoding.

Abstract: Nyquist ghosts are an inherent artifact in EPI acquisitions. An approach to robustly eliminate Nyquist ghosts is presented that integrates two previous Nyquist ghost correction techniques: temporal domain encoding (Phase Labeling for Additional Coordinate Encoding: PLACE) and spatial domain encoding (Phased Array Ghost Elimination: PAGE). Temporal encoding modulates the EPI acquisition trajectory from frame to frame, enabling one to interleave data to remove inconsistencies that occur between sampling on positive and negative gradient readouts. With PLACE, one can coherently combine the interleaved data to cancel residual Nyquist ghosts. If the level of ghosting varies significantly from image to image, however, the signal cancellation that occurs with PLACE can adversely affect SNR-sensitive applications such as perfusion imaging with Arterial Spin Labeling (ASL). This work proposes integrating PLACE into a PAGE-based reconstruction process to yield significantly better Nyquist ghost correction that is more robust than PLACE or PAGE alone. The robustness of this method is demonstrated in the presence of magnetic field drift with an in-vivo ASL perfusion experiment.

A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration

Abstract: Wireless communication applications have driven the development of high-resolution A/D converters (ADCs) with high sample rates, good AC performance and IF sampling capability to enable wider cellular coverage, more carriers, and to simplify the system design. We describe a 16b ADC with a sample rate up to 250MS/s that employs background calibration of the residue amplifier (RA) gain errors. The ADC has an integrated input buffer and is fabricated on a 0.18µm BiCMOS process. When the input buffer is bypassed, the SNR is 77.5dB and the SFDR is 90dB at 10MHz input frequency. With the input buffer, the SNR is 76dB and the SFDR is 95dB. The ADC consumes 850mW from a 1.8V supply, and the input buffer consumes 150mW from a 3V supply. The input span is 2.6Vp-p and the jitter is 60fs.

Model Reference Adaptive Control Using Simultaneous Probing, Estimation, and Control

Abstract: Recently the use of a linear periodic controller has been proposed to solve the model reference adaptive control problem. The resulting controller can handle rapid changes in plant parameters, and it can provide nice transient behavior with arbitrarily good steady-state tracking using a control signal which remains modest in size. However, it also has some undesireable features: i) the proposed sampled-data controller achieves good performance by using a small sampling period, which results in large gains and a correspondingly poor noise tolerance, ii) a rapidly varying control signal is used, which may require a fast actuator, and iii) the closer to optimality that we wish to get, the more complex the controller. In this paper, we completely redesign the control law to significantly alleviate these problems; the new design provides better noise performance, especially when the sign of the high frequency gain is known, uses a smoother and smaller control signal, has a fixed complexity, independent of the desired level of performance, and is more intuitively appealing, in that probing, estimation, and control are now carried out in parallel rather than in series.

Switching power supply controller with selective feedback sampling and waveform approximation

Abstract: A switching power supply controller which includes at least one switching element, and controls a switching cycle during which the switching elements are switched on and off to regulate the power supply's output voltage. The controller has a feedback signal which represents the output voltage, and a circuit node which conducts a current that is higher during a second portion of the switching cycle than it is during a first portion, such that the feedback signal varies with the current conducted by the node. To overcome feedback signal inaccuracies, a sampling circuit samples a signal which varies with the feedback signal only during the first portion of the switching cycle; the controller then regulates the output voltage in response to the sampled signal. The sampling circuit may be further arranged to produce an output which approximates the portion of the feedback signal waveform which is not sampled.

A Wideband Spectrum Sensing Method for Cognitive Radio using Sub-Nyquist Sampling

Abstract: Spectrum sensing is a fundamental component in cognitive radio. A major challenge in this area is the requirement of a high sampling rate in the sensing of a wideband signal. In this paper a wideband spectrum sensing model is presented that utilizes a sub-Nyquist sampling scheme to bring substantial savings in terms of the sampling rate. The correlation matrix of a finite number of noisy samples is computed and used by a subspace estimator to detect the occupied and vacant channels of the spectrum. In contrast with common methods, the proposedmethod does not need the knowledge of signal properties that mitigates the uncertainty problem. We evaluate the performance of this method by computing the probability of detecting signal occupancy in terms of the number of samples and the SNR of randomly generated signals. The results show a reliable detection even in low SNR and small number of samples.

Sweep MRI with algebraic reconstruction.

Abstract: In the recently proposed technique Sweep Imaging with Fourier Transform (SWIFT), frequency-modulated radiofrequency pulses are used in concert with simultaneous acquisition to facilitate MRI of samples with very short transverse relaxation time. In the present work, sweep MRI is reviewed from a reconstruction perspective and several extensions and modifications of the current methodology are proposed. An algorithm for algebraic image reconstruction is derived from a comprehensive description of signal formation, including interleaved radiofrequency transmission and acquisition of arbitrary timing as well as the relevant filtering and decimation steps along the receiver chain. The new reconstruction approach readily permits several measures of optimising the signal sampling strategy as demonstrated in simulations and imaging experiments. Employing a variety of radiofrequency pulse envelopes, water and rubber phantoms as well as bone samples with transverse relaxation time in the order of 500 μsec were imaged at signal bandwidths of up to 96 kHz.

Xampling: Analog Data Compression

Abstract: We introduce Xampling, a design methodology for analog compressed sensing in which we sample analog bandlimited signals at rates far lower than Nyquist, without loss of information. This allows compression together with the sampling stage. The main principles underlying this framework are the ability to capture a broad signal model, low sampling rate, efficient analog and digital implementation and lowrate baseband processing. In order to break through the Nyquist barrier so as to compress the signals in the sampling process, one has to combine classic methods from sampling theory together with recent developments in compressed sensing. We show that previous attempts at sub-Nyquist sampling suffer from analog implementation issues, large computational loads, and have no baseband processing capabilities. We then introduce the modulated wideband converter which can satisfy all the Xampling desiderata. We also demonstrate a board implementation of our converter which exhibits sub-Nyquist sampling in practice.

Systems and methods for load compensation with primary-side sensing and regulation for flyback power converters

Abstract: System and method for regulating an output voltage of a power conversion system. The system includes a sampling component located on a chip configured to receive an input voltage through a terminal. The sampling component is configured to sample the input voltage and generate a sampled voltage. Additionally, the system includes an error amplifier configured to process information associated with the sampled voltage and a threshold voltage and generate a first output signal, and a first signal generator configured to generate a second output signal and one or more third output signals. Moreover, the system includes a comparator configured to receive the first output signal and the second output signal and generate a comparison signal, and a gate driver directly or indirectly coupled to the comparator and configured to generate a drive signal based on at least information associated with the comparison signal.

Compressive sensing: From “Compressing while Sampling” to “Compressing and Securing while Sampling”

Abstract: In a traditional signal processing system sampling is carried out at a frequency which is at least twice the highest frequency component found in the signal This is in order to guarantee that complete signal recovery is later on possible The sampled signal can subsequently be subjected to further processing leading to, for example, encryption and compression This processing can be computationally intensive and, in the case of battery operated systems, unpractically power hungry Compressive sensing has recently emerged as a new signal sampling paradigm gaining huge attention from the research community According to this theory it can potentially be possible to sample certain signals at a lower than Nyquist rate without jeopardizing signal recovery In practical terms this may provide multi-pronged solutions to reduce some systems computational complexity In this work, information theoretic analysis of real EEG signals is presented that shows the additional benefits of compressive sensing in preserving data privacy Through this it can then be established generally that compressive sensing not only compresses but also secures while sampling

Continuous-Time Input Pipeline ADCs

Abstract: Two continuous-time input pipeline ADC architectures are introduced. The continuous-time input approach overcomes many of the challenges associated with a pure switched-capacitor architecture. The resistive input load of the two new architectures provides a benign interface to external drive circuitry. The switched-capacitor sampling function is moved to the second stage input which greatly eases the sampling distortion requirements and obviates the need for an explicit front-end sample-and-hold function. The second ADC presented additionally provides inherent anti-alias filtering, allowing the possibility of eliminating costly anti-alias filters. This second architecture also eases the jitter requirements of the ADC clock when compared to switched capacitor pipeline ADCs. Measured results obtained from two proof of concept test chips fabricated in a 0.18 μm CMOS process validate the effectiveness of the proposed techniques.

Capacitive sensing analog front end

Abstract: A capacitive sensing analog front end for a touchscreen system having an improved signal-to-noise ratio includes a capacitance-to-voltage converter having an input for coupling to an external sampling capacitor, a summer having a first input coupled to an output of the capacitance-to-voltage converter, a low pass filter having an input coupled to an output of the summer and an output for providing an output signal; and a sample-and-hold circuit having an input coupled to the output of the low pass filter and an output coupled to a second input of the summer The signal-to-noise ratio of the touchscreen system is improved by extracting the DC shift of a touch signal during a monitoring period and then subtracting the DC shift before integrating the touch signal

Adaptive Sampling Rate Correction for Acoustic Echo Control in Voice-Over-IP

Abstract: Hands-free terminals for speech communication employ adaptive filters to reduce echoes resulting from the acoustic coupling between loudspeaker and microphone. When using a personal computer with commercial audio hardware for teleconferencing, a sampling frequency offset between the loudspeaker output D/A converter and the microphone input A/D converter often occurs. In this case, state-of-the-art echo cancellation algorithms fail to track the correct room impulse response. In this paper, we present a novel least mean square (LMS-type) adaptive algorithm to estimate the frequency offset and resynchronize the signals using arbitrary sampling rate conversion. In conjunction with a normalized LMS-type adaptive filter for room impulse response tracking, the proposed system widely removes the deteriorating effects of a frequency offset up to several Hz and restores the functionality of echo cancellation.

Imbalance and distortion cancellation for composite analog to digital converter (ADC)

Abstract: Imbalance and distortion cancellation for composite analog to digital converter (ADC). Such an ‘ADC’ is implemented using two or more ADCs may be employed for sampling (e.g., quantizing, digitizing, etc.) of an analog (e.g., continuous time) signal in accordance with generating a digital (e.g., discrete time) signal. Using at least two ADCs allows for the accommodation and sampling of various signals having a much broader dynamic range without suffering degradation in signal to noise ratio (SNR). Generally, the signal provided via at least one of the paths corresponding to at least one of the respective ADCs is scaled (e.g., attenuated), so that the various ADCs effectively sample signals of different magnitudes. The ADCs may respectively correspond to different magnitude and/or power levels (e.g., high power, lower power, any intermediary power level, etc.). Various implementations of compensation may be performed along the various paths corresponding to the respective ADCs.

In-pixel correlated double sampling pixel

Abstract: An in-pixel correlated double sampling (CDS) pixel and methods of operating the same are provided. The CDS pixel includes a photodetector to accumulate radiation induced charges, a floating diffusion element electrically coupled to an output of the photodetector through a transfer switch, and. a capacitor-element having an input node electrically coupled to an amplifier and through the amplifier to the floating diffusion element and an output node electrically coupled to an output of the pixel. The capacitor-element is configured to sample a reset value of the floating diffusion element during a reset sampling and to sample a signal value of the floating diffusion element during a signal sampling.

Metop-GRAS in-orbit instrument performance

Abstract: The GRAS instrument on the Metop-A satellite provides more than 600 radio occultation measurement profiles per day. The instrument is characterized by its wide antenna coverage, high signal-to-noise ratio and an ultra-stable clock reference. The conventional dual-frequency tracking of GPS signals is under dynamic atmosphere conditions complemented by open loop tracking with sampling of the signal at a 1 kHz rate, providing an unprecedented view of the signal spectral environment. This paper presents the instrument performance as derived from analysis of in-orbit measurement data. We show that the noise figure is low enough to enable mapping of external radio noise variations over the earth’s surface. An error propagation model is presented to relate instrument characteristics to bending angle performance. This model is also used to illustrate the relation between filter bandwidth, resolution and measurement noise. The Doppler model, guiding open loop measurements, is found to be accurate to better than 20 Hz with a possibility for improvement to 10 Hz. The high performance at low altitudes enables the presence of surface reflections at the −20-dB level to be identified in more than 50% of the occultations. The potential performance improvements for next generation receivers are discussed.

Pulse width modulation frequency conversion

Abstract: A pulse width modulation (PWM) frequency converter (100) converts an input PWM signal to an output PWM signal having a different frequency while maintaining a substantially equal duty ratio. The PWM frequency converter (100) samples the input PWM signal for a PWM cycle using a sampling clock (112). A filter module (108) filters the resulting set of one or more PWM parameters to compensate for noise introduced by potential clock mismatch, clock jitter, ambient variations, and other non-deterministic issues, thereby generating filtered PWM parameters. The sampling employed by the filter module compares a difference between the one or more current PWM parameters and previous (or historical) PWM parameters from an earlier sampled PWM cycle to a predetermined change threshold in determining a filtered set of one or more PWM parameters. The filtered set of one or more PWM parameters then is used to generate one or more corresponding PWM cycles of the output signal.

Memory controller and device with data strobe calibration

Abstract: A memory controller comprises a DQ path, a DQS path, a delay element, a flip flop, and an adjustment unit The DQ path receives and passes a data signal, and outputs a delayed data signal The DQS path receives and passes a data strobe signal The delay element is coupled to the DQS path, receiving the data strobe signal to generate a compensated data strobe signal having a calibrated latency The calibrated latency is determined by an adjustment signal The flip flop is coupled to the data signal path and the delay element, sampling the delayed data signal by the compensated data strobe signal to generate an output data The adjustment unit generates the adjustment signal according to the output data The adjustment unit performs a calibration to adjust the adjustment signal, thus the calibrated latency is adjusted

Electrostatic capacitive type touch panel and display device equipped with a touch detection function

Abstract: Disclosed is an electrostatic capacitive type touch panel which has a simple construction and makes it possible to reduce noise due to external interference and to shorten the touch detection time. The touch panel is provided with: a plurality of drive electrodes to which drive signals for touch detection are applied; a plurality of touch detection electrodes that output detection signals synchronised with the drive signals, and are arranged intersecting the drive electrodes; a first series of sampling circuits (A/D conversion circuits (72, 73)) that extract a first series of sampling signals including a signal component of a first level and a noise component from the detection signals; second sampling circuits (A/D conversion circuits (75, 76)) that extract a second series of sampling signals including a signal component of a second level different from the first level and a noise component from the detection signals; filter circuits (digital LPFs (81, 82)) that perform high-band cut-off processing in respect of the first and second series of sampling signals; and a calculation circuit (subtraction circuit (90)) that finds a touch detection signal from the outputs of the filter circuits.