Showing papers on "Schottky barrier published in 1975"

A review of the theory and technology for ohmic contacts to group III–V compound semiconductors

Abstract: The technology for ohmic contacts to group III–V compound semiconductors is reviewed in this paper. The basic principles of current transport in metal-semiconductor (Schottky barrier) contacts are presented first. The modes of current transport considered are thermionic emission over the barrier, and tunneling through the barrier due to thermionic-field or field emission. Special attention is devoted to the parameters of temperature and doping concentration which determine the dominant mode of conduction. As the primary mode of conduction changes from thermionic emission dominated to tunneling dominated, the current-voltage behavior of the contact changes from rectifying to ohmic in character. The experimental techniques for fabricating ohmic contacts to III–V compound semiconductors are then described. Contact problems as they pertain to specific device applications are considered. Finally, present difficulties with contacts to mixed III–V crystals are discussed.

Photovoltaic effects of metal–chlorophyll‐a–metal sandwich cells

Abstract: The microcrystalline chlorophyll−a film prepared by the method of electrodeposition is shown to have strong photovoltaic effects. The photovoltaic cell (M1‖Chl‖M2) has lamellar arrangement with the Chl−a film sandwiched between two metal electrodes. With dissimilar electrodes of different work functions, φM, the cell usually exhibits a dark rectification behavior. A large forward bias current is seen when the metal with a lower φM is the negative electrode. The rectification is small when the same metal is used as both electrodes. A blocking contact or Schottky barrier is evidently present at the Chl−a‖metal junction particularly fo the metal having a low φM. A p−type semiconduction in Chl−a is implicated. In the photovoltaic mode, cells such as (Al‖Chl‖Hg) and (Al‖Chl‖Au) have an open circuit voltage ranging from 200−500 mV. The power conversion efficiency for these cells is on the order of 10−3% which is among the highest in photovoltaic cells using organic materials. The direction of the photovoltaic c...

Conductance and capacitance studies in GaP Schottky barriers

Abstract: A study of the conductance and capacitance associated with traps in Schottky barriers is described. A sample calculation of these two quantities is developed and compared with experimental data obtained in GaP VPE saples. It is shown that traps introduce peaks on the conductance‐vs‐temperatures curves; from them the concentration of each trap can be calculated. A study at different frequencies permits the determination of the characteristics of the traps. In GaP we have observed trapping effects in donor levels at Ec−Et?100 and 86 meV, the emission rates were found, respectively, to equal 2×1011 and 2×109 s−1 for these two levels. It is also shown that photoconductance effects occur at the oxygen deep levels.

The role of the interfacial layer in metal−semiconductor solar cells

Abstract: Recent work has been reported on metal−semiconductor (Schottky barrier) solar cells in which efficiencies comparable to silicon p−n devices have been achieved. In these devices, the interfacial layer is believed to play an important role. In this discussion the nature of that role is examined. It is shown that the interfacial layer can enhance performance, and an outline for optimizing that enhancement is presented. The results are presented assuming n−type semiconductor material; however, the conclusions are equally valid for structures using p−type material.

Relation of Schottky Barriers to Empty Surface States on III-V Semiconductors

Abstract: We report new evidence that intrinsic surface states play a predominant role in determining Schottky-barrier energies for III-V semiconductors. Namely, empty surfacestate levels have been measured (using photoelectron yield spectroscopy) for (110) GaSb, GaAs, GaP, InSb, and InAs whose one-electron energies correlate with Schottky-barrier energies reported by Mead and Spitzer. Also, these sharp molecularlike surface states are shown to be insensitive to metal overlayers and to be cation derived.

An automatic carrier concentration profile plotter using an electrochemical technique

Abstract: A fully automatic system which directly plots semiconductor carrier concentration profiles to any required depth is described. An electrolytic Schottky barrier permits simultaneous controlled dissolution and capacitance-voltage measurements. Examples of profiles obtained in multiple epitaxial layer structures ofn-type gallium arsenide are given.

Metal-Induced Surface States During Schottky-Barrier Formation on Si, Ge, and Gaas

Abstract: Evidence is reported for extrinsic metal-induced surface states during the early stages of Schottky-barrier formation on Si(111), GaAs(anti 1 anti 1 anti 1), Ge(111), and Ge(100). Results on Ge(110) are related to those of Eastman and Freeouf (1975) for GaAs(110) and GaSb(110). A simple structural model is proposed to account for the anomalous results on (110) semiconductor surfaces. (WDM)

Microwave properties of nonlinear MIS and Schottky-barrier microstrip

Abstract: It is shown that metal-insulatior-semiconductor (MIS) and Schottky-barrier microstrip structures having substrate resistivities within a certain range propagate slow waves with phase velocities that are dependent upon the instantaneous voltage at each point along the line. This and other useful properties of these microstrips can be used advantageously in a number of microwave devices. Loss measurements for the MIS microstrip structure confirm the predictred frequency dependence of the attenuation constant. While the levels of measured attenuation presently achieved are fairly high (4.5 dB/cm at 1 GHz), several methods for reducing the attenuation are proposed. A number of devices are discussed, including an electronically variable phase shifter for which attenuation and phase-shift measurements are presented.

Substrate fed logic

Abstract: A novel form of integrated injection logic (I/SUP 2/L) is described, in which the device structure has been designed specifically for high packing density and low power-delay product. The basic logic element is a multi-input, multi-output gate, formed in a single-base land by using several diffused collectors and several Schottky base contacts. The lateral p-n-p injector of conventional I/SUP 2/L has been replaced by a vertical arrangement. Factors affecting packing density and power-delay product in I/SUP 2/L are analyzed and design considerations for the new structure are given. A preliminary process to demonstrate the feasibility of the vertical injector is described and the measured transistor parameters and power-delay product are given. Experiments to determine suitable conditions for the formation of Schottky barrier diodes are presented, and satisfactory performance for the complete process is demonstrated.

Avalanche injection into the oxide in silicon gate-controlled devices—I theory

Abstract: The avalanche injection into the oxide region of silicon gate-controlled devices is analysed in some detail, in terms of the physical theory of hot electrons in silicon as developed by Bartelink, Moll and Meyer. Numerically computed universal plots are given for the calculation of the hot-carrier injection ratio (avalanche-induced gate current over junction current) at given maximum interface electric field at breakdown. Features such as barrier reflexion due to transverse momentum of electrons, non-normal orientation of the electric field and Schottky barrier lowering have been incorporated in the analysis. Values of the hot-carrier injection ratio in positive-gate biased p+−n diodes (electron injection) calculated in this theory range between 4·3 × 10−4 and 4·7 × 10−3 for maximum interface electric fields at breakdown between 1·0 × 106 V/cm and 1·4 × 106 V/cm, if the fitting parameters of the above quoted physical theory are used.

Temperature effects in Schottky-barrier silicon solar cells

Abstract: Experimental results are reported concerning temperature effects from 25 to 125 °C on Schottky‐barrier solar cells which were fabricated using a semitransparent Cu/Cr barrier metal layer on p‐type silicon. The open‐circuit voltage decreased by 2.3 mV/°C and the fill factor by 0.11%/°C, while the short‐circuit current increased slightly with increased temperature. These results are consistent with previous work on p‐n–junction silicon solar cells. The diode quality factor n was shown to decrease with increased temperature, as predicted by field emission theory. The room‐temperature photovoltaic output of cell 96 remained at 0.54 V, 25.4 mA/cm2, and 8.5–10.6% efficiency using 80–100‐mW/cm2 sunlight illumination after repeated temperature cycling.

Semiconductor profiling using an optical probe

Abstract: The use of a small spot of light for the detection of semiconductor inhomogeneities, is described. The method employed involves a scanned measurement of the surface photovoltage generated in the surface space charge region of the semiconductor. It is shown that scanned surface photovoltage signals may be used to detect defects in Si using either MOS, Schottky barrier or electrolyte contacts to sense the signal. Furthermore, from a spectral measurement it is possible to monitor the variation of carrier lifetime across the area of the sample. It has proven possible using the technique to detect both gross defects in the Si as well as to measure, on a point by point basis, the reduction in carrier lifetime due to them.

Cobalt silicide layers on Si. II. Schottky barrier height and contact resistivity

Abstract: Cobalt silicide layers have been grown by electron‐beam vacuum deposition of Co onto Si wafers and subsequent thermal treatment. The barrier height φB and contact resistivity ρc of the Co‐Si contacts were determined from current‐voltage characteristics. The barrier height for Co on P‐type Si decreases on annealing and reaches a value of 0.38 eV after annealing at 450 °C. The barrier height on N‐type Si is then 0.68 eV. Presumably these are the values for a CoSi‐Si contact. Annealing at higher temperatures results in a higher barrier (0.40 eV) on P‐type Si and a lower barrier on N‐type Si, probably by the formation of CoSi2. The values for the contact resistivity on P‐type Si were determined using a transmission‐line model and found to be comparable to those for Al‐Si contacts. Annealing above 400 °C results in a decrease of the contact resistivity, mainly due to an increase in the boron concentration. By annealing above 500 °C the contact resistivity increases again, in agreement with the increased barrie...

GaAs dual-gate Schottky-barrier FET's for microwave frequencies

Abstract: The benefits inherent in the tetrode structure and the potential of GaAs are combined to realized a dual-gate FET with low noise and a wide dynamic range at microwave frequencies. A design theory of the dual-gate FET is constructed on the basis of the Lehovec-Zuleeg model for single-gate FET's. The theory has led to a new device structure having a second gate with a deeper pinchoff voltage than the first which shows improved gain and noise performance. Also derived is the importance of minimizing parasitic feedthrough due, for example, to packages. Samples were fabricated using n-type epitaxial GaAs. The first and second gates were Schottky barriers, 1.2 and 2.5 µm long. The improved channel structure was accomplished by reducing the thickness of the epitaxial layer under the first gate. Samples were mounted and characterized in specially designed small-size ceramic packages with a feedthrough capacitance of only 0.004 pF. The possibility of gain control by means of second gate bias over a wide bandwidth is demonstrated.

Outmigration of gallium from Au-GaAs interfaces

Abstract: Experimental evidence is presented which suggests that the degradation of Au-GaAs Schottky-barriers after annealing is due to the outmigration of gallium into the gold, resulting in the formation of an n+ region beneath the contact.

Investigation of defects and striations in as‐grown Si crystals by SEM using Schottky diodes

Abstract: As‐grown silicon crystals are investigated in the scanning electron microscope using Schottky barrier diodes in the electron‐beam‐induced current mode. Dislocations, A‐ and B‐type swirl defects, as well as dopant striations are detected. In high‐resistivity crystals (∼1000 Ω cm) variations in dopant concentration of 1012 cm−3 are readily revealed. Hydrogen doping is found to eliminate preferential recombination at microdefects. It is established that bulk stresses due to carbon striations have no detectable electrical effect.

Schottky I/sup 2/L

Abstract: Schottky I/SUP 2/L uses the principles of integrated injection logic (I/SUP 2/L/MTL) and the properties of ion implantation to obtain improved performance at the same densities as conventional I/SUP 2/L. Schottky diodes are formed in the multicollectors of the switching transistor and reduce the signal swing, thus improving the power delay efficiency. An increase in the intrinsic speed limit is also feasible. The Schottky I/SUP 2/L structure and characteristics are described and contrasted with conventional I/SUP 2/L. A model which is useful for its design is discussed. Integrated test structures which provide direct comparison between conventional and Schottky I/SUP 2/L performance have been fabricated. The experimental results demonstrate a factor of 2 improvement in power-delay efficiency of Schottky I/SUP 2/L over conventional I/SUP 2/L.

Photoemission study of the formation of Schottky barriers

Abstract: For the first time, changes in electronic structure have been studied during Schottky barrier (Cs on GaAs or InP) formation. Strong changes occur near the valence band maximum; however, these do not overcome a dominant role of intrinsic surface states in Fermi‐level pinning.

A deep center associated with the presence of nitrogen in GaP

Abstract: The deep−level thermal activation energy spectrum of N−doped liquid−phase−epitaxial (LPE) and liquid−encapsulated−Czochralski (LEC) −grown GaP has been investigated using Schottky barrier thermally stimulated−current (TSC) measurements. We detect a center at Ec−Et=0.42 eV whose presence in the lattice depends on the deliberate addition of N to the material. The concentration of this center varies approximately as (Nd−Na)2 in n−type material, and the value of electron capture cross section for the center (St≈7×10−15 cm2) indicates that it could be a strong recombination center in N−doped p−type GaP. Separate experiments suggest that this center is strongly localized, and that it is not a simple complex involving shallow donors and native defects.

Electroluminescence in zinc selenide

Abstract: The electroluminescent properties of Schottky diodes formed from single cyrstals of zinc selenide containing manganese, manganese and aluminium, aluminium or chlorine are discussed. All such diodes emitted a yellow band of variable width in reverse bias, the maximum of which lay between wavelengths of 5785 (2·14 eV) and 6050 A (2·05 eV). Optimum emission was obtained from ZnSe:Mn diodes where luminances of 500 ft L were achieved at a power efficiency of 1·9 × 10−3%. Maximum efficiency of 3 × 10−3% was obtained at a slightly lower luminance of 300 ft L. The ZnSe:Mn diodes exhibited the characteristic manganese emission in reverse bias in a narrow band centred at 5785 A (2·14 eV). The presence of foreign donors such as aluminium reduced the luminance and the efficiency. This, coupled with a slight shift of the emission to longer wavelengths and a broadening of the emission band, is associated with the onset of the excitation of the self-activated emission which increased with increasing donor content. The self-activated emission in electroluminescence was found at 6300 A (1·97 eV) in ZnSe:Al and at 5900 A, (2·1 eV) in ZnSe:Cl. Forward bias electroluminescence was only observed in diodes which contained a relatively thick (∼200 A) insulating layer under the Schottky contact. Forward electroluminescence was at least an order of magnitude less bright than reverse EL.

Gunn device gigabit rate digital microcircuits

Abstract: Monolithic integration of planar Gunn devices on GaAs is a very promising method to realize microcircuits for the Gbit/s range. Semiinsulating GaAs is readily available as substrate material. In this paper estimates of characteristic parameters of these circuits, such as maximum pulse rate, power consumption, and package density, are presented. Three different methods of domain control are available: a) by separate Schottky barrier diode; b) by MESFET; or c) by Schottky barrier gate on the channel of the Gunn device. Theoretical limits for these methods are given. Maximum pulse rates of 11, 5, and 7 Gbit/s, respectively, can be expected. Unidirectionality and trigger drive of the three methods are rated. Experimental integrated circuits were built to demonstrate the capability of the methods of domain control. Comparison with calculations yields good agreement. Coming close to the theoretical limits has not yet been accomplished in all practical cases since further miniaturization of the circuits and improvement of the material properties relevant to domain processes is needed. After progress in these two points it is expected that the theoretical limits will be reached.

Submillimeter detection using a Schottky diode with a long‐wire antenna

Abstract: A Schottky diode originally made for use as a detector and a mixer in the millimeter‐waveglength region has been used as a room‐temperature fast detector in the submillimeter‐wavelength region. A voltage responsivity of 2 V/W and an NEP of 1×10−7 W/Hz1/2 at 337 μm were obtained by using high‐gain long‐wire‐antenna coupling. The experimental and theoretical responses of the antenna structure are compared.

I-V characteristics for Silicon Schottky solar cells

Abstract: A special-layered Schottky solar cell has been constructed which produces 95-percent sunlight efficiency over a 1-cm2area This solar cell has a fill factor of 060 compared to 058 for a commercial p-n silicon cell Series resistance of 5 Ω is shown to reduce the theoretical fill factor from 067 to 042 for a Schottky cell The diode quality factor n is shown to significantly increase open-circuit voltage and yet not appreciably influence the fill factor

Gallium antimonide surface states and Schottky-barrier pinning

Abstract: Photoemission measurements on GaSb indicate no surface states in the band gap. Deposition of Cs to form a Schottky barrier on n-GaSb moves the Fermi level 0.55 eV and produces pinning within the band gap. Thus, for the first time, Schottky-barrier pinning without the presence of intrinsic surface states in the gap is directly demonstrated. (WDM)

I‐V Characteristics of PtSi ‐ Si Contacts Made from CVD Platinum

Abstract: Small amounts of phosphorus codeposit during the chemical vapor deposition of thin‐film platinum from . Because of the possibility that the P may dope a narrow zone of adjacent Si during silicide formation, the room temperatureI‐V characteristics of such contacts made at 450°–700°C to various Si types were investigated. CVD Pt readily forms in a few minutes at temperatures as low as 450°C. Contacts to n+ or p+ Si made at 450°–700°C are ohmic. Contacts formed at 450°C to lightly doped n‐Si are good quality Schottky barrier diodes with a barrier height of 0.84 eV and an "ideality factor" . At higher sintering temperatures the reverse current increases, and with sintering at 650°–700°C the contact becomes ohmic. In the case of lightly doped p‐Si, contacts made at 450°C from CVD Pt have an ohmic room‐temperature characteristic, as expected. If the silicide is made at 700°C, a p‐n junction is created in the p‐Si. contacts made from CVD Pt at 450°C are thus electrically equivalent to those made from sputtered Pt at ~ 600°C. At higher formation temperatures, deviations from expected behavior are observed, all of which are consistent with diffusion of phosphorus from the into the Si to a depth in the range 10–100A.