Showing papers on "Schottky barrier published in 2006"
TL;DR: This approach has the potential of converting mechanical, vibrational, and/or hydraulic energy into electricity for powering nanodevices.
Abstract: We have converted nanoscale mechanical energy into electrical energy by means of piezoelectric zinc oxide nanowire (NW) arrays. The aligned NWs are deflected with a conductive atomic force microscope tip in contact mode. The coupling of piezoelectric and semiconducting properties in zinc oxide creates a strain field and charge separation across the NW as a result of its bending. The rectifying characteristic of the Schottky barrier formed between the metal tip and the NW leads to electrical current generation. The efficiency of the NW-based piezoelectric power generator is estimated to be 17 to 30%. This approach has the potential of converting mechanical, vibrational, and/or hydraulic energy into electricity for powering nanodevices.
6,692 citations
TL;DR: The Schottky barrier height in metal/Ge contacts shows weak dependence on the metal work function indicating strong Fermi-level pinning close to the Bardeen limit.
Abstract: The Schottky barrier height in metal/Ge contacts shows weak dependence on the metal work function indicating strong Fermi-level pinning close to the Bardeen limit. The pinning factor S is about 0.05 and the charge neutrality level (CNL) is only about 0.09eV above the top of the valence band. Because of this, the Fermi level in Ge lies higher than CNL in most cases of interest so that unpassivated acceptorlike gap states at the interface are easily filled, building up a net negative fixed charge. This could prevent efficient inversion of a p-type Ge surface in a metal-oxide-semiconductor structure.
541 citations
TL;DR: The metal source/drain (S/D) Schottky-barrier (SB) MOSFET technology as mentioned in this paper offers several benefits that enable scaling to sub-30-nm gate lengths.
Abstract: In this paper, the metal source/drain (S/D) Schottky-barrier (SB) MOSFET technology is reviewed. The technology offers several benefits that enable scaling to sub-30-nm gate lengths including extremely low parasitic S/D resistance (1% of the total device resistance), atomically abrupt junctions that enable the physical scaling of the device to sub-10-nm gate lengths, superior control of OFF-state leakage current due to the intrinsic Schottky potential barrier, and elimination of parasitic bipolar action. These and other benefits accrue using a low-thermal-budget CMOS manufacturing process requiring two fewer masks than conventional bulk CMOS. The SB-CMOS manufacturing process enables integration of critical new materials such as high-k gate insulators and strained silicon substrates. SB MOSFET technology state of the art is also reviewed, and shown to be focused on barrier-height-lowering techniques that use interfacial layers between the metal S/Ds and the channel region. SB-PMOS devices tend to have superior performance compared to NMOS, but NMOS performance has recently improved by using ytterbium silicide or by using hybrid structures that incorporate interfacial layers to lower the SB height.
486 citations
TL;DR: A generic process for fabricating a vertical surround-gate field-effect transistor (VS-FET) based on epitaxially grown nanowires is described, and a first electrical characterization proving the feasibility of the process developed and the basic functionality of this device is presented.
Abstract: Semiconducting nanowires have recently attracted considerable attention. With their unique electrical and optical properties, they offer interesting perspectives for basic research as well as for technology. A variety of technical applications, such as nanowires as parts of sensors, and electronic and photonic devices have already been demonstrated. In particular, electronic applications come more and more into focus, as the ongoing miniaturization in microelectronics demands new innovative solutions. Semiconducting nanowires, in particular epitaxially grown silicon (Si) nanowires, are considered as promising candidates for post-CMOS (CMOS: complementary metal–oxide semiconductor) logic elements owing to their potential compatibility with existing CMOS technology. One major advantage of vapor–liquid– solid(VLS-) grown nanowires compared to top-down fabricated devices is that they have well-defined surfaces. This reduces surface scattering, an issue which becomes important for devices on the nanoscale. Moreover, epitaxially grown nanowires circumvent the problem of handling and positioning nanometer-sized objects that arises in the conventional pick-and-place approach, where devices are fabricated by manipulating horizontally lying VLS-grown nanowires. The first step towards a technical realization of a nanowire logic element is the design and manufacturing of a nanowire transistor. The epitaxial growth of vertical nanowires offers advantages over other approaches: For example, the transistor gate can be wrapped around the vertically oriented nanowire. Such a wrapped-around gate allows better electrostatic gate control of the conducting channel and offers the potential to drive more current per device area than is possible in a conventional planar architecture. In this Communication, a generic process for fabricating a vertical surround-gate field-effect transistor (VS-FET) based on epitaxially grown nanowires is described. Exemplarily, we used Si nanowires and present a first electrical characterization proving the feasibility of the process developed and the basic functionality of this device. Figure 1a shows a schematic cross section through a conventional p-type MOSFET. In such a device, an inversion channel can be created close to the gate by applying a negative gate voltage. This forms a conducting channel that connects the p-doped regions between the source and drain contacts electrically. Using this concept, a silicon nanowire VS-FET would ideally require a nanowire that is n-doped in the region of the gate and p-doped elsewhere. Unfortunately, such a p-n-p structure with abrupt transitions appears difficult to realize if the nanowires are grown by means of the vapor–liquid–solid mechanism using gold as a catalyst. The difficulty here is that the dopant atoms, which are dissolved in the catalyst droplet, might act as a reservoir, thus creating a graded transition when switching to another dopant. Therefore, we used a structure consisting of an n-doped silicon nanowire grown on a p-type substrate (see Figure 1b). If the gate–drain and gate–source distances are not too long, it is electrostatically still possible to create an inversion channel along the length of the entire wire. In the proposed configuration, the p–n junction at the source contact (Figure 1a) is replaced by a Au/n-Si Schottky contact at the nanowire tip. In order to investigate the influence of the Au/n-Si Schottky contact on the nanowire (current–voltage) I–V characteristics, an array of n-doped nanowires vertically grown on an n-type (111)-oriented substrate was imbedded in a spin-coated SiO2 matrix. After removing the thin SiO2 coverage from the Au tips by a short reactive ion etching, contacts 0.6 mm in size were defined by evaporating aluminum onto the sample, such that approximately 10 nanowires were contacted in parallel. The temperature-dependent measurements (shown in Figure 2) were performed by applying a voltage to the Si substrate, while the Al top contact was held at a constant potential. The measurements reveal a strong rectifying behavior with a thermally activated current possessing an activation energy of 0.6 eV. This can be explained by the Au/n-Si Schottky contact dominating the I–V behavior. The fact that the Schottky contact is forward-biased for negative voltages furthermore proves that, as expected, electrons act as majority charge carries. Figure 1. Schematics of a) a conventional p-channel MOSFET and b) a silicon nanowire vertical surround-gate field-effect transistor.
419 citations
TL;DR: Highly sensitive single-walled carbon nanotube-field effect transistor (SWNT-FET) devices, which detect protein adsorptions and specific protein-protein interactions at 1 pM concentrations, have been achieved and the detection limit has been improved 104-fold compared to the devices fabricated by photolithography.
Abstract: Highly sensitive single-walled carbon nanotube-field effect transistor (SWNT-FET) devices, which detect protein adsorptions and specific protein−protein interactions at 1 pM concentrations, have been achieved. The detection limit has been improved 104-fold compared to the devices fabricated by photolithography. The substantially increased sensitivity is mainly due to the increased Schottky contact area which accommodates relatively more numbers of proteins even at very low concentration. The augmented number of proteins adsorbed on a device induces instant modulation of the work function of metal contact electrodes, which eventually changes the conductance of the device. Such devices have been attained by addressing metal electrodes on network-type SWNTs using a shadow mask on a tilted angle sample stage. The shadow mask allows metals to penetrate underneath the mask efficiently, therefore forming a thin and wide Schottky contact area on SWNT channels.
277 citations
TL;DR: In this article, the authors modeled the transport in the nanowire as in a metal-semiconductor-metal structure involving two Schottky barriers and a resistor in between these barriers.
Abstract: Electrical transport measurements were conducted on semiconducting nanowires and three distinct current-voltage (I-V) characteristics were observed, i.e., almost symmetric, almost rectifying, and almost linear. These I-V characteristics were modeled by treating the transport in the nanowire as in a metal-semiconductor-metal structure involving two Schottky barriers and a resistor in between these barriers, and the transport is shown to be dominated by the reverse-biased Schottky barrier under low bias and by the semiconducting nanowire at large bias. In contrast to the conventional Schottky diode, the reverse current in the nano-Schottky barrier structure is not negligible and the current is largely tunneling rather than thermionic. Experimental I-V curves are reproduced very well using our model, and a method for extracting nanowire resistance, electron density, and mobility is proposed and applied to ZnO, CdS, and Bi2S3 nanowires.
276 citations
TL;DR: Schottky barrier field effect transistors based on individual catalytically-grown and undoped Si-nanowires (NW) have been fabricated and characterized with respect to their gate lengths, and the transistors displayed p-type behaviour, sustained current densities, and on/off current ratios.
Abstract: Schottky barrier field effect transistors based on individual catalytically-grown and undoped Si-nanowires (NW) have been fabricated and characterized with respect to their gate lengths. The gate length was shortened by the axial, self-aligned formation of nickel-silicide source and drain segments along the NW. The transistors with 10−30 nm NW diameters displayed p-type behaviour, sustained current densities of up to 0.5 MA/cm2, and exhibited on/off current ratios of up to 107. The on-currents were limited and kept constant by the Schottky contacts for gate lengths below 1 μm, and decreased exponentially for gate lengths exceeding 1 μm.
244 citations
TL;DR: The performance and reliability issues unique to SiC discussed here include: (a) MOS channel conductance/gate dielectric reliability trade-off due to lower channel mobility as well as SiC–SiO2 barrier lowering due to interface traps; (b) reduction in breakdown field and increased leakageCurrent due to material defects; and (c) increased leakage current in SiC Schottky devices at high temperatures.
230 citations
TL;DR: In this article, the CdS/CdTe solar cell with a CdTe/metal back-contact barrier is modeled by two opposite polarity diodes in series.
208 citations
TL;DR: This work presents a radically different approach for spin-tunnelling resistance control using low-work-function ferromagnets, inserted at the FM/tunnel barrier interface and demonstrates that in this way the resistance–area (RA) product of FM/Al2O3/Si contacts can be tuned over eight orders of magnitude, while simultaneously maintaining a reasonable tunnel spin polarization.
Abstract: Magnetic tunnel junctions have become ubiquitous components appearing in magnetic random-access memory, read heads of magnetic disk drives and semiconductor-based spin devices. Inserting a tunnel barrier has been key to achieving spin injection from ferromagnetic (FM) metals into GaAs, but spin injection into Si has remained elusive. We show that Schottky barrier formation leads to a huge conductivity mismatch of the FM tunnel contact and Si, which cannot be solved by the well-known method of adjusting the tunnel barrier thickness. We present a radically different approach for spin-tunnelling resistance control using low-work-function ferromagnets, inserted at the FM/tunnel barrier interface. We demonstrate that in this way the resistance–area (RA) product of FM/Al2O3/Si contacts can be tuned over eight orders of magnitude, while simultaneously maintaining a reasonable tunnel spin polarization. This raises prospects for Si-based spintronics and presents a new category of ferromagnetic materials for spin-tunnel contacts in low-RA-product applications.
180 citations
TL;DR: In this paper, the temperature dependence of barrier height of high quality Pd Schottky contacts on (0001)-oriented ZnO thin films by temperature-dependent current-voltage and capacitance voltage measurements was investigated.
Abstract: We have investigated the temperature dependence of the barrier height of high-quality Pd Schottky contacts on (0001)-oriented ZnO thin films by temperature-dependent current-voltage and capacitance-voltage (CV) measurements. The films have been grown by pulsed-laser deposition. The effective Schottky barrier height ΦB,eff deduced from the current-voltage measurements was evaluated by considering a Gaussian barrier height distribution with a standard deviation σ around a mean barrier height ΦB,m. We determined ΦB,m=(1.16±0.04)eV which agrees well with the value of 1.14eV determined by CV measurements. The standard deviation is determined to be (134±10)meV.
TL;DR: In this article, Pd, Pt, Au, and Ag Schottky diodes with low ideality factors were fabricated on the Zn-polar (0001) and Opolar faces of bulk, single crystal ZnO wafers.
Abstract: Planar Pd, Pt, Au, and Ag Schottky diodes with low ideality factors were fabricated on the Zn-polar (0001) and O-polar (0001¯) faces of bulk, single crystal ZnO wafers. The diodes were characterized by current-voltage and capacitance-voltage measurements. A polarity effect was observed for Pt and Pd diodes with higher quality barriers achieved on the O-polar face. No significant polarity effect was observed for Au or Ag diodes. The highest barriers were achieved with Ag as the Schottky metal with barrier heights varying between 0.77 and 1.02eV. This is possibly due to varying degrees of oxidation of the Ag contacts.
TL;DR: By imposing an ultrathin insulator between low-work function metals and silicon, the Schottky barrier of the junction can be substantially reduced, decreasing junction resistance as discussed by the authors, and this approach, low-Schottky-barrier metal source/drain transistors with Mg and Yb as S/D metals are demonstrated.
Abstract: By imposing an ultrathin insulator between low-work function metals and silicon, the Schottky barrier of the junction can be substantially reduced, decreasing junction resistance. With this approach, low-Schottky-barrier metal source/drain (S/D) transistors with Mg and Yb as S/D metals are demonstrated.
TL;DR: In this paper, the effect of monolayer quality on the electrical transport through n-Si/CnH2n+1/Hg junctions was investigated and it was shown that high quality layers yield the type of data, reported by us in Phys. Rev. Lett. 2005, 95, 266807, data that are consistent with the theoretically predicted behavior of a Schottky barrier coupled to a tunnel barrier.
Abstract: We study the effect of monolayer quality on the electrical transport through n-Si/CnH2n+1/Hg junctions (n = 12, 14, and 18) and find that truly high quality layers and only they, yield the type of data, reported by us in Phys. Rev. Lett. 2005, 95, 266807, data that are consistent with the theoretically predicted behavior of a Schottky barrier coupled to a tunnel barrier. By using that agreement as our starting point, we can assess the effects of changing the quality of the alkyl monolayers, as judged from ellipsometer, contact angle, XPS, and ATR-FTIR measurements, on the electrical transport. Although low monolayer quality layers are easily identified by one or more of those characterization tools, as well as from the current−voltage measurements, even a combination of characterization techniques may not suffice to distinguish between monolayers with minor differences in quality, which, nevertheless, are evident in the transport measurement. The thermionic emission mechanism, which in these systems domin...
Proceedings Article•
01 Jun 2006TL;DR: In this paper, a dopant segregated Schottky barrier (DSSB) SONOS device as a form of double-gate (DG) is demonstrated for NOR Flash memory applications, which results in a high-speed programming (V th shift of 4.2V @ 320ns) at a low program bias (V gs /V ds =7V/3V).
Abstract: A novel dopant segregated Schottky barrier (DSSB) SONOS device as a form of double-gate (DG) is demonstrated for NOR Flash memory applications. The DSSB also applies to all-around-gate (AAG) SONOS devices. The source side injection caused by sharp energy band bending in the DSSB device results in a high-speed programming (V th shift of 4.2V @ 320ns) at a low program bias (V gs /V ds =7V/3V). Moreover, faster program speed in a narrower fin width (W fin ) due to its low parasitic resistance and enhanced gate controllability is achieved. Drain disturbance-free characteristics in a programmed cell are confirmed as well.
TL;DR: In this paper, a 15-nm Si3N4 layer is inserted under the metal gate to provide additional isolation between the gate Schottky contact and AlGaN surface, which can lead to reduced gate leakage current and higher gate turn-on voltage.
Abstract: Enhancement-mode Si3N4/AlGaN/GaN metal-insulator-semiconductor HFETs (MISHFETs) with a 1-mum gate footprint are demonstrated by combining CF4 plasma treatment technique and a two-step Si3N4 deposition process. The threshold voltage has been shifted from -4 [for depletion-mode HFET] to 2 V using the techniques. A 15-nm Si3N4 layer is inserted under the metal gate to provide additional isolation between the gate Schottky contact and AlGaN surface, which can lead to reduced gate leakage current and higher gate turn-on voltage. The two-step Si 3N4 deposition process is developed to reduce the gate coupling capacitances in the source and drain access region, while assuring the plasma-treated gate region being fully covered by the gate electrode. The forward turn-on gate bias of the MISHFETs is as large as 7 V, at which a maximum current density of 420 mA/mm is obtained. The small-signal RF measurements show that the current gain cutoff frequency (fT) and power gain cutoff frequency (fmax) are 13.3 and 23.3 GHz, respectively
TL;DR: In this article, fine control of p-, n-, and ambipolar-type field effect transistor (FET) operations is successfully demonstrated in prototypical single-crystal organic FETs with use of chemically tunable nature of Fermi energy in tetrathiafulvalene-tetracyanoguinodimethane-based organic metal electrodes.
Abstract: Fine control of p-, n-, and ambipolar-type field-effect transistor (FET) operations is successfully demonstrated in prototypical single-crystal organic FETs with use of chemically tunable nature of Fermi energy in tetrathiafulvalene-tetracyanoguinodimethane-based organic metal electrodes. Carrier-type preference and rectifying nature in the organic-organic contacts are revealed in terms of the FET operations as well as of the all-organic Schottky diode characteristics.
TL;DR: In this article, the p-type behavior of Sb-doped ZnO was studied by carrying out I-V and capacitance-voltage (C-V) measurements.
Abstract: Antimony (Sb) doping was used to realize p-type ZnO films on n-Si (100) substrates by molecular beam epitaxy. These samples were fabricated into p-n heterojunction diodes. p-type behavior of Sb-doped ZnO was studied by carrying out I-V and capacitance-voltage (C-V) measurements. I-V curves showed rectifying behavior similar to a p-type Schottky diode with a turn-on voltage around 2.4V, which is consistent with the Schottky barrier of about 2.2V obtained from C-V characterization. Good photoresponse in the UV region was obtained, which further proved that Sb doping could be used to fabricate p-type ZnO for photodetector and other optoelectronic applications.
TL;DR: In this article, single-walled carbon nanotube (CNT) gas sensors were fabricated by dielectrophoresis onto microelectrodes made of Cr, Pd or Al.
Abstract: Single-walled carbon nanotube (CNT) gas sensors were fabricated by dielectrophoresis onto microelectrodes made of Cr, Pd or Al. The Al/CNT sensor response to NO2 (nitrogen dioxide) gas was characterized by fast and large resistance increase at the moment of NO2 exposure, whereas the resistance of the other metal/CNT sensors monotonously decreased. It was suggested that the adsorbed NO2 molecules might alter the Schottky barrier at the Al/CNT interface as well as the positive hole density in the p-type semiconducting CNT. The Al/CNT sensor response could be interpreted as a superposition of the Schottky contact resistance and the CNT resistance, which were differently influenced by the NO2 adsorption and contributed to the overall sensor response. The Schottky response of the Al/CNT sensor was approximately one order of magnitude faster than the CNT response obtained using the other metal electrodes. © 2005 Elsevier B.V. All rights reserved.
TL;DR: In this article, the I-V characteristics of metal-insulator-semiconductor Al/SiO"2/p-Si (MIS) Schottky diodes were measured at room temperature (300K) and capacitance-voltage-frequency (C-V-f) characteristics were investigated by considering the interface states at frequency range 100kHz to 1MHz.
TL;DR: In this article, the temperature dependence of the forward I-V characteristics of the Al/Si3N4/p-Si Schottky barrier diodes can be successfully explained on the basis of TE mechanism with a Gaussian distribution of the barrier heights.
TL;DR: In this article, the impact of threading dislocation density on Ni∕n-GaN Schottky barrier diode characteristics was investigated using forward biased current-voltage-temperature (I-V-T) and internal photoemission (IPE) measurements.
Abstract: The impact of threading dislocation density on Ni∕n-GaN Schottky barrier diode characteristics is investigated using forward biased current-voltage-temperature (I-V-T) and internal photoemission (IPE) measurements. Nominally, identical metal-organic chemical vapor deposition grown GaN layers were grown on two types of GaN templates on sapphire substrates to controllably vary threading dislocation density (TDD) from 3×107to7×108cm−2. I-V-T measurements revealed thermionic emission to be the dominant transport mechanism with ideality factors near 1.01 at room temperature for both sample types. The Schottky barrier heights showed a similar invariance with TDD, with measured values of 1.12–1.13eV obtained from fitting the I-V-T results to a thermionic emission-diffusion model. The I-V-T results were verified by IPE measurements made on the same diodes, confirming that the Ni∕n-GaN barrier heights do not show a measurable TDD dependence for the TDD range measured here. In apparent contrast to this result is th...
TL;DR: In this paper, a nonpolymeric organic compound rhodamine-101 (Rh101) film has been formed by means of the evaporation process and the Sn/rhodamine101/Si contacts have been fabricated.
Abstract: The nonpolymeric organic compound rhodamine-101 (Rh101) film on a n-type Si or p-type Si substrate has been formed by means of the evaporation process and the Sn/rhodamine-101/Si contacts have been fabricated. The Sn∕Rh101∕n-Si and Sn∕Rh101∕p-Si contacts have rectifying contact behavior with the barrier height (BH) values of 0.714 and 0.827eV, and with ideality factor values of 2.720 and 2.783 obtained from their forward bias current-voltage (I-V) characteristics at room temperature, respectively. It has been seen that the BH value of 0.827eV obtained for the Sn∕Rh101∕p-Si contact is significantly larger than BH values of the conventional Sn∕p-Si Schottky diodes and metal/interfacial layer/Si contacts. Thus, modification of the interfacial potential barrier for metal/Si diodes has been achieved using a thin interlayer of the Rh101 organic semiconductor; this has been ascribed to the fact that the Rh101 interlayer increases the effective barrier height by influencing the space charge region of Si.
TL;DR: In this article, the Schottky barrier between 6H-SiC and graphite layers grown by solid state graphitization was determined using photoelectron spectroscopy, and it was shown that these extreme values are likely to have an impact on the electrical behavior of metal/SiC contacts subjected to postdeposition anneals.
Abstract: Using photoelectron spectroscopy we have determined the Schottky barrier between 6H-SiC(0001) and graphite layers grown by solid state graphitization. For n-type 6H-SiC(0001) we find a low Schottky barrier of ϕbn=0.3±0.1eV. For p-type SiC(0001) a rather large value of ϕbp=2.7±0.1eV was determined. It is proposed that these extreme values are likely to have an impact on the electrical behavior of metal/SiC contacts subjected to postdeposition anneals.
TL;DR: The Web of Science Record (WRSR) was created on 2006-09-22, modified on 2017-05-12 as mentioned in this paper, with a new record set in 2017.
Abstract: Reference LPI-ARTICLE-2006-033doi:10.1002/adma.200502256View record in Web of Science Record created on 2006-09-22, modified on 2017-05-12
01 Oct 2006
TL;DR: In this article, the authors measure and compare the electronic transport properties of individual single-wall carbon nanotubes (SWNTs) and SWNT networks of varying thickness and show that there is no sign of Schottky barrier at the contacts between the SWNT and the metal leads.
Abstract: The authors measure and compare the electronic transport properties of individual single-wall carbon nanotubes (SWNTs) and SWNT networks of varying thickness (Skakalova, 2006). Study of electronic transport through an individual metallic SWNT suggests Luttinger liquid mechanism. Arrhenius plot shows that there is no sign of Schottky barrier at the contacts between the SWNT and the metal leads
TL;DR: In this article, a model for resistance switching in perovskite oxide-metal interfaces was proposed, where electromigration of the oxygen vacancy plays a key role in resistance switching.
Abstract: We report a first-principles study on SrRuO3∕SrTiO3 interface in the presence of the oxygen vacancy. While the oxygen vacancy on the side of SrTiO3 significantly lowers the Schottky barrier height, the oxygen vacancy close to the interface or inside the metallic electrode results in a Schottky barrier comparable to that of the clean interface. Based on these results, we propose a model for resistance-switching phenomena in perovskite oxide∕metal interfaces where electromigration of the oxygen vacancy plays a key role. Our model provides a consistent explanation of a recent experiment on resistance switching in SrRuO3∕Nb:SrTiO3 interface.
Patent•
04 Apr 2006TL;DR: In this paper, a monolithically integrated field effect transistor and Schottky diode includes gate trenches extending into a semiconductor region, where a conductor layer fills the contact opening to electrically contact.
Abstract: A monolithically integrated field effect transistor and Schottky diode includes gate trenches extending into a semiconductor region. Source regions having a substantially triangular shape clank each side of the gate trenches. A contact opening extends into the semiconductor regions between adjacent gate trenches. A conductor layer fills the contact opening to electrically contact: (a) the source regions along at leaset a portion of a slanted sidewall of each source region, and (b) the semiconductor region along a bottom portion of the contact opening, wherein the conductor layer forms a Schottky contact with the semiconductor region.
TL;DR: In this article, the authors demonstrated wide-range modulation of Schottky barrier height (SBH) of NiGe∕Ge(100) interfaces by using a valence mending adsorbate, sulfur, segregation during Ni germanidation.
Abstract: We have demonstrated wide-range modulation of Schottky barrier height (SBH) of NiGe∕Ge(100) interfaces by using a valence mending adsorbate, sulfur, segregation during Ni germanidation. Implanted sulfur atoms, segregated during Ni germanidation, are expected to act as dangling bond terminator at the NiGe∕Ge interface. The experimental results show that the strong Fermi level pinning feature of NiGe∕Ge interfaces was alleviated, and SBH of NiGe∕n-Ge(100) gradually decreased from 0.61to0.15eV with an increase in the implanted sulfur dose. This method opens a way to realize Ge channel complementary metal-oxide-semiconductor field-effect transistors with metal source/drain.