Topic
Schottky barrier
About: Schottky barrier is a research topic. Over the lifetime, 22570 publications have been published within this topic receiving 427746 citations. The topic is also known as: Schottky barrier junction.
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TL;DR: In this article, the formation of Schottky barriers has been investigated on room temperature (RT) and low temperature (LT= 80 K) GaAs. And the authors found that low temperature has opposite effects on the pinning rate of E F on n- and p-GaAs.
Abstract: Recent experiments on the formation of Schottky barriers reveal a temperature-dependent pinning of the Fermi level (E F ) which cannot be explained in terms of the current published models. Al, Au, Ag, In, and Sn are evaporated on room temperature (RT) and low temperature (LT= 80 K) cleaved n- and p-GaAs(110). We find a substantial decrease in surface metal clustering at LT, leading to more homogeneous films, especially with Al, In, and Sn. Interface mixing and chemical reaction are also partly inhibited. Cancellation of the semiconductor surface relaxation is observed for Al and Sn. From the electronic point of view, low temperature has opposite effects on the pinning rate of E F on n- andp-GaAs. Pinning on n-GaAs as a function of coverage is dramatically retarded. Pinning on p-GaAs remains faster than on n-GaAs, as fast as at RT, faster for Al and In. These asymmetric rates make it impossible to explain the initial stages of Schottky barrier formation for all substrates with a single mechanism. They suggest that several independent but concomitant mechanisms might be at work in the pinning process.
86 citations
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12 Feb 1987
TL;DR: In this paper, the Schottky barrier gate field effect transistor (SGFE transistor) was proposed, where the gate electrode is fixed to an insulative portion formed on the channel region.
Abstract: This Schottky barrier gate field effect transistor has N + -type source and drain regions formed in the surface area of a GaAs semi-insulation substrate, a channel region formed between the source and drain regions, and a gate electrode formed on this channel region. Particularly, in this Schottky barrier gate field effect transistor, the gate electrode has a first metal portion, which is preferably in Schottky contact with the channel region, and a second metal portion, which stably affixes to the first metal portion. The first and second metal portions are fixed to an insulative portion formed on the channel region.
86 citations
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TL;DR: Graphene-based Schottky junction structures are promising candidates for developing diverse novel high-efficient and low-cost photovoltaic devices, and the perspective and challenge of them are also discussed and anticipated as mentioned in this paper.
Abstract: The Schottky junction, with merits of material universality, low cost and easy fabrication, is an alternative structure for solar cells. Compared to traditional indium-tin-oxide (ITO) based Schottky junction solar cells, graphene-based ones have merits of low cost, performance stability, and are applicable to flexible devices. In this highlight, we survey the recent research on graphene-based Schottky junction solar cells, including graphene-on-silicon Schottky junction solar cells and graphene/single NW (NB) Schottky junction solar cells. The working principle of them is discussed. These works demonstrate that graphene-based Schottky junction structures are promising candidates for developing diverse novel high-efficient and low-cost photovoltaic devices. The perspective and challenge of them are also discussed and anticipated.
86 citations
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24 Nov 1980TL;DR: In this article, a method for making a MOSFET device (20) in a semiconductor body (10) includes the step of forming source and drain contact electrodes (12.1, 12.2) prior to growth of the gate oxide (10.3) and after formation of a high conductivity surface region.
Abstract: A method for making a MOSFET device (20) in a semiconductor body (10) includes the step of forming source and drain contact electrodes (12.1, 12.2) prior to growth of the gate oxide (10.3) and after formation of a high conductivity surface region (10.5). The exposed mutually opposing sidewall edges of each of the contact electrodes (12.1, 12.2) are coated with a sidewall silicon dioxide layer (15.1, 15.2), and the then exposed surface of the semiconductor body (10) between these sidewalls is etched to depth beneath the high conductivity surface region (10.5) in order to separate it into the source and drain regions (10.1, 10.2). Formation of the high conductivity region may be omitted by using Schottky barrier or impurity doped material for the contact electrodes (12.1, 12.2).
85 citations
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TL;DR: In this paper, the Schottky barrier diodes consisting of indium tin oxide (ITO) contacts on an Er-doped GaN layer grown on Si were used to obtain visible and infrared rare-earth-activated electroluminescence (EL).
Abstract: Visible and infrared rare-earth-activated electroluminescence (EL) has been obtained from Schottky barrier diodes consisting of indium tin oxide (ITO) contacts on an Er-doped GaN layer grown on Si. The GaN was grown by molecular beam epitaxy on Si substrates using solid sources for Ga, Mg, and Er and a plasma source for N2. RF-sputtered ITO was used for both diode electrodes. The EL spectrum shows two peaks at 537 and 558 nm along with several peaks clustered around 1550 nm. These emission lines correspond to atomic Er transitions to the 4I15/2 ground level and have narrow linewidths. The optical power varies linearly with reverse bias current. The external quantum and power efficiencies of GaN:Er visible light-emitting diodes have been measured, with values of 0.026% and 0.001%, respectively. Significantly higher performance is expected from improvements in the growth process, device design, and packaging.
85 citations