Semiconductor device modeling

About: Semiconductor device modeling is a research topic. Over the lifetime, 2968 publications have been published within this topic receiving 44068 citations.

Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits

Abstract: High leakage current in deep-submicrometer regimes is becoming a significant contributor to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide thickness are reduced. Consequently, the identification and modeling of different leakage components is very important for estimation and reduction of leakage power, especially for low-power applications. This paper reviews various transistor intrinsic leakage mechanisms, including weak inversion, drain-induced barrier lowering, gate-induced drain leakage, and gate oxide tunneling. Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices. Finally, the paper explores different circuit techniques to reduce the leakage power consumption.

Fundamentals of Power Semiconductor Devices

Abstract: Fundamentals of Power Semiconductor Devices provides an in-depth treatment of the physics of operation of power semiconductor devices that are commonly used by the power electronics industry. Analytical models for explaining the operation of all power semiconductor devices are shown. The treatment focuses on silicon devicesandincludes the unique attributes and design requirements for emerging silicon carbide devices.

Semiconductor Device Modeling with Spice

Abstract: From the Publisher: With all the clarity and hands-on practicality of the best-selling first edition,this revised version explains the ins and outs of SPICE,plus gives new data on modeling advanced devices such as MESFETs,ISFETs,and thyristors. And because it's the only book that describes the models themselves,it helps readers gain maximum value from SPICE,rather than just telling them how to run the program. This guide is also distinctive in covering both MOS and FET models. Step by step,it takes the reader through the modeling process,providing complete information on a variety of semiconductor devices for designing specific circuit applications. These include: Pn junction and Schottky diodes; bipolar junction transistor (BJT); junction field effect transistor (JFET); metal oxide semiconductor transistor (MOST); metal semiconductor field effect transistor (MESFET); ion sensitive field effect transistor (ISFET); semiconductor controlled rectifier (SCR-thyristor).

Semiconductor physics and devices

Abstract: Neamen's Semiconductor Physics and Devices, Third Edition. deals with the electrical properties and characteristics of semiconductor materials and devices. The goal of this book is to bring together quantum mechanics, the quantum theory of solids, semiconductor material physics, and semiconductor device physics in a clear and understandable way. Table of contents Prologue Semiconductor and the Integrated Circuit 1 The Crystal Structure of Solids 2 Introduction to Quantum Mechanics 3 Introduction to the Quantum Theory of Solids 4 The Semiconductor in Equilibrium 5 Carrier Transport Phenomena 6 Nonequilibrium Excess Carriers in Semiconductors 7 The pn Junction 8 The pn Junction Diode 9 Metal-Semiconductor and Semiconductor Heterojunctions 10 The Bipolar Transistor 11 Fundamentals of the Metal-Oxide-Semiconductor Field-Effect Transistor 12 Metal-Oxide-Semiconductor Field-Effect Transistor: Additional Concepts 13 The Junction Field-Effect Transistor 14 Optical Devices 15 Semiconductor Power Devices Appendix A Selected List of Symbols Appendix B System of Units, Conversion Factors, and General Constants Appendix C The Periodic TableAppendix D The Error FunctionAppendix E "Derivation" of Schrodinger's Wave EquationAppendix F Unit of Energy- The Electron-VoltAppendix G Answers to Selected Problems

The impact of intrinsic device fluctuations on CMOS SRAM cell stability

Abstract: Reductions in CMOS SRAM cell static noise margin (SNM) due to intrinsic threshold voltage fluctuations in uniformly doped minimum-geometry cell MOSFETs are investigated for the first time using compact physical and stochastic models. Six sigma deviations in SNM due to intrinsic fluctuations alone are projected to exceed the nominal SMM for sub-100-nm CMOS technology generations. These large deviations pose severe barriers to scaling of supply voltage, channel length, and transistor count for conventional 6T SRAM-dominated CMOS ASICs and microprocessors.