Topic
Sequential decoding
About: Sequential decoding is a research topic. Over the lifetime, 8667 publications have been published within this topic receiving 204271 citations.
Papers published on a yearly basis
Papers
More filters
21 Nov 2007
TL;DR: This paper presents the first hardware architecture for stochastic decoding of practical Low-Density Parity-Check (LDPC) codes on factor graphs and makes fully-parallel decoding of (long) state-of-the-art LDPC codes viable on FP-GAs.
Abstract: Stochastic decoding is a new alternative method for low complexity decoding of error-correcting codes. This paper presents the first hardware architecture for stochastic decoding of practical Low-Density Parity-Check (LDPC) codes on factor graphs. The proposed architecture makes fully-parallel decoding of (long) state-of-the-art LDPC codes viable on FP-GAs. Implementation results for a (1024, 512) fully-parallel LDPC decoder shows an area requirement of about 36% of a Xilinx Virtex-4 XC4VLX200 device and a throughput of 706 Mbps at a bit-error-rate of about 1-6 with performance loss0 of about 0.1 dB, with respect to the nearly ideal floating-point sum-product algorithm with 32 iterations.
47 citations
TL;DR: In this article, an iterative hard reliability-based majority-logic decoding (IHRB-MLGD) algorithm was proposed to achieve significant coding gain with small hardware overhead.
Abstract: Non-binary low-density parity-check (NB-LDPC) codes can achieve better error-correcting performance than their binary counterparts at the cost of higher decoding complexity when the codeword length is moderate. The recently developed iterative reliability-based majority-logic NB-LDPC decoding has better performance-complexity tradeoffs than previous algorithms. This paper first proposes enhancement schemes to the iterative hard reliability-based majority-logic decoding (IHRB-MLGD). Compared to the IHRB algorithm, our enhanced (E-)IHRB algorithm can achieve significant coding gain with small hardware overhead. Then low-complexity partial-parallel NB-LDPC decoder architectures are developed based on these two algorithms. Many existing NB-LDPC code construction methods lead to quasi-cyclic or cyclic codes. Both types of codes are considered in our design. Moreover, novel schemes are developed to keep a small proportion of messages in order to reduce the memory requirement without causing noticeable performance loss. In addition, a shift-message structure is proposed by using memories concatenated with variable node units to enable efficient partial-parallel decoding for cyclic NB-LDPC codes. Compared to previous designs based on the Min-max decoding algorithm, our proposed decoders have at least tens of times lower complexity with moderate coding gain loss.
47 citations
TL;DR: This paper presents an algebraic technique for decoding binary block codes in situations where the demodulator quantizes the received signal space into Q > 2 regions, applicable in principle to any block code for which a binary decoding procedure is known.
Abstract: This paper presents an algebraic technique for decoding binary block codes in situations where the demodulator quantizes the received signal space into Q > 2 regions. The method, referred to as weighted erasure decoding (WED), is applicable in principle to any block code for which a binary decoding procedure is known.
47 citations
07 Jul 2013
TL;DR: In this article, a scheme for concatenating binary polar codes with interleaved Reed-Solomon codes is proposed, which achieves the capacity-achieving property of polar codes, while having a significantly better errordecay rate.
Abstract: A scheme for concatenating the recently invented polar codes with interleaved block codes is considered. By concatenating binary polar codes with interleaved Reed-Solomon codes, we prove that the proposed concatenation scheme captures the capacity-achieving property of polar codes, while having a significantly better error-decay rate. We show that for any e > 0, and total frame length N, the parameters of the scheme can be set such that the frame error probability is less than 2-N 1-e, while the scheme is still capacity achieving. This improves upon 2-N 0.5-e, the frame error probability of Arikan's polar codes. We also propose decoding algorithms for concatenated polar codes, which significantly improve the error-rate performance at finite block lengths while preserving the low decoding complexity.
47 citations
Book•
14 Jan 2010TL;DR: This paper shows how to use this capability using a sequential decoder structure to provide powerful error correction capability, and provides significant packet loss recovery with minimal overhead.
Abstract: Reserving space for a symbol that is not in the source alphabet has been shown to provide excellent error detection. In this paper we show how to use this capability using a sequential decoder structure to provide powerful error correction capability. This joint source/channel coder design provides significant packet loss recovery with minimal overhead.
47 citations