Topic
Sequential decoding
About: Sequential decoding is a research topic. Over the lifetime, 8667 publications have been published within this topic receiving 204271 citations.
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01 Jul 2012
TL;DR: This work demonstrates how a sequential decoding approach can achieve the Holevo limit for both the contexts of optical communication and “quantum reading".
Abstract: An important practical open question has been to design explicit, structured optical receivers that achieve the Holevo limit in the contexts of optical communication and “quantum reading.” The Holevo limit is an achievable rate that is higher than the Shannon limit of any known optical receiver. We demonstrate how a sequential decoding approach can achieve the Holevo limit for both of these settings. A crucial part of our scheme for both settings is a non-destructive “vacuum-or-not” measurement that projects an n-symbol modulated codeword onto the n-fold vacuum state or its orthogonal complement, such that the post-measurement state is either the n-fold vacuum or has the vacuum removed from the support of the n symbols' joint quantum state. The sequential decoder for optical communication requires the additional ability to perform multimode optical phase-space displacements — realizable using a beamsplitter and a laser, while the sequential decoder for quantum reading also requires the ability to perform phase-shifting (realizable using a phase plate) and online squeezing (a phase-sensitive amplifier).
65 citations
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TL;DR: A decoding algorithm for algebraic geometric codes that was given by A.N. Skorobogatov and S.G. Vladut is considered and the author gives a modified algorithm, with improved performance, which he obtains by applying the above algorithm a number of times in parallel.
Abstract: A decoding algorithm for algebraic geometric codes that was given by A.N. Skorobogatov and S.G. Vladut (preprint, Inst. Problems of Information Transmission, 1988) is considered. The author gives a modified algorithm, with improved performance, which he obtains by applying the above algorithm a number of times in parallel. He proves the existence of the decoding algorithm on maximal curves by showing the existence of certain divisors. However, he has so far been unable to give an efficient procedure of finding these divisors. >
65 citations
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26 Nov 2010TL;DR: In this paper, a test error pattern may be identified which covers those affected bits (or symbols) among at least two respective signals (e.g., all of the respective signals or any subset thereof).
Abstract: Modified error distance decoding. In certain communication systems, multiple signals (e.g., which may be viewed as being codewords, groups/sets of bits or symbols, etc.) can be commonly affected by such deleterious phenomenon as burst noise when traversing a communication channel (e.g., from a transmitter communication device to a receiver communication device). In such instances, a test error pattern may be identified which covers those affected bits (or symbols) among at least two respective signals (e.g., all of the respective signals or any subset thereof). Various respective test error patterns may be employed, each having a different respective weight, to the desired group of signals (e.g., codewords, groups/sets of bits or symbols, etc.). As such, more than one possible estimate of each respective signal may be generated. A variety of selection operations may be employed when more than one possible estimate exists (e.g., random selection, that estimate with minimum distance, etc.).
64 citations
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TL;DR: This paper approaches the soft-decision KV algorithm from the point of view of a communications systems designer who wants to know what benefits the algorithm can give, and how the extra complexity introduced by soft decoding can be managed at the systems level.
Abstract: Efficient soft-decision decoding of Reed–Solomon codes is made possible by the Koetter–Vardy (KV) algorithm which consists of a front-end to the interpolation-based Guruswami–Sudan list decoding algorithm. This paper approaches the soft-decision KV algorithm from the point of view of a communications systems designer who wants to know what benefits the algorithm can give, and how the extra complexity introduced by soft decoding can be managed at the systems level. We show how to reduce the computational complexity and memory requirements of the soft-decision front-end. Applications to wireless communications over Rayleigh fading channels and magnetic recording channels are proposed. For a high-rate (RS 9225,239) Reed–Solomon code, 2–3 dB of soft-decision gain is possible over a Rayleigh fading channel using 16-quadrature amplitude modulation. For shorter codes and at lower rates, the gain can be as large as 9 dB. To lower the complexity of decoding on the systems level, the redecoding architecture is explored which uses only the appropriate amount of complexity to decode each packet. An error-detection criterion based on the properties of the KV decoder is proposed for the redecoding architecture. Queuing analysis verifies the practicality of the redecoding architecture by showing that only a modestly sized RAM buffer is required.
64 citations
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TL;DR: A novel parallel interleaver and an algorithm for its design are presented, achieving the same error correction performance as the standard architecture and achieving a very high coding gain.
Abstract: Standard VLSI implementations of turbo decoding require substantial memory and incur a long latency, which cannot be tolerated in some applications. A parallel VLSI architecture for low-latency turbo decoding, comprising multiple single-input single-output (SISO) elements, operating jointly on one turbo-coded block, is presented and compared to sequential architectures. A parallel interleaver is essential to process multiple concurrent SISO outputs. A novel parallel interleaver and an algorithm for its design are presented, achieving the same error correction performance as the standard architecture. Latency is reduced up to 20 times and throughput for large blocks is increased up to six-fold relative to sequential decoders, using the same silicon area, and achieving a very high coding gain. The parallel architecture scales favorably: latency and throughput are improved with increased block size and chip area.
64 citations