Showing papers on "Serial port published in 1998"

A portable information and transaction processing system and method utilizing biometric authorization and digital certificate security

Abstract: The present invention is a portable client PDA with a touch screen or other equivalent user interface and having a microphone and local central processing unit (CPU) for processing voice commands and for processing biometric data to provide user verification. The PDA also includes a memory for storing financial and personal information of the user and I/O capability for reading and writing information to various cards such as smartcards, magnetic cards, optical cards or EAROM cards. The PDA includes a Universal Card, which is common generic smartcard with a unique imprint provided by a service provider, on which selected financial or personal information stored in the PDA can be downloaded to perform certain consumer transactions. The PDA includes a modem, a serial port and/or a parallel port so as to provide direct communication capability with peripheral devices (such as POS and ATM terminals) and is capable of transmitting or receiving information through wireless communications such as radio frequency (RF) and infrared (IR) communication. The present invention is preferably operated in two modes, i.e., a client/server mode and a local mode.

Telecommunications adapter providing non-repudiable communications log and supplemental power for a portable programmable device

Abstract: A portable adapter that provides non-repudiable telecommunications services to bar-code reading hand-held computers and palm-top or tablet-type mobile computers is disclosed. The adapter provides supplemental power supply and processing capacity that supports API communications functions, such as interactive voice recognition, conference calling, data encryption, VoIP packetization and other signal-format conversions that are not implemented on mobile computers. In particular, the device automatically logs IP packet identifiers and DOV dialing and status signals, without the user having access to edit this information, thereby providing a "non-repudiation" record of all communications. The adapter also supports intensive use of the host computer's serial port by supplementing the power available from the host computer's battery, or replacing that battery with a connector. For plant inspection and inventory auditing, ground-based cellular communications are implemented for supporting on-site work, including conference calling to discuss apparent pilferage or imminent safety hazards, and removable WORM recording media for documenting these discussions. For repair shop use, a standard phone jack or 10-base-T connector allows the device to upload engine test-data, with reports or estimates dictated by the mechanic to the repair shop's LAN server. For hospital use, the device includes removable WORM media for logging patient test results and examination reports. The hospital device also uses a dedicated local-area RF or IR transmitter, with location-specific encryption, to protect the privacy of lab reports received by the device, and to limit use of these devices to hospital's own premises.

Mobile computing and communication system

Abstract: A dual, or single, case mobile computing and communication system with rapid mobility for usage in the field, consisting of a component mounting mechanism, a mobile computer and peripheral data switching micronetwork, an enclosed modular peripheral power system, and a plug-in modular component card system. The universal mounting mechanism holds multiple peripherals in such a way that they can be easily and quickly installed and removed from the case configuration. It locks the peripherals so they do not move during transportation. It is also low in profile so it does not obstruct the use of the items being held. The system offers rapid reaction mobility, by isolating and securing the many data and power cables necessary to connect up to 8 peripherals. The data part of this micronetwork includes data switching to connect the single computer's parallel and serial interface to these peripherals. The power system is modular and supports unique power outputs to multiple devices from either a single AC or DC input. The invention combines multiple modular component cards that snap together allowing ease of use and quick field exchange of panels for the system.

Distributed storage array system having plurality of storage devices which each of devices including a modular control unit for exchanging configuration information over a communication link

Abstract: A RAID-compatible data storage system which allows incremental increases in storage capacity at a cost that is proportional to the increase in capacity. The system does not require changes to the host system. The control and interface functions previously performed by a single (or redundant) central data storage device controller are distributed among a number of modular control units (MCUs). Each MCU is preferably physically coupled to a data storage device to form a basic, low-cost integrated storage node. One of two bus ports interfaces an MCU with the host computer on a host bus, and the other bus port interfaces an MCU with one or more data storage devices coupled to the MCU by a data storage device bus. The serial interface ports provide a means by which each of the MCUs may communicate with each other MCU to facilitate the implementation of a memory array architecture. The entire data storage array may appear as a single device capable of responding to a single identification number on the host bus, or may appear as a number of independent devices. A controlling MCU receives a command and notifies the other MCUs that are involved in a read or write operation. Control of the host bus is transferred from one MCU to the next MCU in sequence so that the data is received by the host computer, or written to each data storage device, in the proper order.

Communications webs for pstn subscribers

Abstract: Systems for connecting telecommunications infrastructure lines (640) to telephones, handsets (300), computers (200), telecopy machines (400) and other end user interfaces or consumer electronics devices in a residence or business. Systems according to the present invention include Network Control Units (100) which form the center of a star topology and which communicate via RF link with Wireless Access Units (200) and handsets (300). Wireless Access Units feature an interface, such as, for example, a standard telephone jack, for accommodating a telephone, a fax machine (400), a compute modem or other device. Computers or other devices may also be accommodated by Wireless Access Units having other physical and virtual interfaces, including, for instance, serial ports (200) or network interfaces. The Wireless Access Units may also be digital to accommodate ISDN or any other digital standard. Wireless control/monitoring accessories may also be employed to communicate with the Network Control Unit (100) and provide additional functionality such as entrance monitoring, baby monitoring, HVAC control and other services.

Method and apparatus for synchronizing devices in an audio/video system

Abstract: An audio-visual editing system includes a universal slave driver (USD) coupled between a timecode-producing device, such as a video tape deck, and a digital audio workstation (DAW). The USD includes a sample counter for counting the audio samples for each timecode frame, and a timecode reader to interpret the tape's location. An audio board of the digital audio workstation includes an identical sample counter. Both counters are driven from a common clock. A serial interface connection couples the digital audio workstation to the universal slave driver. One of the handshaking pins of the serial interface connection is used as a dedicated reset pin. When the dedicated reset pin is pulsed, the running sample counters in both the USD and DAW are set to a common value, typically zero. Resetting the sample counters at precisely the same time ensures that the DAW and the USD are operating in synchronization. Once the sample counters are set to a common value, an efficient, binary protocol may be executed over the serial interface to determine the timing relationship between the sample counters and the beginning of a frame of the off-tape timecode from the videotape/audiotape recorder. The DAW need then only refer to its own sample counter, and not to any timecode, to calculate a precise point to trigger playback.

Input/output optical fiber serial interface link that selectively transfers data in multiplex channel path mode or high speed single channel path mode

Abstract: An input/output data transfer system capable of integrating input/output data transfer on a plurality of input/output interface cables into data transfer on a single serial input/output interface cable for substantially reducing the number of input/output interface cables required for a host computer system. A multiplexer channel device is provided with a plurality of channels which serve as logical channels corresponding to conventional physical channel paths from a viewpoint of an operating system running on the host computer system. A multiplexer port device is provided with a plurality of input/output ports on a switching device or input/output device, each of these channels and ports shares a large-capacity input/output interface, and a channel path multiplexing function is performed for enabling frame-by-frame multiplexing and simultaneous input/output operations on plural channels. For each of logical channel paths multiplexed on the large-capacity link, a logical connection is established to provide compatibility with conventional input/output operations, and a data transfer capacity bandwidth of the large-capacity link is always allocated optimally to one or more active channels.

System for automatic synchronization of common file between portable computer and host computer via communication channel established with user approval of charge to be incurred

Abstract: A handheld computer which contains an LCD display having a digitizing surface to allow pen input. Internal storage takes several forms, such as a large flash ROM area, battery-backed up RAM and an optional hard disk drive. Several alternative communication paths are available, such as the previously mentioned modem, a parallel printer port, a conventional serial port, a cradle assembly connected to the host computer, and various wireless short distance techniques such as radio frequency or infrared transmission. The computer can readily communicate with other sources, particularly to a host desktop computer, to allow automated synchronization of information between the host and the handheld system. Preferably the remote synchronization is performed at several user selectable levels. When the handheld computer is in a cradle and actively connected to the host computer, automatic capture of updated data in the host computer is performed. Several synchronization techniques are utilized to keep track of different types of files. In addition, while communication is established the handheld computer can enter a remote control mode, allowing the user access to files and applications not included in the handheld computer.

Handheld computer synchronized with a host computer

Abstract: A handheld computer which contains an LCD display having a digitizing surface to allow pen input. Internal storage takes several forms, such as a large flash ROM area, battery-backed up RAM and an optional hard disk drive. Several alternative communication paths are available, such as the previously mentioned modem, a parallel printer port, a conventional serial port, a cradle assembly connected to the host computer, and various wireless short distance techniques such as radio frequency or infrared transmission. The computer can readily communicate with other sources, particularly to a host desktop computer, to allow automated synchronization of information between the host and the handheld system. Preferably the remote synchronization is performed at several user selectable levels. When the handheld computer is in a cradle and actively connected to the host computer, automatic capture of updated data in the host computer is performed. Several synchronization techniques are utilized to keep track of different types of files. In addition, while communication is established the handheld computer can enter a remote control mode, allowing the user access to files and applications not included in the handheld computer.

FireWire finally comes home

Abstract: The article discusses the IEEE 1394 networking standard, otherwise known as FireWire. FireWire was designed to link personal computers, digital cameras, televisions, DVD players, printers, and other home electronics equipment. At the time FireWire seemed like a perfect idea whose time had come, but there was one small problem: a competing technology, called Universal Serial Bus (USB), promised to do nearly the same thing. Like FireWire, USB can connect multiple peripherals to a single port on the back of our computers. But USB is designed to be a simpler, slower interface that is less expensive to manufacture. Because both technologies arrived at about the same time, hardware and software vendors had to make a choice as to which technology to develop and support. USB got the nod in the Wintel world-with Windows driver support for USB peripherals as early as October 1996-but it wasn't until Windows 98 that consumers got full OS support for USB. Early support on the Wintel platform, however, could account for the large number of USB components that have been popping up over the past two years, such as speakers, joysticks, printers, video cameras, and the like, all of which have made it to market much more quickly than FireWire based technologies. The prospect of the increasing use of FireWire is discussed.

Wireless serial port transceiver

Abstract: A pair of compact, energy-efficient, intelligent, wireless transceiver units are designed to replace the cable that interconnects a portable bar-code scanner, keyboard, and display or other host to a portable bar-code printer or the like. When reset, the units exchange linkage packets and thereby exchange addresses. Thereafter, the two units communicate in an error-free fashion with each other, even in the presence of noise and interference, by exchanging addressed packets containing error detection information. Alternate transmission frequencies are selected when transmissions cannot be received at one frequency. The host unit may maintain independent linkages with multiple printers or the like, with a switch on the host unit selecting the desired printer. Power usage is minimized by shutting down transmitters, receivers, serial port drivers, and microprocessors whenever possible, and for extended periods when data is not being transmitted.

Multi-channel serial port with programmable features

Abstract: A microprocessor 1 is described which includes a multi-channel serial port (MCSP) 120. MCSP 120 includes clock generation and frame sync generation circuitry 300, multi-channel selection circuitry 310, and companding circuitry 320. The clock generation and frame sync generation circuitry is configurable by means of a Serial Port Control Register SPCR, and Receive Control Register RCR, a Transmit Control Register XCR, a Sample Rate Generator Register SRGR, and Pin Control Register PCR. The multi-channel selection circuitry is configurable by means of a Multi-Channel Register MCR, a Receive Channel Enable Register RCER and a Transmit Channel Enable Register XCER. Companding circuitry 320 performs optional expansion or compression of received or transmitted data using μ-LAW or A-LAW, as selected by the Receive Control Register or the Transmit Control Register.

Multimedia information system

Abstract: An information browsing system has one system device and a plurality of displays connected to the system device by a general-purpose serial interface. Drawing data is transmitted through the general-purpose serial interface to the displays in a form of general-purpose serial interface so that different information is displayed on each of the displays.

Point-to-point interconnect communications utility

Abstract: An interconnect controller for use in an arbitrary topology collection of nodes in a network suitable for use for both data sharing and distributed computing. The interconnect controller provides four (4) serial ports and two (2) parallel ports for communicating with adjacent nodes in a network. Linked ports between two nodes provide a continuous stream of information with idle packets filling non-data transfer cases. The logic of the interconnect controller provides for adaptive routing and to topology independence and allows for the sharing of a common clock for synchronizing the packet transmission.

Autonomously powered communications card modem having additional communications port for use as an external modem

Abstract: A communications card modem useful as an internal modem in a personal computer (PC) is configured with an autonomous power supply and an additional communications port for converting the modem into an external modem for a mobile user input device, such as a PDA. In a preferred embodiment, the autonomous power supply is an integrated rechargeable power source, such as a secondary battery like nickel-cadmium, nickel-metal-hydroxide or lithium-ion. The secondary battery is recharged by means of the computer power supply, during use of the computer, so that a user can remove the modem from the computer and still maintain an electrical power supply for the modem. Preferred communication ports for interfacing with the user input device include serial ports such as an EIA-232-D or an IrDA port. An isolation circuit within the modem is provided to determine whether the computer power supply or the autonomous power supply is to energize the modem circuitry. A switch, operable by the user, may additionally be included to indicate to the isolation circuitry which electrical power supply should energize the modem circuitry.

Time slotted logical ring

Abstract: A Time Slotted Logical Ring protocol manages the flow of traffic in a duplex media including a cable distribution network with a head end, a local node, and a group of subscribers. The subscriber includes a cable modem which produces an HDLC serial interface which then goes to the subscriber or gets converted to ethernet by a router and then to the subscriber. The Time Slot portion of TSLR protocol manages upstream and downstream access and uses time tick identification frames in the downstream direction to control upstream traffic. A multiple logical ring protocol in TSLR is used to allocate cable bandwidth between the multiple subscribers.

Device and process for detecting errors in an integrated circuit comprising a parallel-serial port

Abstract: A device for detecting errors with an integrated self-check, on an integrated circuit comprising a serial link control function for constituting an input-output port ( 109 ) between a parallel bus (L2CB, C2LB) and a serial link. The integrated circuit comprises a serializer circuit ( 109 T ) on output and a deserializer circuit ( 109 R ) on input. An insertion buffer I-sb has each of its outputs connected to one input of an exclusive OR operation with two inputs. The second input of the exclusive OR operation receives a piece of information (o-s) to be transmitted in order to constitute, with the insertion information issuing from the insertion buffer, a piece of substitute information. An additional buffer (I-tb) makes it possible to compare the sequence supplied as output from the exclusive OR with a sequence stored in the additional buffer (I-tb) in order to validate the transmission of the substitute sequence. A history buffer (HIB) stores characters received from the deserializer and makes it possible to diagnose the error.

Two line variable word length serial interface

Abstract: In a serial interface for a programmable hearing aid, no address is provided for the data transferred to or read from the hearing aid, rather, for each instruction, the number of data words being transferred pursuant to each instruction and the beginning word are known in the controlled device. In the serial interface, the data is clocked into and out of the hearing aid on a serial data pin by a serial clock. Because no addresses are sent along with the data to the controlled device, the amount of data transferred to the hearing aid is significantly reduced, and no circuitry is required to save the address.

Sharing a single serial port between system remote access software and a remote management microcontroller

Abstract: A serial port is shared by a microcontroller and a host application The microcontroller initially responds to a remote user making connection to the serial port Upon the remote user requesting connection to the host application, a hardware switch connects a serial port connector to serial port hardware utilized by the host application The connection between the remote user and the host application is monitored, so that when the connection between the remote user and the host application is discontinued, the serial port connector is reconnected to the microcontroller

USB peripheral microcontroller

Abstract: The present invention relates to a peripheral microcontroller for providing a high performance USB (Universal Serial bus) connection to existing peripheral architectures (such as printers and disk drives with existing microcontrollers) and to new peripheral architectures (such as a 4-port USB -to-Ethernet Bridge) The USB peripheral microcontroller includes three units A Serial Interface Engine (SIE) connects to a USB host or USB hub A Microcontroller (MCU) Interface Unit connects to one or more peripheral devices such as ISA-like peripherals A Memory Management Unit (MMU) provides a buffering mechanism between the SIE and MCU Interface Unit The MMU utilizes a unique data packet buffering architecture Packets received at the MMU for a peripheral for transmission to the USB host and packets received at the MMU from the USB host for transmission to a peripheral are buffered in a RAM The capacity of the RAM is dynamically allocatable among avarious USB endpoints and the USB host so that the size of the RAM is minimized The data path of the inventive USB peripheral controller is also highly advantageous The SIE accesses the packet buffer RAM via a DMA controller in the MMU The MCU Interface Unit accesses the packet buffer RAM via a microcontroller or a DMA controller An arbiter in the MMU enable these multiple masters to access the packet buffer RAM

Vehicle serial data bus communication protocol and method

Abstract: A serial data communication system and protocol for communicating data on a serial data bus in a vehicle. The serial data communication system includes a serial data bus connected to a plurality of electronic devices in a vehicle. Each of the electronic devices includes an encoder for encoding bits of information and a decoder for receiving data and decoding the received serial data. The present invention provides for a communication protocol for communicating data on the serial data bus including the steps of providing serial data to be transmitted onto the serial data bus in the vehicle. The serial data is encoded with a pulse width varying as a function of a time, and the time-based variable pulse width is assigned to groupings of at least two data bits to code each of the data bit groupings. A series of coded data bit groupings are transmitted onto the serial data bus in the vehicle, and the electronic devices may receive and decode the encoded data signals to decipher the data.

First and second virtual serial ports utilized to perform virtual transmissions through parallel port via first and second transmission/reception buffer region

Abstract: A virtual transmission system comprises a first and second virtual serial ports; a first transmission/reception buffer region set with the first virtual serial port as a write port and the second virtual serial port as a read out port; a second transmission/reception buffer region set with the first virtual serial port as a read out port and the second virtual serial port as a write port; and a control portion for writing data outputted from the first virtual serial port into the first transmission/reception buffer region, for outputting data written in the first transmission/reception buffer region to the second virtual serial port, for writing data outputted from the second virtual serial port into the second transmission/reception buffer region, and for outputting data written in the second virtual serial port to the first transmission/reception buffer region.

Motorola field programmable analogue arrays, present hardware and future trends

Abstract: The Motorola MPAA020 Field Programmable Analogue Array (FPAA) is an integrated array of undedicated programmable analogue cells, based upon switched capacitor technology. Programming data is held in SRAM in each cell, and it is possible to configure and re-configure the implemented circuit without limit. The chip is capable of supporting a diverse range of analogue signal processing functions, such as data conversion, linear signal processing, filtering and non-linear functions. The MPAA020 chip is mounted within a development board which provides support functions such as clock generation, voltage regulation and I/O pins. This board connects to the serial port of a PC to provide easy download of configurations from the design support software, Easy AnalogTM. This software fully abstracts the design process away from component level to system level. At system level, design entry is performed by inter-connection of user-parameterised macro-cells and then downloaded directly to the device. Very rapid prototyping of switched capacitor circuits is possible with the MPAA020 array, reducing time to market by months when compared with a full custom ASIC implementation. A full configuration of the chip may be accomplished in 5 μS and a partial update of the function may be done in 200 nS per 8 bit data word. (5 pages)

Method and system for interfacing parallelly interfaced devices through a serial bus

Abstract: A method and apparatus for interconnecting via a serial bus a master processor and a co-processor having directly interfaceable parallel interfaces thereby accommodating the remote location of the co-processor from the master processor. The master processor interfaces with a serial bus interface for converting the parallel interface of the master processor into a serial interface forming a serial bus including a serial data out signal, a serial data in signal, a serial clock signal and a frame sync signal. The serial bus interfaces with the remote module having the co-processor located therein. The serial bus interfaces directly with an interface controller for converting the serial information back to a parallel format compatable with the requirements of the co-processor's parallel interface. The interface controller is further capable of generating control signals such as resets and general purpose outputs when directed by the master processor and reading status of the co-processor when also directed by the master processor. Testing functionality is also included for specific incorporation of an ISDN-specific I/O interface device functioning as the co-processor.

Handshake minimizing serial-to-parallel interface with shift register coupled by parallel bus to address logic and control logic

Abstract: A serial/parallel interface for interfacing the serial port of a microcontroller with parallel bus devices, and a protocol for communicating with the same. The interface operates to maximize through-put with minimum handshaking by incorporating logic within the interface itself to control data flow. A row/column count state machine in the interface accumulates serial clock pulses from the microcontroller and controls the latching of parallel output data. A read/write state machine accumulates addresses and controls the read/write operation in response to a command sent by the microcontroller in the serial data stream. The read/write state machine accumulates addresses in response to an interface clock derived from the serial clock from the microcontroller.

Data communication system utilizing a scalable, non-blocking, high bandwidth central memory controller and method

Abstract: A high bandwidth central memory controller (10) utilizing a pipelined TDM bus such that each serial interface can sustain a bandwidth of up to 100 mbps for both the transmission and reception of variable length frames. Each port (16) is assigned a fixed number of queues, a TDM slot number and the address routing for all other queues associated with the remaining ports at initialization, such that when a frame is received, the appropriate queue is determined from the addressing in the frame header and the initialized route tables. When the port's TDM slot for a memory request is active, a request for the output queue is made to the central memory controller if an 'output queue available' indication is returned and the frame data is placed on the bus during the input port's data TDM slot. If the output queue is not available, the input port may either discard the received data frame or generate a busy/reject frame to be placed on one of its own output queues during its TDM data slot.

Memory based buffering for a UART or a parallel UART like interface

Abstract: A system linking a serial interface with a processor that is parallel in nature is described. A system memory having a receive buffer stores data from a UART destined for processing by a central processing unit. A control state machine interrupts the central processing unit to initiate processing of the data in the receive buffer when the receive buffer reaches a certain state, such as storing a full frame of data. Command characters indicative of control conditions in the data stream are detected by discrete hardware in a receive command processor, and the memory address in the receive buffer is forwarded to the central processing unit. The resulting system substantially improves the speed and efficiency of the transfer of data between the UART and the central processing unit.

Method for bi-directional data communication in a digital game port

Abstract: The invention uses the conventional PC game port as a port for a digital game input device, employing a Digital Game Port (DGP) protocol which uses the four discrete or button lines and a single analog line (one of four) on the conventional game board to form a dual serial port. Data from a DGP control device is packetized with each packet consisting of 13 bytes of data. The packets or blocks are then grouped into frames. A frame consists of two blocks of data. A total of two frames are transmitted to the driver for each driver request. The 13-byte data block is divided between six one byte analog values and four bytes of digital data, with three bytes that identify and define the device. This device definition and identification is unique. By sending the device identification and configuration to the driver, the driver can determine not only the presence of the device but also very specific aspects of the device. The hardware configuration of the cable enables the driver to uniquely identify the first unit connected to the host computer as the master unit. The driver identifies the other units, if any, as slave units. Up to 3 additional slave units may be chained from the master digital game port input device by such cables.

Large-scale Windows 95-based data-acquisition system using LabVIEW

Abstract: Hardware and software for a high-speed, pulsed-data-acquisition system are described. Data can be obtained via any device attachable to a VXI crate, GPIB controller, or directly via serial or parallel ports. Stepper motors controlled via serial port automate probe movement. LabVIEW and custom C++ modules are used to handle setup, data gathering and processing, and user interface. Experimental parameters can be controlled at each point via any GPIB-ready device. © 1997 American Institute of Physics.