About: Signal integrity is a research topic. Over the lifetime, 3454 publications have been published within this topic receiving 33971 citations. The topic is also known as: Signal integrity, SI.
Papers published on a yearly basis
TL;DR: A multipoint moment-matching, or complex frequency hopping (CFH) technique is introduced which extracts accurate dominant poles of a linear subnetwork up to any predefined maximum frequency and provides for a CPU/accuracy tradeoff.
Abstract: With increasing miniaturization and operating speeds, loss of signal integrity due to physical interconnects represents a major performance limiting factor of chip-, board- or system-level design. Moment-matching techniques using Pade approximations have recently been applied to simulating modelled interconnect networks that include lossy coupled transmission lines and nonlinear terminations, giving a marked increase in efficiency over traditional simulation techniques. Nevertheless, moment-matching can be inaccurate in high-speed circuits due to critical properties of Pade approximations. Further, moment-generation for transmission line networks can be shown to have increasing numerical truncation error with higher order moments. These inaccuracies are reflected in both the frequency and transient response and there is no criterion for determining the limits of the error. In this paper, a multipoint moment-matching, or complex frequency hopping (CFH) technique is introduced which extracts accurate dominant poles of a linear subnetwork up to any predefined maximum frequency. The method generates a single transfer function for a large linear subnetwork and provides for a CPU/accuracy tradeoff. A new algorithm is also introduced for generating higher-order moments for transmission lines without incurring increasing truncation error. Several interconnect examples are considered which demonstrate the accuracy and efficiency in both the time and frequency domains of the new method. >
01 Dec 2001
TL;DR: This paper introduces a novel RF/wireless interconnect concept for future inter- and intra-ULSI communications, based on low loss and dispersion-free microwave signal transmission, near-field capacitive coupling, and modem multiple-access algorithms.
Abstract: Recent studies showed that conventional approaches being used to solve problems imposed by hard-wired metal interconnects will eventually encounter fundamental limits and may impede the advance of future ultralarge-scale integrated circuits (ULSls). To surpass these fundamental limits, we introduce a novel RF/wireless interconnect concept for future inter- and intra-ULSI communications. Unlike the traditional "passive" metal interconnect, the "active" RF/wireless interconnect is based on low loss and dispersion-free microwave signal transmission, near-field capacitive coupling, and modem multiple-access algorithms. In this paper we address issues relevant to the signal channeling of the RF/wireless interconnect and discuss its advantages in speed, signal integrity, and channel reconfiguration. The electronic overhead required in the RF/wireless-interconnect system and its compatibility with the future ULSI and MCM (multi-chip-module) will be discussed as well.
TL;DR: This paper reviews a number of low-swing on-chip interconnect schemes and presents a thorough analysis of their effectiveness and limitations, especially on energy efficiency and signal integrity, and several new interface circuits presenting even more energy savings and better reliability are proposed.
Abstract: This paper reviews a number of low-swing on-chip interconnect schemes and presents a thorough analysis of their effectiveness and limitations, especially on energy efficiency and signal integrity. In addition, several new interface circuits presenting even more energy savings and better reliability are proposed. Some of these circuits not only reduce the interconnect swing, but also use very low supply voltages so as to obtain quadratic energy savings. The performance of each of the presented circuits is thoroughly examined using simulation on a benchmark interconnect circuit. Significant energy savings up to a factor of six have been observed.
18 Oct 2010
TL;DR: Experimental results of a 3-D Network-on-Chip implementation demonstrate that the NoC concept can be extended from 2-D SoC to 3- D SoCs at low area and power and digital gates can directly drive signals through TSVs at high speed and low power.
Abstract: In this paper key design issues and considerations of a low-cost 3-D Cu-TSV technology are investigated. The impact of TSV on BEOL interconnect reliability is limited, no failures have been observed. The impact of TSV stress on MOS devices causes shifts, further analysis is required to understand their importance. Thermal hot spots in 3-D chip stacks cause temperature increases three times higher than in 2-D chips, necessitating a careful thermal floorplanning to avoid thermal failures. We have monitored for ESD during 3-D processing and have found no events take place, however careful further monitoring is required. The noise coupling between two tiers in a 3-D chip-stack is 20 dB lower than in a 2-D SoC, opening opportunities for increased mixed signal system performance. The impact on digital circuit performance of TSVs is accurately modeled with the presented RC model and digital gates can directly drive signals through TSVs at high speed and low power. Experimental results of a 3-D Network-on-Chip implementation demonstrate that the NoC concept can be extended from 2-D SoC to 3-D SoCs at low area (0.018 ) and power (3%) overhead.
01 Sep 2003
TL;DR: The Signal Integrity-Simplified as discussed by the authors is a complete guide to understand and design for signal integrity, which offers a comprehensive, easy-to-follow look at how physical interconnects affect electrical performance.
Abstract: From the Publisher: The complete guide to understanding and designing for signal integrity Suitable for even non-specialists, Signal Integrity-Simplified offers a comprehensive, easy-to-follow look at how physical interconnects affect electrical performance. World-class engineer Eric Bogatin expertly reviews the root causes of the four families of signal integrity problems and offers solutions to design them out early in the design cycle. Coverage includes: * An introduction to signal integrity and physical design * A fundamental understanding of what bandwidth, inductance, and characteristic impedance really mean * Analysis of resistance, capacitance, inductance, and impedance * The four important practical tools used to solve signal integrity problems: rules of thumb, analytic approximations, numerical simulation, and measurements * The effect of the physical design of interconnects on signal integrity * Solutions that do not hide behind mathematical derivations * Recommendations for design guidelines to improve signal integrity, and much more Unlike related books that concentrate on theoretical derivation and mathematical rigor, this book emphasizes intuitive understanding, practical tools, and engineering discipline. Specially designed for everyone in the electronics industry, from electrical engineers to product managers, Signal Integrity-Simplified will prove itself an invaluable resource for helping you find and fix signal integrity problems before they become problems. ABOUT THE AUTHOR ERIC BOGATIN, Chief Technology Officer at GigaTest Labs, has over 23 years of experience in the microelectronics industry. Before joining GigaTest, he worked with AT&T Bell Labs, Raychem Corporation, Sun Microsystems, and other leading microelectronics manufacturers. He received his B.S. degree in physics at MIT and his M.S. and Ph.D. degrees from the University of Arizona, Tucson, in 1980. Over the years, he has taught over 3,000 engineers and authored over 100 technical articles and books on signal integrity and interconnect design.