Showing papers on "Silicon nitride published in 1973"

Optical Properties of Silicon Nitride

Abstract: The optical properties of silicon nitride layers formed by the pyrolysis of a mixture of and are presented. These results are used together with published data for materials to formulate a bonding model for and which quantitatively describes their optical characteristics. The basic units of this structure are Si tetrahedra of the type in which the distribution of atoms for all possible is statistical for any given atom ratio.

Discharge of MNOS structures

Abstract: The discharge of MNOS memory devices at zero or low gate voltages is studied theoretically and experimentally. A theory based on direct tunneling of charge carriers from traps in the silicon nitride layer into the silicon describes the experiments quite well. The discharge process is found to be logarithmic in time, starting at a certain time, ift d , which is exponentially dependent on the oxide thickness, and ending at another time, extrapolated to much larger than 10 years. Some implications of the discharge model are discussed.

The microstructure of hot-pressed silicon-nitride

Abstract: Grain morphology, distribution of impurities and inclusions, phases and dislocation structures in two grades of hot-pressed Si3N4 were investigated by means of replica and thin foil transmission microscopy, and by X-ray diffraction, microprobe and Auger analyses. High concentrations of impurities, specifically Ca, were detected at the grain boundaries. Fe-W-Si particles were seen within the grain. Non-densified Si3N4 inclusions were found to be detrimental to the strength. Possible correlations among strength, densification data and distribution of elements and phases are discussed.

Production of shaped articles of silicon carbide and silicon nitride

Abstract: A melt or solution of a silazane is formed into a shaped article by molding or melt or dry extrusion and is thereafter heated in an inert atmosphere to about 800 DEG to 2,000 DEG C to decompose the silazane into a homogeneous mixture of silicon carbide and silicon nitride. The silazane is produced by reacting ammonia with a halogenosilane and, if effected in solution, after removal of by-product ammonium chloride and optionally concentrating, the solution is directly employed for shaping. The solution may be rendered spinnable by addition of small amounts of high polymers and various other additives may also be employed. Fibers produced therefrom are of satisfactory mechanical properties and are suited for use as insulation and reinforcement in laminates.

Epitaxial silicon layers grown on ion‐implanted silicon nitride layers

Abstract: Buried layers of silicon nitride approximately 4000 A in width have been formed by ion implantation while retaining a relatively undamaged silicon surface region. Epitaxial silicon of 2‐μm thickness grown on these surfaces exhibits significantly lower defect concentrations than do silicon layers on spinel, as determined by optical microscopy and by proton channeling measurements. The breakdown voltage of the silicon nitride layers is approximately 7 × 105 V/cm, and the refractive index is 2.05 at 6328 A.

Process for fabricating MNOS non-volatile memories

Abstract: The switching speed of an MNOS field effect transistor is increased by a heat treatment in an ammonia rich atmosphere during processing. The transistor has an insulated gate structure comprising a layer of silicon nitride deposited on a layer of silicon oxide. After the formation of the silicon oxide layer and immediately prior to the formation of the silicon nitride layer on a surface thereof, the surface of the silicon oxide layer is heat treated in an ammonia enriched atmosphere to remove substantially all remaining oxygen atoms and molecules absorbed on the surface.

Composite ceramic heating element

Abstract: An electrical heating element comprised of a mixture of from 10 to 60% by weight of silicon carbide and 40 to 90% by weight of silicon nitride, silicon oxynitride, silicon aluminum oxynitride or mixtures of these. The heating elements typically have a flexural strength of approximately 100,000 p.s.i. by virtue of the near theoretical density which is achieved by forming the elements using hot-pressing fabrication techniques. The resistivity is variable over a range of from 10 1 to 107 ohm centimeters by manipulating the relative amounts of silicon carbide, and the silicon nitride, silicon oxynitride, and/or silicon aluminum oxynitride. The broad resistivity spectrum possible and the high physical strength of the present heating elements permits a very large variety of element configurations ranging from the simplest heating rod to heating surfaces which can be used as structural members in a furnace or other heat treating device.

Integrated circuit fabrication process

Abstract: Integrated circuits of high density are fabricated in a simplified process which allows both the use of multiple conducting layers in a dielectric above a semiconductor substrate, such as a polycrystalline silicon (polysilicon) field shield and metal interconnection lines, while also making provision for very precise alignment of subsequent layers to diffusions. A doped oxide containing a suitable dopant, such as arsenic in the case of a p-type silicon substrate, is deposited on the substrate. A pattern corresponding to desired diffusions is generated by normal photolithographic and etching techniques. A second, undoped oxide layer is thermally grown over the semiconductor substrate with dopant from the doped oxide simultaneously diffusing into areas of the substrate underlying the doped oxide. The undoped oxide serves to prevent autodoping. Thermally growing the undoped oxide layer converts a layer of the semiconductor surface not covered by doped oxide to the undoped oxide. Both oxide layers are then removed, leaving slight steps at the surface of the semiconductor substrate around the diffusion. The slight steps serve to allow very precise alignment of masks for subsequent process steps. Otherwise, the structure produced is very planar. An insulating layer, desirably a composite of silicon dioxide and silicon nitride in the case of a silicon substrate, is then formed on the substrate, followed by a layer of polycrystalline semiconductor, desirably doped to provide high conductivity. Openings are then etched in the polycrystalline semiconductor layer to allow formation of gate electrodes of FET''s, contact to the substrate, and contact of a subsequent interconnection metallization to diffusions in some of the circuits. A second insulating layer, such as silicon dioxide, is then grown on the polycrystalline semiconductor layer. Contact holes are then made to diffusions in the substrate, the substrate itself, and the polycrystalline silicon. The deposition and etching of an interconnection layer on the second insulating layer completes fabrication of the integrated circuit.

Method of etching films of silicon nitride and silicon dioxide

Abstract: An etching liquid comprises ammonium fluoride or alkali fluoride dissolved in a polyvalent or higher alcohol.

Process for the elimination of interface states in mios structures

Abstract: Under circumstances where interface states have been formed in an interface region between a layer of silicon dioxide and an underlying silicon substrate, and where processing temperatures have been encountered which would cause out-diffusion of hydrogen, a special problem arises in the presence of insulating layers such as silicon nitride and aluminum oxide layers which are impervious to the diffusion of gases such as hydrogen at lower temperatures which are usually encountered in the final fabrication steps of an integrated circuit device. Because hydrogen, for example, cannot be diffused at the lower temperatures through impervious insulation layers, steps of the present process such as implanting hydrogen ions in the interface region and annealing for a time and temperature sufficient to substantially eliminate interface states are utilized. With respect to the ion species utilized, it should be one that is capable of entering the lattice structure of silicon forming a bond therewith with dangling bonds which have not been completely filled by oxygen from the silicon dioxide layer. Ion implanted hydrogen is of such character that it is capable of entering the lattice. The annealing step is carried out in an inert atmosphere for a time and temperature sufficient to substantially eliminate interface states.

Hot pressed, high strength silicon nitride

Abstract: The fabrication of high strength, high density, silicon nitride by the addition of between 1.0 to 3.5 percent by weight of yttrium in the form of a compound to silicon nitride powder and pressing the material at temperatures of between 1,750* C. and 1,800* C. and at uniaxial pressures of between 6,000 and 7,000 psi.

Semiconductor device having controlled surface charges by passivation films formed thereon

Abstract: After desired impurities are diffused into a semiconductor substrate through a masking layer of SiO2 formed thereupon so as to form a semiconductor device, the masking layer is completely removed therefrom and thereafter more than two thin layers of different insulating materials are deposited upon the cleaned surface of the semiconductor device thus providing a method of forming a semiconductor device with an improved passivation film thereon. Said insulating materials are selected from the group consisting of silicon dioxide, a silicon nitride, alumina, boro-silicate glass, phospho-silicate glass, alumino-silicate glass, alumino-phospho-silicate glass and alumino-boro-silicate glass, and the thickness of each thin layer is in the range of 300 to 1500 angstroms and the first layer is silicon dioxide.

Method of making a bonded silicon nitride article having portions of different density

Abstract: A method of making a duo density article of silicon nitride is taught. A first article portion is formed by shaping silicon metal particles into a suitable configuration and nitriding the same. A release agent is applied to selected surfaces of the first article portion. A readily formable encapsolent, having relatively low strength, is applied to the selected surface of the first article portion. The encapsolent is converted to a high strength material. A second article portion of silicon nitride is hot press bonded to a surface of the first article portion which has no encapsolent thereon. The encapsolent is machined to remove portions thereof, the removal of such portions freeing other portions of the encapsolent to be removed as individual segments.

Hot pressed silicon nitride containing finely dispersed silicon carbide or silicon aluminum oxynitride

Abstract: A hot-pressed silicon nitride product containing a finely dispersed silicon carbide mixture is described. The product has very high strength at room temperature as well as high strength at elevated temperature. It has a high density and its electrical conductivity can be controlled over several orders of magnitude. In preferred forms the electrical resistivity is on the order of 2-10 ohm centimeters and, accordingly, the product can be machined by electric discharge machining. Where high strength is desired the product can be made to have a transverse rupture strength in excess of 100,000 p.s.i. as measured by a four point test at room temperature and, at 1375*C, the transverse rupture strength can be in excess of 40,000 p.s.i., as measured by a three point test. This high strength product is formed predominantly of an essentially continuous matrix of silicon nitride which, under a scanning electron microscope, appears to have an average crystal size less than 1 micron. Particles of very fine silicon carbide also form a continuous electrical path due to points of contact between individual particles. The silicon carbide particles are preferably all less than about 3 microns in diameter with the average diameter of the silicon carbide particles being less than about 1 micron. In other forms of the invention some or all of the silicon nitride can be replaced by silicon aluminum oxynitride having the beta silicon nitride structure.

High strength composite ceramic structure

Abstract: A hot pressed ceramic body is formed of a sandwich comprising an interior layer of a ceramic material having a given coefficient of thermal expansion and two outer surface layers formed of a ceramic material having a lower coefficient of thermal expansion When the product is formed as a unitary sandwich by hot pressing at elevated temperature the outer layers are put under compression as the body is cooled to room temperature A preferred form of the invention involves a central layer of a mixture of silicon carbide and silicon nitride and the external layers are pure silicon nitride

Ion-implantation and conventional epitaxy to produce dielectrically isolated silicon layers

Abstract: The disclosure relates to the formation of epitaxial silicon layers on insulating material. Buried layers of silicon nitride, oxide or carbide, approximately 4000 A in width, are formed by ion implantation while retaining a relatively undamaged layer of silicon near the surface. Epitaxial silicon of about 2 mu m thickness, for example, is grown on these surfaces and yields layers with significantly lower defect concentrations than for silicon layers on prior art substrates such as spinel.

Making a triple density article of silicon nitride

Abstract: A method of making a triple density article of silicon nitride is disclosed. A first element is formed by hot pressing silicon nitride particles. The general shape of a second element is formed by injection molding silicon metal particles and a binder and subsequently burning out the binder. The general shape of a third element is slip cast. The slip cast element is sintered to give it some strength. The third element is then bonded to at least a portion of the second element in a slip casting operation. The so combined second and third elements are nitrided in a nitriding operation. Facing surface areas of the first element and the third element are bonded together by applying heat on both elements and pressure to one of the elements while the other element is held in a fixed position.

Method of forming self-aligned field effect transistor and charge-coupled device

Abstract: A semiconductor device containing in a single semiconductor body a self-aligned Field Effect Transistor and a Charge-Coupled Array having an improved capacity for storing charges. The device is formed by depositing both polysilicon and silicon nitride layers over a silicon dioxide layer on the surface of a silicon body and selectively etching these layers so that suitable dopants may be diffused or ion-implanted into selected areas of the underlying silicon body to form, in the same semiconductor body, an improved charge-coupled array having an improved self-aligned Field Effect Transistor associated therewith. This process not only results in a device in which the chance of an inversion layer under the oxide on the surface of the device is substantially reduced, but also provides a self-aligned Field Effect Transistor having a thinner gate oxide and a charge-coupled array that has an increased capacity for storing charges. The improved array so formed also has, during operation, zero spaced depletion regions so that unwanted electrical discontinuities between or within the depletion regions of the charge-coupled array are avoided. Because zero spacing is achieved by using these thin conducting layers, the metal phase lines can be made narrow thus leaving openings in the charge transfer channel making the device particularly suitable for imaging applications.

Tungsten wire reinforced silicon nitride articles and method for making the same

Abstract: A reinforced ceramic article suitable for use in a gas turbine engine environment comprises a matrix material of Si3N4 with reinforcing filaments of tungsten embedded therein. The article has improved impact strength and thermal shock resistance. A method for making the article is also disclosed.

Reversible floating‐gate memory

Abstract: Reversible memory behavior is reported for an insulated gate structure, in which charge is stored on a polysilicon gate. This gate is floating between layers of silicon dioxide (SiO2) and silicon nitride (Si3N4). The floating gate is charged negatively by hot carrier injection through the SiO2, from an avalanche plasma in the underlying silicon. This charge can then be removed by applying a positive voltage between an external gate and the silicon substrate. The positive voltage causes electrons to flow through the nitride layer. Both charge states are remembered when external bias voltages are removed. The importance of circuit configuration during charging is discussed, and improvements of injection efficiency for a favorable configuration are described.

Dielectrically isolated Schottky Barrier structure and method of forming the same

Abstract: A planar integrated circuit structure having a dielectrically isolated Schottky Barrier contact. The structure has pockets of silicon surrounded by isolating regions of silicon dioxide extending from a planar surface, the silicon dioxide regions and silicon pockets being substantially coplanar at said surface. A layer of dielectric material, such as silicon nitride or a composite of silicon nitride over silicon dioxide, covers the surface. There is at least one opening extending through the dielectric layer to a coincident silicon pocket; the opening has larger lateral dimensions than said pocket so as to expose the pocket and a portion of the silicon dioxide region surrounding the pocket. A metallic layer in this opening forms a Schottky Barrier contact with the exposed silicon.

Metal nitride oxide semiconductor integrated circuit structure

Abstract: Method and apparatus for providing a metal nitride oxide semiconductor (MNOS) memory in the form of a matrix array of either capacitors and/or transistors having polarizing potentials applied thereto for representing one of two binary logic states. Structurally, the array is comprised of a thin epitaxial layer of one type, for example n-type semiconductivity grown on a substrate of opposite or p-type semiconductivity. Parallel rows of silicon dioxide are infused into the epitaxial layer to provide strip regions of isolation between separated regions of first conductivity also forming substantially parallel rows. Transversely to the parallel sublayer rows of n-type semiconductivity and silicon dioxide isolation are a plurality of parallel columns of common gates, either metal or silicon. The columns of gates are separated from the parallel rows of n-type semiconductivity by intermediate contiguous layers of silicon dioxide and silicon nitride. Such a configuration describes a matrix array of capacitors; however, a matrix of transistors is formed by additionally diffusing a dopant of for example p+type semiconductivity into the regions of n-type semiconductivity on either side of the parallel columns of common gates.

Method of etching a pattern in a silicon nitride layer

Abstract: Etching of a pattern in a silicon nitride layer provided on a substrate, in which the etching bath consists of a dilute aqueous solution of hydrofluoric acid and phosphoric acid, in which ammonium fluoride is dissolved in a high concentration. Application in the manufacture of semiconductor devices.

Method of making a metal insulator silicon field effect transistor (mis-fet) memory device and the product

Abstract: The present invention relates to the method of making a memory device of the metal insulator silicon field effect transistor structure having a gate region combining a chemically formed thin oxide layer and a second insulating layer, such as silicon nitride, and to the novel product which results from this method. The method entails the step of chemically oxidizing the surface of the silicon channel region by a self-limiting process to form a thin porous oxide, and a nitriding step which is conducted under conditions producing optimum interface traps and minimum initial charge. Both steps lead to highly reproducible devices. The method is readily applied to large arrays of devices, offering ease of manufacture and close device parameter control. One form of the process provides for the production of both memory and read-out devices appropriate in an array.

Low-field tunnelling current in thin-oxide m.n.o.s. memory transistors

Abstract: An expression for the tunnelling current between the silicon bands and the traps located in the silicon nitride, in thin-oxide m.n.o.s. memory transistors under low-field conditions, is derived. The theoretical results are compared with available experimental data, and the parameters for the trap distribution are calculated. The agreement with experimental results is satisfactory.

Charge storage characteristics of MIS structures employing dual‐insulator composites of HfO2–SiO2 and SrTiO3–SiO2

Abstract: Two MIS versions have been fabricated employing rf‐sputtered dual insulator structures comprised of 1000 A HfO2‐20 A SiO2 and 1000 A SrTiO3‐20 A SiO2. The high‐dielectric‐constant insulators in combination with a 20‐A layer of silicon dioxide permit the transfer of charge by tunneling into traps at the dual‐insulator interface to occur at considerably lower voltages than comparable structures employing silicon nitride or aluminum oxide. It was found that trap density and, hence, the degree of flat‐band voltage shift could be altered by sputtering 50‐A layers of selected materials at the insulator‐SiO2 interface. The devices employing hafnium dioxide show promise in an application as a nonvolatile electrically alterable memory element. Although the strontium titanate devices exhibit a low threshold voltage for onset of charge transfer, the charge retention characteristics are poor.

Properties of Vapor Deposited Silicon Nitride Films with Varying Excess Si Content

Abstract: Physical, chemical and electrical properties of Si rich silicon nitride (SiN) film deposited by using the SiH4–NH3 system have been studied. By changing the volume ratio of NH3 to SiH4 from 100 to 1/30, samples with varying excess Si content within SiN films can be obtained. The current conduction mechanism of the SiN film can be represented by the superposition of Poole-Frenkel current, field ionization current and hopping current as reported by Sze in the Si3N4 films without Si excess. Energy levels of trapping centers responsible for Poole-Frenkel current become shallow while their densities remain nearly constant as a function of the Si content. From the dependence of the shift characteristics of C–V curves, it has been deduced that the maximum charge storage within the SiN film is controlled by current conduction through the film.