Showing papers on "Silicon nitride published in 1975"

Silicon nitride trap properties as revealed by charge−centroid measurements on MNOS devices

Abstract: Previous charge−centroid studies of MNOS devices have shown that electrons injected into the insulator structure from the silicon are trapped not solely at the dielectric interface, but can be distributed over nearly the entire nitride thickness. In this paper, results of charge−centroid measurements on thin−oxide MNOS devices are interpreted with a charge trapping model, leading to values for the nitride trap density, capture cross section, and average trapping distance of 6×1018/cm3, 5×10−13 cm2, and 35 A, respectively.

Hole injection into silicon nitride: Interface barrier energies by internal photoemission

Abstract: Energy barrier heights at the interfaces of metal–silicon nitride–silicon structures have been measured by internal photoemission as a function of metal electrode material and substrate doping. These measurements have been interpreted in terms of a dominant hole internal photoemission mechanism. Hole energy barriers from the Au, Al, or Mg Fermi level and the Si valence band to the Si3N4 valence band were found to be 1.9±0.1, 3.0±0.1, 4.0±0.1, and 2.1±0.1 eV, respectively.

Elimination of stacking faults in silicon devices: a gettering process

Abstract: Described are procedures for fabricating silicon devices which prevent the formation and/or activation of stacking fault nucleation sites during high temperature processing steps, such as steam oxidation of silicon wafers. The procedures, which take place before such high temperature steps, include forming on the back surface of the wafer a stressed layer and then annealing the wafer for a time and at a temperature effective to cause the nucleation sites to diffuse to a localized region near to the back surface. Illustratively the stressed layer comprises silicon nitride or aluminum oxide. Enhanced gettering is achieved if, prior to forming the stressed layer, interfacial misfit dislocations are introduced into the back surface by, for example, diffusion of phosphorus therein. Following the gettering step(s) on the back surface, conventional procedures, such as growing epilayers and/or forming p-n junctions, are performed on the front surface of the wafer.

Method for producing a sintered silicon nitride base ceramic and said ceramic

Abstract: A silicon nitride based ceramic is formed of silicon nitride and at least two metal oxides of such a type that when the metal oxides are heated separately they form a spinel. Combination of said metal oxides and said silicon nitride as fine powders and sintering same at a specified temperature for a specified period of time results in a silicon nitride based ceramic having improved mechanical and chemical properties.

Self-aligned CMOS process for bulk silicon and insulating substrate device

Abstract: The method for fabrication of a self-aligned gate CMOS structure which employs no additional masking steps as compared to the standard CMOS fabrication process, this improved process providing the advantages of self-alignment between the N+ and P+ source and drain diffusions with respect to their gate regions, and metal contact openings which do not overlap the edges of the P+ or N+ source and drain regions. The self-aligning gate region is defined by a silicon nitride gate layer. Several embodiments of the novel process are described.

Silicon nitride-based sintered material and method for manufacturing the same

Abstract: Disclosed is a silicon nitride-based sintered material having high heat resistance and containing crystal compounds prepared from the silicon nitride and at least one of oxides of the elements belonging to the III A group in the periodic table.

Electron and hole transport in CVD Si3N4 films

Abstract: This letter reports on the finding that holes are more mobile than electrons in chemically vapor deposited (CVD) Si3N4. MIS structures with Si3N4 films as the insulating layers are used in the experiments. Holes are shown to be electrically injected from the silicon into the insulator when the aluminum‐gate electrode is pulsed negative, and electrons when pulsed positive, with subsequent trapping in the nitride. The centroid of the trapped‐hole distribution, Xh, and that of the trapped‐electron distribution, Xe, as functions of the voltage pulse amplitude and duration are measured. The ratio of Xh/Xe increases with the amplitude of the pulse and its duration, where the centroids are referenced from the injection source, and exceeds 3 when the hole distribution spans the entire nitride thickness. Data suggest that hole traps are perhaps shallower than electron traps, hence the enhanced hole conduction in the silicon nitride.

Creep of hot-pressed silicon nitride

Abstract: Creep tests were undertaken on hot-pressed silicon nitride in the temperature range 1200 to 1400° C. The activation energy for creep was determined to be 140 kcal mol−1 and the stress exponent of creep rate was 1.7. The creep behaviour is ascribed to grain-boundary sliding accommodated by void deformation at triple points and by limited local plastic deformation. Electron microscopic evidence supporting this mechanism is presented.

Method for forming recessed dielectric isolation with a minimized "bird's beak" problem

Abstract: In the fabrication of integrated circuits, a method is provided for forming recessed silicon dioxide isolation in integrated circuits in which the "bird's beak" problems associated with conventional silicon dioxide-silicon nitride composite masking structures is minimized. A conventional composite mask comprising a bottom layer of silicon dioxide and an upper layer of silicon nitride having a plurality of openings defining the regions in the silicon substrate which are to be thermally oxidized is formed on a silicon substrate. Recesses are then etched in the silicon substrate in registration with the openings in the composite mask. Then, the silicon dioxide layer is, in effect, over-etched to extend the openings in the silicon dioxide to greater lateral dimensions than the openings in the silicon nitride layer whereby the silicon nitride at the periphery of the openings is undercut. A layer of silicon is then deposited in the recesses covering the undercut portions of said silicon nitride layer. Then, the structure subjected to thermal oxidation whereby the silicon in and abutting the recesses is oxidized to form regions of recessed silicon dioxide substantially coplanar with the unrecessed portions of the silicon substrate. Because of the undercutting and the deposition of silicon in the recesses, the "bird's beak" effect is minimized.

Sintering in the Presence of Liquid Phase

Abstract: In recent years considerable progress in materials development has been achieved by applying the methods of liquid phase sintering well known from heavy alloy and hard metal production Sintering of cobalt rare earth magnets (1–4), hot pressing of silicon nitride structural ceramics in the presence of a liquid phase (5–8), supersolidus sintering of superalloys (9–12), accelerated diffusion alloying for powder forging (13) or the development of hardenable cemented carbides (14–16) may be listed here as the most prominent examples These technological achievements, however, were for a long time hardly matched by the scientific work which is necessary not only for a basic understanding of liquid phase sintering but also for an improvement of the materials made by this method

Semiconductor solar energy device

Abstract: This disclosure relates to a semiconductor solar energy device which is of the PN-type and utilizes a dielectric anti-reflective coating on the side of the device that faces the sunlight. The fabrication techniques used in making this semiconductor device include the use of ion implantation to form doped or diffused regions in the device. One of the ion implanted regions located on the side of the device that is subjected to the sunlight is configured in order to permit metal ohmic contact to be made thereto without shorting through the doped region during sintering of the metal contacts to the semiconductor substrate. The dielectric anti-reflective coating, in one embodiment, is a composite of silicon dioxide and silicon nitride layers. The device is designed to permit solder contacts to be made to the P and N regions thereof without possibility of shorting to semiconductor regions of opposite type conductivity.

Evaluation of Hot Pressed Silicon Nitride as a Rolling Bearing Material

Abstract: A series of tests has been conducted to evaluate the suitability of silicon nitride as a bearing material for rolling contact applications. The ability of silicon nitride to be lubricated by some conventional lubricants was found to be satisfactory. This was determined by wettability studies, lubricant film thickness and traction coefficient measurements on the optical EHD rig and friction coefficient measurements by the pin-on-disk method. The abrasive wear coefficient, measured on a lopping machine using 600 grit SiC abrasive, was found to be high compared to other ceramics. It was also dependent on the composition of the silicon nitride. Comparative rolling contact fatigue tests on steel and silicon nitride flat washers were conducted using steel rollers and balls. A high wear rate leading to grooving in the rolling track on silicon nitride was observed. The spalling resistance of silicon nitride was found to be higher than that of steel under the test conditions used. Surface interactions in the Si3N4...

Effect of Reactant Nitrogen Pressure on the Microstructure and Properties of Reactively Sputtered Silicon Nitride Films

Abstract: The quality of silicon nitride films deposited by rf reactive sputtering of silicon in a nitrogen discharge is found to be strongly dependent on the discharge nitrogen pressure. For a given substrate to target spacing there is a "critical" sputtering pressure which, if exceeded, results in deposition of films with noticeably inferior properties. The properties of silicon nitride films deposited both above and below this critical pressure are compared. The degradation of film properties accompanying an increase in the nitrogen discharge pressure is correlated with the presence of microvoids (~50A), revealed by transmission electron microscopy. It is suggested that the microvoids result from a reduction in the reemission of deposited material as the discharge pressure is increased.

Method of manufacturing semiconductor integrated circuit with prevention of substrate warpage

Abstract: In a monolithic semiconductor integrated circuit, when polycrystalline semiconductor is used in a portion of substrate insulatively supporting plural semiconductor single crystal regions forming circuit elements, the oxidation process of the impurity diffusion process at high temperatures and in oxygen atmosphere is started after a passivation film such as silicon oxide or silicon nitride, to prevent oxygen from diffusing or penetrating into the surface of the polycrystalline semiconductor, has been formed on the same surface. By leaving the passivation film lying on that surface during the oxidation and diffusion process warping of the substrate that may be caused due to the diffusion or penetration of oxygen into the polycrystalline semiconductor region is prevented.

Method of forming ceramic products

Abstract: In a method of forming a refractory product wherein a mixture consisting of effective amounts of silica, alumina, aluminium nitride, and with or without silicon nitride, is provided, the mixture is surrounded with a protective medium and sintered at a temperature between 1200°-2000° C to form a single phase silicon aluminium oxynitride corresponding to the formula: Si 6 -z Al z N 8 -z O z , where z is greater than zero and less than or equal to 5, and when there is no silicon nitride in the mixture z is greater than or equal to 4 and less than or equal to 5, the improvement being the step of introducing into said mixture magnesium oxide in an amount of not more than 5% by weight to form a magnesium silicate glass and aid in densification of the ceramic material.

Strength, density, nitrogen weight gain relationships for reaction sintered silicon nitride

Abstract: Linear relationships between mean strength and nitrogen weight gain are established for isostatically pressed silicon compacts nitrided to weight gains of less than 60%. For a particular silicon powder the relationship depends upon the isostatic pressure used in compact fabrication, i.e. the green density. A linear relationship between mean strength and nitrided density is also demonstrated and this is independent of green density for the particular compacts studied. The implications of these relationships are discussed and their potential value for developing high strength reaction sintered silicon nitride explained.

Fatigue Life of High-Speed Ball Bearings With Silicon Nitride Balls

Abstract: Hot-pressed silicon nitride was evaluated as a rolling-element bearing material. The five-ball fatigue tester was used to test 12.7-mm- diameter silicon nitride balls at maximum Hertz stresses ranging from 4.27 x 10 to the 9th power n/sq m to 6.21 x 10 to the 9th power n/sq m at a race temperature of 328K. The fatigue life of NC-132 hot-pressed silicon nitride was found to be equal to typical bearing steels and much greater than other ceramic or cermet materials at the same stress levels. A digital computer program was used to predict the fatigue life of 120-mm- bore angular-contact ball bearings containing either steel or silicon nitride balls. The analysis indicates that there is no improvement in the lives of bearings of the same geometry operating at DN values from 2 to 4 million where silicon nitride balls are used in place of steel balls.

Three mask self aligned IGFET fabrication process

Abstract: A process is disclosed for making a self-aligned IGFET having a polycrystalline silicon gate, using three masking steps. Layers of silicon dioxide, polycrystalline silicon, and silicon nitride are respectively deposited on the surface of a silicon substrate of a first conductivity type. With the first mask, openings are made in regions of these layers above the proposed location for the source and drain. The source and drain are then deposited in the substrate through these openings. The disclosed process continues, growing a silicon dioxide layer on the lateral surfaces of the polysilicon gate, exposed by these openings. Then a silicon nitride layer is deposited on all exposed surfaces and a second mask is employed to permit the removal by etching of this nitride layer from all portions except the proposed location of devices metallization at a first region over the gate, a second region over the source and a third region over the drain of the device. The polycrystalline silicon layer is then etched and removed from the field region of the device. Polysilicon material in the gate region is protected during this etching stop by the first nitride layer and the silicon dioxide layer grown over the lateral exposed surfaces of the gate. The nitride layer regions are then etched away and metallized contacts are formed to the source, drain and polycrystalline silicon gate regions by means of a third and last mask. Alternative steps are disclosed for making the gate and field oxide regions coplanar.

Sintered silicon nitride base ceramic and said ceramic

Abstract: A silicon nitride based ceramic is formed of silicon nitride and at least two metal oxides of such a type that when the metal oxides are heated separately they form a spinel. Combination of said metal oxides and said silicon nitride as fine powders and sintering same at a specified temperature for a specified period of time results in a silicon nitride based ceramic having improved mechanical and chemical properties.

Creep Deformation of Reaction‐Sintered Silicon Nitrides

Abstract: The steady-state creep behavior of reaction-bonded silicon nitride, prepared by slip casting and injection molding, was examined in 4point bending with stresses ranging from 10,000 to 20,000 psi at temperatures from 1200° to 1450°C. Creep rates were proportional to the 1.4 power of the stress. The creep process exhibited an activation energy of 130±5 kcal/mol. The microstructure of deformed specimens, which was revealed by transmission and scanning electron microscopy, contained triple-point voids suggesting that the rate-controlling mechanism of creep is grain-boundary sliding.

Discrete, fixed-value capacitor

Abstract: An axial-lead fixed-value capacitor comprising a metal-nitride-oxide-silicon chip in a standard diode package has been fabricated, having capacitance values in the 10 to 1000 pico-farad range. The device features a beveled-edge configuration which contributes to a low leakage current and also facilitates the sealing of the semiconductor chip in a double plug axial-lead package. The double layer dielectric medium comprises a thermally grown silicon oxide film typically 450 angstroms thick, for example, and a plasma deposited layer of silicon nitride typically 350 angstroms thick, for example.

Silicon nitride coated, plastic covered solar cell

Abstract: A non-oxide anti-reflective coating is used with a transparent plastic cover of fluorinated ethylene propylene copolymer on a silicon solar cell to increase the resistance to damage caused by electron bombardment.

Charge transfer properties of mnos structures as influenced by processing parameters

Abstract: The charge transfer and retention characteristics of MNOS structures have been studied as a function of specified processing parameters utilized when fabricating the tunneling silicon oxide and charge storage silicon nitride layers. A grid array of n+ junctions fabricated on 2 ohm-cm “p” type silicon substrates allowed simulation of the transient characteristics of FET’s. Electrical measurements included switching speed, static and dynamic charge storage windows, and stored charge retention with time. The switching speed and window width were influenced by some processing parameters. Some shortcomings with recent discharge models are noted, based upon the data obtained. Limited (multiple cycling) “fatigue” studies have indicated improved window behavior with increased write-erase voltages, and pulse widths below one microsecond, for MNOS structures with the tunneling oxide prepared within an NO plus H2 ambient.

Hole injection into silicon nitride: Dark current dependence on electrode materials and insulator thickness

Abstract: Dark currents in MNS capacitors are studied as a function of metal electrode material and insulator thickness. Dark currents sensitively reflect different electrode materials for thin (∼200 A) nitride films. Thus, it is found that high‐work‐function metals increase conduction under metal positive bias by enhanced hole injection and low‐work‐function metals increase conduction under metal negative bias by enhanced electron injection. Similar polarity differences are observed betwen n‐type and p‐type degenerate Si substrates. These contact differences disappear as the nitride becomes thicker and the thickness of trapped space‐charge layers near the contacts becomes small compared to the nitride thickness.

Method for forming dielectric isolation combining dielectric deposition and thermal oxidation

Abstract: In the fabrication of integrated circuits, a method is provided for forming recessed silicon dioxide isolation in which the "bird's beak" problem associated with conventional silicon dioxide-silicon nitride composite masking structures is minimized. A conventional composite mask comprising a bottom layer of silicon dioxide and an upper layer of silicon nitride having a plurality of openings defining the regions in the silicon substrate which are to be thermally oxidized is formed on the substrate. Recesses are then etched in the silicon substrate in registration with the openings in the composite mask. The silicon dioxide layer should be, in effect, over-etched to extend the openings in the silicon dioxide to greater lateral dimensions than the openings in the silicon nitride layer whereby the silicon nitride layer at the periphery of the openings is undercut. A layer of a material capable of blocking the oxidation of silicon and having a greater etchability than silicon nitride is then deposited in said recesses and covering said undercut portions of said silicon nitride masks. At this point the structure is blanket etched to remove said blocking material from the portions of the recesses not under said silicon nitride and to, thereby, expose the silicon in these portions. Finally, the structure is thermally oxidized so that the exposed silicon in the recesses oxidizes to form recessed regions of silicon dioxide substantially coplanar with the unrecessed regions of the silicon substrate. Because of the undercutting and the deposition in the undercut portions of the recesses of the blocking material, the "bird's beak" effect is minimized.

Method for forming masks comprising silicon nitride and novel mask structures produced thereby

Abstract: In the fabrication of integrated circuits, a method is provided for forming masking structures comprising silicon nitride which avoids the stresses and dislocations associated with direct silicon nitride masking as well as the "bird's beak" problems associated with silicon dioxide-silicon nitride composite mask structures. The mask is formed by first forming a silicon dioxide mask having at least one opening through which the substrate is exposed. Then, a mask comprising silicon nitride is formed on the first mask; this mask has at least one opening laterally smaller than the openings in the first mask and respectively in registration with at least some of the openings in said first mask. Thus, the second mask contacts and covers a portion of the exposed silicon substrate under each of the registered openings. The masked silicon substrate is subjected to a processing step such as oxidation, etching or diffusion which alters the characteristics of those portions of the silicon substrate remaining exposed. During this processing step a second mask serves as a barrier mask.