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Showing papers on "Silicon nitride published in 1997"


Journal ArticleDOI
30 May 1997-Science
TL;DR: In this paper, dense periodic arrays of holes and dots have been fabricated in a silicon nitride-coated silicon wafer and transferred directly to the underlying silicon oxide layer by two complementary techniques.
Abstract: Dense periodic arrays of holes and dots have been fabricated in a silicon nitride–coated silicon wafer. The holes are 20 nanometers across, 40 nanometers apart, and hexagonally ordered with a polygrain structure that has an average grain size of 10 by 10. Spin-coated diblock copolymer thin films with well-ordered spherical or cylindrical microdomains were used as the templates. The microdomain patterns were transferred directly to the underlying silicon nitride layer by two complementary techniques that resulted in opposite tones of the patterns. This process opens a route for nanometer-scale surface patterning by means of spontaneous self-assembly in synthetic materials on length scales that are difficult to obtain by standard semiconductor lithography techniques.

1,921 citations


Journal ArticleDOI
01 Jan 1997-Wear
TL;DR: In this article, the authors investigated the thermal properties of high-speed machining of Inconel 718 and Ti 6Al 6V 2Sn alloys from a thermal point of view.

500 citations


Journal ArticleDOI
TL;DR: In this paper, a review is given of several important defect production and accumulation parameters for irradiated ceramics including alumina, magnesia, spinel, silicon carbide, silicon nitride, aluminum nitride and diamond.

414 citations


Journal ArticleDOI
16 Oct 1997-Nature
TL;DR: In this paper, the authors reported the synthesis of a tough α-Si3N4 solid solution with this kind of microstructure, which is 40% harder than β-Si 3N4 and is equally strong and tough.
Abstract: Silicon nitride (Si3N4) is a light, hard and strong engineering ceramic1,2. It can withstand harsh environments and support heavy loads at temperatures beyond those at which metals and polymers fail. It can also be manufactured reliably at a reasonable cost and in large quantities. There are two forms of silicon nitride3: α-Si3N4 and β-Si3N4. The former is harder, but only the latter is currently used in engineering applications, because only this form can be given a microstructure resembling a whisker-reinforced composite1,2,4, which gives it the necessary toughness and strength. Here we report the synthesis of a tough α-Si3N4 solid solution with this kind of microstructure. This material is 40% harder than β-Si3N4 and is equally strong and tough. Its hardness (22 GPa) is exceeded only by boron carbide and diamond (which are both brittle). These properties mean that this form of α-Si3N4 should be preferred over β-Si3N4 for all engineering applications, and it should open up new potential areas in which the ceramic can be applied.

385 citations


Patent
21 Oct 1997
TL;DR: In this paper, a method for cleaning etch residue that is chemically adhered to ceramic surfaces in the etching chamber is presented. But the method is not suitable for cleaning surfaces that are chemically attached to the walls of the etch chamber, such as aluminum nitride, boron carbide, diamond, silicon oxide, silicon carbide and titanium carbide.
Abstract: An apparatus 20 and process for treating and conditioning an etching chamber 30, and cleaning a thin, non-homogeneous, etch residue on the walls 45 and components of the etching chamber 30. In the etching step, a substrate 25 is etched in the etching chamber 30 to deposit a thin etch residue layer on the surfaces of the walls and components in the chamber. In the cleaning step, cleaning gas is introduced into a remote chamber 40 adjacent to the etching chamber 30, and microwave or RF energy is applied inside the remote chamber to form an activated cleaning gas. A short burst of activated cleaning gas at a high flow rate is introduced into the etching chamber 30 to clean the etch residue on the walls 45 and components of the etching chamber. The method is particularly useful for cleaning etch residue that is chemically adhered to ceramic surfaces in the chamber, for example surfaces comprising aluminum nitride, boron carbide, boron nitride, diamond, silicon oxide, silicon carbide, silicon nitride, titanium oxide, titanium carbide, yttrium oxide, zirconium oxide, or mixtures thereof.

207 citations


Journal ArticleDOI
TL;DR: In this paper, a method to prepare silicon nitride nanoscale rods using carbon nanotube as a template has been presented, and the products of the reaction of carbon Nanotubes with a mixture of Si and SiO2 powder in nitrogen atmosphere are β-Si3N4, α-Si 3N4 and Si2N2O nanorods.
Abstract: A method to prepare silicon nitride nanoscale rods using carbon nanotube as a template has been presented in this letter. The products of the reaction of carbon nanotubes with a mixture of Si and SiO2 powder in nitrogen atmosphere are β-Si3N4, α-Si3N4, and Si2N2O nanorods. The sizes of the nanorods are 4–40 nm in diameter and up to several microns in length. The formation mechanism of the nanorods has also been discussed.

184 citations


Patent
10 Oct 1997
TL;DR: In this paper, a method of depositing an amorphous fluorocarbon film using a high bias power applied to the substrate on which the material is deposited was proposed. But this method was not suitable for the use of high-quality gap filling.
Abstract: The present invention provides a method of depositing an amorphous fluorocarbon film using a high bias power applied to the substrate on which the material is deposited. The invention contemplates flowing a carbon precursor at rate and at a power level so that equal same molar ratios of a carbon source is available to bind the fragmented fluorine in the film thereby improving film quality while also enabling improved gap fill performance. The invention further provides for improved adhesion of the amorphous fluorocarbon film to metal surfaces by first depositing a metal or TiN adhesion layer on the metal surfaces and then stuffing the surface of the deposited adhesion layer with nitrogen. Adhesion is further improved by coating the chamber walls with silicon nitride or silicon oxynitride.

181 citations


Journal ArticleDOI
TL;DR: In this article, a remote-plasma SiN film is applied to the rear surface of the low-resistivity p-type substrates to achieve a surface recombination velocities as low as 4 cm s−1.
Abstract: Using a remote-plasma technique as opposed to the conventional direct-plasma technique, significant progress has been obtained at ISFH in the area of low-temperature surface passivation of p-type crystalline silicon solar cells by means of silicon nitride (SiN) films fabricated at 350–400°C in a plasma-enhanced chemical vapour deposition system. If applied to the rear surface of the low-resistivity p-type substrates, the remote-plasma SiN films provide outstanding surface recombination velocities (SRVs) as low as 4 cm s−1, which is by a clear margin the lowest value ever obtained on a low-resistivity p-Si wafer passivated by a solid film, including highest quality thermal oxides. Compared to direct-plasma SiN films or thermally grown oxides, the remote-plasma films not only provide significantly better SRVs on low-resistivity p-silicon wafers, but also an enormously improved stability against ultraviolet (UV) light. The potential of these remote-plasma silicon nitride films for silicon solar cell applications is further increased by the fact that they provide a surface passivation on phosphorus-diffused emitters which is comparable to high-quality thermal oxides. Furthermore, if combined with a thermal oxide and a caesium treatment, the films induce a UV-stable inversion-layer emitter of outstanding electronic quality. Due to the low deposition temperature and the high refraction index, these remote-plasma SiN films act as highly efficient surface-passivating antireflection coatings. Application of these films to cost-effective silicon solar cell designs presently under development at ISFH turned out to be most successful, as demonstrated by diffused p-n junction cells with efficiencies above 19%, by bifacial p-n junction cells with front and rear efficiencies above 18%, by mask-free evaporated p-n junction cells with efficiencies above 18% and by MIS inversion-layer cells with a new record efficiency of above 17%. All cells are found to be stable during a UV test corresponding to more than 4 years of glass-encapsulated outdoor operation. © 1997 John Wiley & Sons, Ltd.

171 citations


Patent
19 Dec 1997
TL;DR: In this article, a chemical polishing composition comprising a soluble cerium compound at a pH above 3 and a method to selectively polish a silicon oxide overfill in preference to a silicon nitride film layer in a single step during the manufacture of integrated circuits and semiconductors is presented.
Abstract: A chemical mechanical polishing composition comprising a soluble cerium compound at a pH above 3 and a method to selectively polish a silicon oxide overfill in preference to a silicon nitride film layer in a single step during the manufacture of integrated circuits and semiconductors.

169 citations


Journal ArticleDOI
TL;DR: A detailed examination of the effects of deposition parameters, using LPCVD, and subsequent processing on the characteristics of silicon nitride is presented in this paper, where the properties investigated are deposition rate, refractive index, etch rate and intrinsic strain.
Abstract: A detailed examination of the effects of deposition parameters, using LPCVD, and subsequent processing on the characteristics of silicon nitride is presented The properties investigated are deposition rate, refractive index, etch rate and intrinsic strain The chemical composition of the material is determined using XPS and EPMA A close relationship between the chemical composition and mechanical properties is observed The ratio of process gas flow (using NH 3 and SiH 2 Cl 2 ) is shown to have a strong effect on all properties with deposition pressure having a secondary effect As the gas-flow ratio NH 3 /SiH 2 Cl 2 is ranged from 0176 to 1 the silicon content changes from Si/N=095 to 086, yielding a change in strain levels from 350 μϵ to 3000 μϵ Further increase in NH 3 yields only minor changes in silicon to nitrogen ratio and thus only minor changes in the film characteristics Additional thermal processing is shown to have a considerable effect on the mechanical properties of the material X-ray studies suggest that this to be due to volume shrinkage of the layer and not phase transformations involving crystallographic changes Tuning of the film properties through the processing parameters is shown

168 citations


Journal ArticleDOI
TL;DR: In this article, an accurate method for the determination of the bulk minority-carrier recombination lifetime of crystalline silicon wafers of typical thickness (0.5 mm) is presented.
Abstract: An accurate method for the determination of the bulk minority-carrier recombination lifetime of crystalline silicon wafers of typical thickness (<0.5 mm) is presented. The method consists of two main steps: first, both wafer surfaces are passivated with silicon nitride films fabricated at low temperature (<400 °C) in a remote plasma-enhanced chemical vapor deposition system. Second, the effective minority-carrier lifetime of the wafer is measured by means of the contactless microwave-detected photoconductance decay technique. Due to the outstanding degree of surface passivation provided by remote-plasma silicon nitride films, the bulk minority-carrier lifetime can be very accurately determined from the measured effective minority-carrier lifetime. The method is suited for the bulk minority-carrier lifetime determination of p-type and n-type silicon wafers with doping concentrations in the 1014–1017 cm-3 range. We demonstrate the potential of the method for commercially available float-zone, Czochralski, a...

Journal ArticleDOI
TL;DR: In this paper, the authors provided a thorough thermal characterization of membrane structures intended for thermal infrared detector arrays, which was conducted at temperatures below 400/spl deg/C to allow future post processing onto existing CMOS readout circuitry.
Abstract: The aim of this work is to provide a thorough thermal characterization of membrane structures intended for thermal infrared detector arrays. The fabrication has been conducted at temperatures below 400/spl deg/C to allow future post processing onto existing CMOS readout circuitry. Our choices of membrane material and processing technique were plasma enhanced chemical vapor deposited silicon nitride (SiN) and surface micromachining, respectively. The characterization gave for the thermal conductance (G) and thermal mass between the membrane and its surroundings 1.8/spl middot/10/sup -7/ W/K and 1.7/spl middot/10/sup -9/ J/K, respectively, which are close to the best reported values elsewhere. From these results the thermal conductivity and specific heat of SiN were extracted as 4.5/spl plusmn/0.7 W/m.K and 1500/spl plusmn/230 J/kg.K. The contribution to G from different heat transfer mechanisms are estimated. A model describing the pressure dependence of G was developed and verified experimentally in the pressure interval [5/spl middot/10/sup -3/, 1000] mbar. Finally, the influence of the thermal properties of the membrane on infrared detector performance is discussed.

Patent
Leonard Forbes1
14 Nov 1997
TL;DR: Local Oxidation of Silicon (LOCOS) as discussed by the authors was used to partially undercut narrow rows of silicon in the substrate and then a subsequent oxidation step fully undercuts the rows, isolating the silicon rows from adjacent active areas.
Abstract: Using sub-micron technology, silicon on insulator (SOI) rows and islands are formed in a silicon substrate. Trenches are directionally-etched in the silicon substrate, leaving rows of silicon between the trenches. Silicon nitride is then deposited over the trenches, extending partly down the sides of the trenches. An isotropic chemical etch is then used to partially undercut narrow rows of silicon in the substrate. A subsequent oxidation step fully undercuts the rows of silicon, isolating the silicon rows from adjacent active areas. Devices, such as transistors for CMOS and DRAMs, are then formed in active areas, wherein the active areas are defined on the silicon rows by LOCal Oxidation of Silicon (LOCOS).

Journal ArticleDOI
TL;DR: In this paper, two kinds of oxidation (passive and active) and active-to-passive transition of silicon-based ceramics were discussed thermodynamically, and the rate constants of passive/active oxidation and active topassive oxygen potentials for SiC and Si 3 N 4 were reviewed.
Abstract: Oxidation behavior of silicon-based ceramics such as SiC and Si 3 N 4 at high temperatures is important for their practical applications to structural or electronic materials. In the present paper two kinds of oxidation (passive and active) and active-to-passive transition of silicon-based ceramics were discussed thermodynamically, and the rate constants of passive/active oxidation and active-to-passive transition oxygen potentials for SiC and Si 3 N 4 were reviewed. Passive and active oxidation behavior depended on the microstructure of oxide films and SiO gas pressure on silicon-based ceramics, respectively. Wagner model, volatility diagram and solgasmix-based calculation were used to estimate the active-to-passive transition.

Patent
03 Jul 1997
TL;DR: The ceramic sheath type thermocouple has a long service life, an improved temperature measuring capability and improved temperature precision, and enables repetitive use as mentioned in this paper, but it is not suitable for high temperature measurements.
Abstract: This ceramic sheath type thermocouple has a long service life, an improved temperature measuring responsibility and an improved temperature measuring precision, and enables repetitive use. The ceramic sheath type thermocouple has its protective tube(1) formed of a heat resisting ceramics selected from silicon nitride, sialon and silicon carbide. In the protective tube(1) are installed a pair of W-Re wires (6,7) that are connected to form a joint portion constituting a temperature measuring point(5). A filler(2) made of S1 i N 4 reaction-sintered ceramics is loaded into the front end portion(4) of the protective tube(1) to enclose the W-Re wires(6,7). Another filler (3) made of SiC whisker with a heat conductivity smaller than that of the filler(3) of the front end portion(4) is loaded into the rear portion(16) of the protective tube(1). An inert gas is sealed in the protective tube(1). Alternatively, the temperature measuring portion(22) may be formed by exposing from the front end portion(4) of the protective tube(21) the joint portion(29) where the ends of the W-Re wires(26, 27) are connected. The temperature measuring portion (22) is coated with a cover film(28,37) that is made of silicon carbide, silicon nitride or a composite of these, all having excellent heat resisting and corrosion resisting properties.

Patent
09 May 1997
TL;DR: A polymer-hardening precursor or silicon piece may be an integral part of the reactor chamber walls and/or ceiling or a separate, expendable and quickly removable piece, and the heating/cooling apparatus may be of any suitable type including apparatus which conductively or remotely heats the silicon piece as mentioned in this paper.
Abstract: A general method of the invention is to provide a polymer-hardening precursor piece (such as silicon, carbon, silicon carbide or silicon nitride, but preferably silicon) within the reactor chamber during an etch process with a fluoro-carbon or fluoro-hydrocarbon gas, and to heat the polymer-hardening precursor piece above the polymerization temperature sufficiently to achieve a desired increase in oxide-to-silicon etch selectivity. Generally, this polymer-hardening precursor or silicon piece may be an integral part of the reactor chamber walls and/or ceiling or a separate, expendable and quickly removable piece, and the heating/cooling apparatus may be of any suitable type including apparatus which conductively or remotely heats the silicon piece.

Patent
31 Jul 1997
TL;DR: In this article, the authors proposed to change the silicon content in the silicon nitride by varying the amount of hydride, such as dichlorosilane (DCS), mixed with ammonia.
Abstract: Stress resulting from silicon nitride is diminished by forming an oxidation mask with silicon nitride having a graded silicon concentration. Grading is accomplished by changing the silicon content in the silicon nitride by varying the amount of hydride, such as dichlorosilane (DCS), mixed with ammonia. The silicon nitride can be graded in a substantially linear or non-linear fashion. Silicon nitride formed with higher levels of DCS mixed with ammonia is referred to as silicon rich nitride because of its relatively higher silicon content. In one embodiment, the graded silicon nitride may be formed with one type of non-linear silicon grading, an abrupt junction. In other embodiments, the silicon nitride is formed in a variety of shapes fashioned during or after silicon nitride growth. In one embodiment, the stress from the silicon nitride is reduced by forming a polysilicon buffer layer between two silicon nitride layers. In another embodiment, the stress from the silicon nitride is reduced by forming the silicon nitride on a pad layer, which in turn is formed on a base layer.

Journal ArticleDOI
TL;DR: In this article, an inorganic membrane sieve for microfiltration has been constructed having a silicon nitride membrane layer with thickness typically 1/spl mu/m and perforations typically between 0.5 /spl mu /m and 10 /spl µ/m in diameter.
Abstract: With the use of silicon micromachining, an inorganic membrane sieve for microfiltration has been constructed having a silicon nitride membrane layer with thickness typically 1 /spl mu/m and perforations typically between 0.5 /spl mu/m and 10 /spl mu/m in diameter. As a support a -silicon wafer with openings of 1000 /spl mu/m in diameter has been used. The thin silicon nitride layer is deposited on an initially dense support by means of a suitable chemical vapor deposition method (LPCVD). Perforations in the membrane layer are obtained with use of standard photo lithography and reactive ion etching (RIE). The deflection and maximum load of the membrane sieves are calculated in a first approximation. Experiments to measure the maximum load of silicon-rich silicon nitride membranes have confirmed this approximation.

Proceedings ArticleDOI
16 Jun 1997-Sensors
TL;DR: In this paper, the first study of gas phase silicon micromachining using pure bromine trifluoride (BrF/sub 3/) gas at room temperature is reported.
Abstract: We report the first study of gas phase silicon micromachining using pure bromine trifluoride (BrF/sub 3/) gas at room temperature. This work includes both the design of a new apparatus and etching characterization. Consistent etching results and high molecular etching efficiency (80%) have been achieved by performing the etching in a controlled pulse mode. This pure gaseous BrF/sub 3/ etching process is isotropic and has a high etch rate with superb selectivity over silicon dioxide (3000:1), silicon nitride (400-800:1) and photoresist (1000:1). Moreover, gaseous BrF/sub 3/ etching has also been demonstrated in surface micromachining process, where silicon nitride channels and membranes using polysilicon as the sacrificial layer have been successfully fabricated.

Proceedings ArticleDOI
16 Jun 1997-Sensors
TL;DR: A gas-phase, room-temperature, plasmaless isotropic etching system has been used for bulk and thin film silicon etching as mentioned in this paper, which has infinite selectivity to many common thin films, including silicon dioxide, silicon nitride, photoresist, and aluminum.
Abstract: A gas-phase, room-temperature, plasmaless isotropic etching system has been used for bulk and thin film silicon etching. A computer controlled multi-chambered etcher is used to provide precisely metered pulses of xenon difluoride (XeF/sub 2/) gas to the etch chamber. Etch rates as high as 15 microns per minute have been observed. The etch appears to have infinite selectivity to many common thin films, including silicon dioxide, silicon nitride, photoresist, and aluminum. The etch rate, profile, and roughness are reported as a function of mask aperture, etch pressure, and duration.

Journal ArticleDOI
01 Jul 1997-Zeolites
TL;DR: In this article, b-and (a, b)-oriented monolayers on silicon wafers were grown as b- and b-oriented mono-layer on silicon and silicon nitride windows, aiming at two new membrane systems.

Patent
22 Jan 1997
TL;DR: In this paper, a method for making low sheet resistance sub-quarter-micrometer gate electrode lengths on field effect transistors has been achieved, which involves patterning gate electrodes on a silicon substrate from a conductively doped polysilicon layer having a silicon nitride layer on the surface.
Abstract: A method for making low sheet resistance sub-quarter-micrometer gate electrode lengths on field effect transistors has been achieved. The method involves patterning gate electrodes on a silicon substrate from a conductively doped polysilicon layer having a silicon nitride layer on the surface. After forming the FET lightly doped drains (LDD), the sidewall spacers, and the heavily doped source/drain contact regions with titanium contacts, an insulating layer is chemically/mechanically polished back to the silicon nitride or silicon oxynitride on the gate electrode layer to form a planar self-aligning mask. A pre-amorphizing implantation is carried out, and a titanium silicide is selectively formed on the gate electrodes resulting in small grain sizes and much reduced sheet resistance. The self-aligned mask prevents ion implant damage to the shallow source/drain regions adjacent to the FET gate electrodes. A second embodiment uses the self-aligned mask to form selectively a cobalt silicide on the polysilicon gate electrodes for low sheet resistance, while preventing the cobalt silicide from reacting with the adjacent titanium silicide source/drain regions.

Patent
19 Feb 1997
TL;DR: In this paper, a composition for polishing a composite comprised of silica and silicon nitride comprising: an aqueous medium, abrasive particles, a surfactant, and a compound which complexes with the complexing agent has two or more functional groups each having a dissociable proton, the functional groups being the same or different.
Abstract: A composition is provided for polishing a composite comprised of silica and silicon nitride comprising: an aqueous medium, abrasive particles, a surfactant, and a compound which complexes with the silica and silicon nitride wherein the complexing agent has has two or more functional groups each having a dissociable proton, the functional groups being the same or different.

Patent
04 Dec 1997
TL;DR: In this paper, an embodiment of the instant invention is presented for forming a dielectric layer, the method comprising the steps of: providing a semiconductor substrate (substrate 12), the substrate having a surface, forming an oxygen-containing layer (layer 14), subjecting the oxygencontaining layer to a nitrogen containing plasma (plasma 16) so that the nitrogen is either incorporated into the oxygen containing layer (see regions 18, 19, and 20) or forms a nitride layer at the surface of the substrate (region 22).
Abstract: An embodiment of the instant invention is a method of forming a dielectric layer, the method comprising the steps of: providing a semiconductor substrate (substrate 12), the substrate having a surface; forming an oxygen-containing layer (layer 14) on the semiconductor substrate; and subjecting the oxygen-containing layer to a nitrogen containing plasma (plasma 16) so that the nitrogen is either incorporated into the oxygen-containing layer (see regions 18, 19, and 20) or forms a nitride layer at the surface of the substrate (region 22). Using this embodiment of the instant invention, the dielectric layer can be substantially free of hydrogen. Preferably, the oxygen-containing layer is an SiO2 layer or it is comprised of oxygen and nitrogen (preferably an oxynitride layer). The plasma is, preferably, a high-density plasma. Preferably, a source of nitrogen is introduced to the plasma to form the nitrogen containing plasma. The source of nitrogen is preferably comprised of a material consisting of: N2, NH3, NO, N2 O, or a mixture thereof.

Journal ArticleDOI
01 Apr 1997-Wear
TL;DR: In this article, the dynamic running-in process of silicon nitride sliding in water under the conditions of load at 1-3 N, sliding velocity at 30-120 mm s−1 and temperature at 20-80°C with a pin-on-disc apparatus was studied.

Patent
21 May 1997
TL;DR: In this paper, a tungsten damascene local interconnect structure includes a silicon nitride etch stop layer which is formed using Plasma Enhanced Chemical Vapor Deposition (PECVD) at a temperature of at least 480°C.
Abstract: A semiconductor memory device such as a flash Electrically Erasable Programmable Read-Only Memory (Flash EEPROM) includes a floating gate with high data retention. A tungsten damascene local interconnect structure includes a silicon nitride etch stop layer which is formed using Plasma Enhanced Chemical Vapor Deposition (PECVD) at a temperature of at least 480° C. such that the etch stop layer has a very low concentration of hydrogen ions. The minimization of hydrogen ions, which constitute mobile positive charge carriers, in the etch stop layer, minimizes recombination of the hydrogen ions with electrons on the floating gate, and thereby maximizes data retention of the device.

Journal ArticleDOI
TL;DR: In this paper, the fabrication of an acoustic Lamb wave actuator using silicon micromachining and characterization of a PZT thin-film composite membrane of silicon nitride, platinum, and sol-gel-derived piezoelectric ceramic (PZT) is described.
Abstract: The fabrication using silicon micromachining and characterization of an acoustic Lamb wave actuator is presented. The intended use of the device is for mass transport and sensor applications. The device consists of dual interdigitated transducers patterned on a thin-film composite membrane of silicon nitride, platinum, and a sol-gel-derived piezoelectric ceramic (PZT) thin film. The acoustic properties of the device are presented along with preliminary applications to mechanical transport and liquid delivery systems. Improved acoustic signals and improved mass transport are achieved with PZT over present Lamb wave devices utilizing ZnO or AlN as the piezoelectric transducer.

Journal ArticleDOI
TL;DR: In this paper, a layer-by-layer silicon-nitride film was successfully deposited by alternating exposures to dichloro-silane and hydrazine and the saturated deposition rate was about 2.3 A/cycle, very near to 1 monolayer/cycle.

Journal ArticleDOI
R. Maas1, M Koch1, Nick Harris1, Neil M. White1, Alan G. R. Evans1 
TL;DR: In this paper, the problem of lead-zirconate-titanate diffusion was solved by using a screen-printed barrier layer of IP211 (Heraeus), which also reduces the diffusion and prevents the conduction.

01 May 1997
TL;DR: In this article, the authors measured and analyzed the optical properties of a series of silicon nitride thin films prepared by plasmaenhanced chemical vapor deposition on silicon substrates for photovoltaic applications.
Abstract: We have measured and analyzed the optical characteristics of a series of silicon nitride thin films prepared by plasma-enhanced chemical vapor deposition on silicon substrates for photovoltaic applications. Spectroscopic ellipsometry measurements were made by using a two-channel spectroscopic polarization modulator ellipsometer that measures N, S, and C data simultaneously. The data were fit to a model consisting of air / roughness / SiN / crystalline silicon. The roughness was modeled using the Bruggeman effective medium approximation, assuming 50% SiN, 50% voids. The optical functions of the SiN film were parameterized using a model by Jellison and Modine. All the {Chi}{sup 2} are near 1, demonstrating that this model works extremely well for all SiN films. The measured dielectric functions were used to make optimized SiN antireflection coatings for crystalline silicon solar cells.