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Silicon nitride

About: Silicon nitride is a research topic. Over the lifetime, 32678 publications have been published within this topic receiving 413599 citations. The topic is also known as: N₄Si₃.


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Patent
20 Feb 1996
TL;DR: In this article, a self-aligned halo process is described for forming an LDD structure using selfaligned self-alignments, where a gate silicon oxide layer is provided over the surface of a semiconductor substrate and an opening is provided through the insulating layer to one of the source and drain regions.
Abstract: A method for forming an LDD structure using a self-aligned halo process is described. A gate silicon oxide layer is provided over the surface of a semiconductor substrate. A gate electrode is formed overlying the gate silicon oxide layer. A silicon oxide layer is grown on the sidewalls of the gate electrode and silicon nitride spacers are formed on the sidewalls of the silicon oxide layer. First ions are implanted into the semiconductor substrate and the substrate is annealed whereby heavily doped source and drain regions are formed within the semiconductor substrate not covered by the gate electrode and the silicon oxide and silicon nitride spacers. An oxide layer is grown over the heavily doped source and drain regions. Thereafter, the silicon nitride spacers are removed. Second ions are implanted to form lightly doped regions in the semiconductor substrate not covered by the oxide layer. Third ions are implanted to form a halo having opposite dosage and a deeper junction than the lightly doped regions. An insulating layer is deposited over the surface of the substrate. An opening is provided through the insulating layer to one of the source and drain regions. A conducting layer is deposited overlying the insulating layer and within the opening and patterned completing the fabrication of the integrated circuit device.

97 citations

Patent
02 Jul 1999
TL;DR: In this paper, a low dielectric constant material was proposed for use as a passivation or etch stop layer in the dual damascene process and an integrated process of forming passivation, dielectrics, and etch-stop layers for use in dual-damascene processes was described.
Abstract: Novel low dielectric constant materials for use as dielectric in the dual damascene process are provided. A low dielectric constant material dielectric layer is formed by reacting a nitrogen-containing precursor and a substituted organosilane in a plasma-enhanced chemical deposition chamber. Also, novel low dielectric constant materials for use as a passivation or etch stop layer in the dual damascene process are provided. A carbon-doped silicon nitride passivation or etch stop layer having a low dielectric constraint is formed by reacting a substituted ammonia precursor and a substituted organosilane in a plasma-enhanced chemical deposition chamber. Alternatively, a silicon-carbide passivation or etch stop layer having a low dielectric constant is formed by reacting a substituted organosilane in a plasma-enhanced chemical deposition chamber. Also, an integrated process of forming passivation, dielectric, and etch stop layers for use in the dual damascene process is described.

97 citations

Patent
Thomas S. Dory1
22 May 1989
TL;DR: A thermal CVD process for forming silicon nitride-type or silicon dioxide-type films onto a substrate is characterized by the steps of: a) introducing di-tert-butylsilane and at least one other reactant gas capable of reacting with said ditertbutylmethylsilane to form silicon oxide into a CVD reaction zone containing said substrate on which either a silicon oxide and silicon dioxide type film is to be formed; b) maintaining the temperature of said zone and said substrate from about 450°C to about 900°C; and d) passing said
Abstract: A thermal CVD process for forming silicon nitride-type or silicon dioxide-type films onto a substrate characterized by the steps of: a) introducing di-tert-butylsilane and at least one other reactant gas capable of reacting with said di-tert-butylsilane to form silicon nitride or silicon dioxide into a CVD reaction zone containing said substrate on which either a silicon nitride-type or silicon dioxide-type film is to be formed; b) maintaining the temperature of said zone and said substrate from about 450°C to about 900°C; c) maintaining the pressure in said zone from about 0.1 to about 10 Torr; and d) passing said gases into contact with said substrate for a period of time sufficient to form a silicon nitride-type or silicon dioxide-type film thereon.

97 citations

Journal ArticleDOI
TL;DR: In this paper, a layer-by-layer silicon-nitride film was successfully deposited by alternating exposures to dichloro-silane and hydrazine and the saturated deposition rate was about 2.3 A/cycle, very near to 1 monolayer/cycle.

96 citations

Journal ArticleDOI
TL;DR: In this article, the controlled crystallization of amorphous second phases in SiAlON was demonstrated in two systems, and the resulting microstructures were characterized by TEM and qualitatively related to changes on room-temperature toughness and high temperature deformation.
Abstract: The controlled crystallization of amorphous second phases in SiAlON is demonstrated in two systems. In a magnesia-containing SiAlON, cordierite crystallized on annealing after hot-pressing. Similarly, garnet crystallized in yttria-contain-ing SiAlON. The resulting microstructures are characterized by TEM and qualitatively related to changes on room-temperature toughness and high-temperature deformation.

96 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023245
2022529
2021421
2020686
2019994
2018911