Silicon nitride

About: Silicon nitride is a research topic. Over the lifetime, 32678 publications have been published within this topic receiving 413599 citations. The topic is also known as: N₄Si₃.

High performance porous silicon nitrides

Abstract: In structural materials, pores are generally believed to deteriorate the mechanical reliability. This study, however, demonstrates pores can cause improved or unique performance when the porous microstructure is carefully controlled. The first example is a silicon nitride of 14% porosity fabricated by tape-castng whiskers. This material, where the characteristic fibrous grains were aligned uniaxially, shows a high fracture strength in excess of 1 GPa as well as high damage tolerance. The fracture energy obtained by a chevron-noteched beam technique was about seven times larger than that of dense silicon nitride, which was primarily attributable to grain “pull-out” mechanism enhanced by the pores. The other example was a silicon nitride of 24% porosity, fabricated by sinter forging technique which exhibited excellent strain tolerance.

Silicon fusion bonding and its characterization

Abstract: The basic principles of wafer fusion bonding including pretreatment, room temperature mating, and thermal annealing are presented. Techniques for the characterization of the bond quality are reviewed. Results for fusion bonding of other materials such as silicon nitride and polysilicon are discussed with a view to bond quality and application. Examples of fusion processes for power device fabrication show the feasibility of the technique.

Methods of depositing two or more layers on a substrate in situ

Abstract: The present invention provides methods of depositing two or more layers on a substrate in situ. In particular, methods are provided for forming a high-k dielectric gate stack on a substrate. Preferably, a high-k dielectric oxide, such as HfO 2 , HfSiO 4 , ZrO 2 or ZrSiO 4 , are deposited on a substrate in a reaction chamber by an atomic layer deposition (ALD) process. A silicon nitride layer is deposited on the substrate by a chemical vapor deposition (CVD) process, preferably a remote plasma enhanced chemical vapor deposition (RPECVD) process. Preferably, the ALD process and the RPECVD process are carried out under substantially isothermal conditions in the same reactor.

Vertical gate separation

Abstract: Methods of selectively etching tungsten from the surface of a patterned substrate are described. The methods electrically separate vertically arranged tungsten slabs from one another as needed. The vertically arranged tungsten slabs may form the walls of a trench during manufacture of a vertical flash memory cell. The tungsten etch may selectively remove tungsten relative to films such as silicon, polysilicon, silicon oxide, aluminum oxide, titanium nitride and silicon nitride. The methods include exposing electrically-shorted tungsten slabs to remotely-excited fluorine formed in a remote plasma region. Process parameters are provided which result in uniform tungsten recess within the trench. A low electron temperature is maintained in the substrate processing region to achieve high etch selectivity and uniform removal throughout the trench.

Method for operating a non-volatile memory cell arrangement

Abstract: In order to increase the storage density, in a memory cell arrangement having MOS transistors as memory cells which has as gate dielectric, a dielectric triple layer having a first silicon oxide layer, a silicon nitride layer and a second silicon oxide layer, the silicon oxide layers each having a thickness of at least 3 nm, the information is stored using multi-value logic with up to 26 values. In this case, use is made of the fact that these memory cells have a time period greater than 1000 years for data retention and their threshold voltage has a very small drift.